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authorPavel V. Shatov (Meister) <meisterpaul1@yandex.ru>2020-09-23 14:53:52 +0300
committerPavel V. Shatov (Meister) <meisterpaul1@yandex.ru>2020-09-23 14:53:52 +0300
commit9686a399784d63654bc32d4c04d678e181cece97 (patch)
treeed72db1d2b9219f1bb44a9086f5fd97fa2c3ba77 /KiCAD/Cryptech Alpha.sch-bak
parent90e0724d8e70b64612d23751e81dd207907aa0db (diff)
Initial project cleanup
Diffstat (limited to 'KiCAD/Cryptech Alpha.sch-bak')
-rw-r--r--KiCAD/Cryptech Alpha.sch-bak232
1 files changed, 232 insertions, 0 deletions
diff --git a/KiCAD/Cryptech Alpha.sch-bak b/KiCAD/Cryptech Alpha.sch-bak
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+++ b/KiCAD/Cryptech Alpha.sch-bak
@@ -0,0 +1,232 @@
+EESchema Schematic File Version 4
+EELAYER 26 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 27
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Sheet
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+U 57D8469B
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+F1 "rev02_00.sch" 60
+$EndSheet
+$Sheet
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+U 57D84708
+F0 "Power" 60
+F1 "rev02_01.sch" 60
+$EndSheet
+$Sheet
+S 750 5200 750 400
+U 57D8488D
+F0 "Entropy source" 60
+F1 "rev02_02.sch" 60
+$EndSheet
+$Sheet
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+U 57D84936
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+F1 "rev02_03.sch" 60
+$EndSheet
+$Sheet
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+U 57D849FD
+F0 "STM32 power" 60
+F1 "rev02_04.sch" 60
+$EndSheet
+$Sheet
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+U 57D84B22
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+F1 "rev02_06.sch" 60
+$EndSheet
+$Sheet
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+F0 "Keystore memory" 60
+F1 "rev02_07.sch" 60
+$EndSheet
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+$EndSheet
+$Sheet
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+F1 "rev02_09.sch" 60
+$EndSheet
+$Sheet
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+F1 "rev02_10.sch" 60
+$EndSheet
+$Sheet
+S 5350 5250 750 450
+U 57D84FAD
+F0 "Tamper MCU" 60
+F1 "rev02_11.sch" 60
+$EndSheet
+$Sheet
+S 5350 6100 750 400
+U 57D8509E
+F0 "Master Key Memory" 60
+F1 "rev02_12.sch" 60
+$EndSheet
+$Sheet
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+U 57D85134
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+F1 "rev02_13.sch" 60
+$EndSheet
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+$EndSheet
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+$EndSheet
+$Sheet
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+$EndSheet
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+$EndSheet
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+$EndSheet
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+$EndSheet
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+$EndSheet
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+$EndSheet
+$Sheet
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+U 57D855DE
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+F1 "rev02_22.sch" 60
+$EndSheet
+$Sheet
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+$EndSheet
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+F1 "rev02_24.sch" 60
+$EndSheet
+$Sheet
+S 3500 2100 750 400
+U 57D85B19
+F0 "Power sequencing" 60
+F1 "rev02_25.sch" 60
+$EndSheet
+Wire Notes Line
+ 6400 2200 6400 4400
+Wire Notes Line
+ 6400 4400 8300 4400
+Wire Notes Line
+ 8300 4400 8300 2200
+Wire Notes Line
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+Text Notes 6450 2350 0 98 ~ 20
+STM32
+Wire Wire Line
+ 8700 3300 8300 3300
+Wire Wire Line
+ 8700 4000 8300 4000
+Wire Wire Line
+ 7950 1700 7950 2200
+Wire Wire Line
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+Wire Bus Line
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+Text Label 8350 2600 0 60 ~ 0
+FMC
+Wire Notes Line
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+Wire Notes Line
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+Wire Notes Line
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+Wire Notes Line
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+Text Notes 2050 1950 0 98 ~ 20
+FPGA
+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Bus Line
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+Wire Bus Line
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+Wire Bus Line
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+Wire Bus Line
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+Wire Bus Line
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+Text Label 6100 3550 0 60 ~ 0
+FMC
+$EndSCHEMATC