| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2016-06-01 | Ported ModExpS6 core to the new Alpha platform, hence the core now becomes ↵HEADmaster | Pavel V. Shatov (Meister) | |
| ModExpA7. Note, that the core takes advantage of built-in DSP slices available in 7-Series FPGAs. This considerably speeds up computations, because the core can operate in 32-bit-word-serial mode instead of just bit-serial mode. The core directly instantiates DSP slices instead of using IP wizard to avoid using CoreGen during console bitstream builds. | |||
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index : user/shatov/ModExpA7 | |
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