(1) Added register missing from reset code. (2) Cleaned up reset constants. (3) Added missing wire declaration in testbench.HEADmaster

2 files changed, 3 insertions, 2 deletions

diff --git a/src/rtl/mkmif.v b/src/rtl/mkmif.v
index 4f44878..55d9678 100644
--- a/src/rtl/mkmif.v
+++ b/src/rtl/mkmif.v
@@ -154,6 +154,7 @@ module mkmif(
         begin
           read_op_reg    <= 1'h0;
           write_op_reg   <= 1'h0;
+          init_op_reg    <= 1'h0;
           addr_reg       <= 16'h0;
           sclk_div_reg   <= DEFAULT_SCLK_DIV;
           write_data_reg <= 32'h0;
diff --git a/src/rtl/mkmif_core.v b/src/rtl/mkmif_core.v
index 0f90bf0..9bd5317 100644
--- a/src/rtl/mkmif_core.v
+++ b/src/rtl/mkmif_core.v
@@ -152,8 +152,8 @@ module mkmif_core(
     begin
       if (!reset_n)
         begin
-          ready_reg      <= 0;
-          valid_reg      <= 0;
+          ready_reg      <= 1'h0;
+          valid_reg      <= 1'h0;
           read_data_reg  <= 32'h0;
           mkmif_ctrl_reg <= CTRL_IDLE;
         end