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authorJoachim StroĢˆmbergson <joachim@secworks.se>2018-09-18 12:51:19 +0200
committerJoachim StroĢˆmbergson <joachim@secworks.se>2018-09-18 12:51:19 +0200
commitaefd88d9fbc525e4d3dc56b9e01e5ff21f9c1ff2 (patch)
treefe1c003158cc2a35762ed2ab1668abc2cbd10d20 /src
parent12db6151bf7a1c896a6f4bb37d46992a3621caaf (diff)
Increasing control state reg to support more states. Adding first states for read and write key handling.
Diffstat (limited to 'src')
-rw-r--r--src/rtl/keywrap_core.v78
1 files changed, 65 insertions, 13 deletions
diff --git a/src/rtl/keywrap_core.v b/src/rtl/keywrap_core.v
index 9c2fa50..c517757 100644
--- a/src/rtl/keywrap_core.v
+++ b/src/rtl/keywrap_core.v
@@ -80,17 +80,21 @@ module keywrap_core #(parameter MEM_BITS = 11)
//----------------------------------------------------------------
localparam MAX_ITERATIONS = 6 - 1;
- localparam CTRL_IDLE = 4'h0;
- localparam CTRL_INIT_WAIT = 4'h1;
- localparam CTRL_NEXT_WSTART = 4'h2;
- localparam CTRL_NEXT_USTART = 4'h3;
- localparam CTRL_NEXT_LOOP0 = 4'h4;
- localparam CTRL_NEXT_LOOP = 4'h5;
- localparam CTRL_NEXT_WAIT = 4'h6;
- localparam CTRL_NEXT_UPDATE = 4'h7;
- localparam CTRL_NEXT_WCHECK = 4'h8;
- localparam CTRL_NEXT_UCHECK = 4'h9;
- localparam CTRL_NEXT_FINALIZE = 4'ha;
+ localparam CTRL_IDLE = 5'h0;
+ localparam CTRL_INIT_WAIT = 5'h1;
+ localparam CTRL_NEXT_WSTART = 5'h2;
+ localparam CTRL_NEXT_USTART = 5'h3;
+ localparam CTRL_NEXT_LOOP0 = 5'h4;
+ localparam CTRL_NEXT_LOOP = 5'h5;
+ localparam CTRL_NEXT_WAIT = 5'h6;
+ localparam CTRL_NEXT_UPDATE = 5'h7;
+ localparam CTRL_NEXT_WCHECK = 5'h8;
+ localparam CTRL_NEXT_UCHECK = 5'h9;
+ localparam CTRL_NEXT_FINALIZE = 5'ha;
+ localparam CTRL_READ_START = 5'h10;
+ localparam CTRL_READ_END = 5'h11;
+ localparam CTRL_WRITE_START = 5'h18;
+ localparam CTRL_WRITE_END = 5'h19;
//----------------------------------------------------------------
@@ -125,8 +129,8 @@ module keywrap_core #(parameter MEM_BITS = 11)
reg iteration_ctr_set;
reg iteration_ctr_rst;
- reg [3 : 0] keywrap_core_ctrl_reg;
- reg [3 : 0] keywrap_core_ctrl_new;
+ reg [4 : 0] keywrap_core_ctrl_reg;
+ reg [4 : 0] keywrap_core_ctrl_new;
reg keywrap_core_ctrl_we;
@@ -423,6 +427,22 @@ module keywrap_core #(parameter MEM_BITS = 11)
keywrap_core_ctrl_new = CTRL_NEXT_USTART;
keywrap_core_ctrl_we = 1'h1;
end
+
+ if (read)
+ begin
+ ready_new = 1'h0;
+ ready_we = 1'h1;
+ keywrap_core_ctrl_new = CTRL_READ_START;
+ keywrap_core_ctrl_we = 1'h1;
+ end
+
+ if (write)
+ begin
+ ready_new = 1'h0;
+ ready_we = 1'h1;
+ keywrap_core_ctrl_new = CTRL_WRITE_START;
+ keywrap_core_ctrl_we = 1'h1;
+ end
end
@@ -553,6 +573,38 @@ module keywrap_core #(parameter MEM_BITS = 11)
keywrap_core_ctrl_we = 1'h1;
end
+
+ CTRL_READ_START:
+ begin
+ keywrap_core_ctrl_new = CTRL_READ_END;
+ keywrap_core_ctrl_we = 1'h1;
+ end
+
+
+ CTRL_READ_END:
+ begin
+ ready_new = 1'h1;
+ ready_we = 1'h1;
+ keywrap_core_ctrl_new = CTRL_IDLE;
+ keywrap_core_ctrl_we = 1'h1;
+ end
+
+
+ CTRL_WRITE_START:
+ begin
+ keywrap_core_ctrl_new = CTRL_WRITE_END;
+ keywrap_core_ctrl_we = 1'h1;
+ end
+
+
+ CTRL_WRITE_END:
+ begin
+ ready_new = 1'h1;
+ ready_we = 1'h1;
+ keywrap_core_ctrl_new = CTRL_IDLE;
+ keywrap_core_ctrl_we = 1'h1;
+ end
+
default:
begin