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authorJoachim StroĢˆmbergson <joachim@secworks.se>2018-11-23 11:08:24 +0100
committerJoachim StroĢˆmbergson <joachim@secworks.se>2018-11-23 11:08:24 +0100
commitf67001b76c6b6a7764bbea7fdec5d5d0e3ce9792 (patch)
tree1ef34210950cc3c137ddde3694ca8ad3bfe09661 /src/tb
parent88d1cb6b6cc58050b406bb0d5134d727d4eca684 (diff)
Updated display of states. We can now observe correct init of the memory.
Diffstat (limited to 'src/tb')
-rw-r--r--src/tb/tb_keywrap_mkmif.v16
1 files changed, 11 insertions, 5 deletions
diff --git a/src/tb/tb_keywrap_mkmif.v b/src/tb/tb_keywrap_mkmif.v
index 55305ff..b22be82 100644
--- a/src/tb/tb_keywrap_mkmif.v
+++ b/src/tb/tb_keywrap_mkmif.v
@@ -143,21 +143,27 @@ module tb_keywrap_mkmif();
if (show_dut_state)
begin
+ $display("DUT control state:");
$display("init: 0x%01x read: 0x%01x write: 0x%01x key_status: 0x%01x",
dut.init, dut.read, dut.write, dut.key_status);
$display("ready: 0x%01x ctrl_state: 0x%02x", dut.ready, dut.keywrap_mkmif_ctrl_reg);
+ $display();
end
-
if (show_mem_state)
begin
- $display("BitCounter: %08d InstRegister: 0x%01x AddrRegister: 0x%02x",
- mem.BitCounter, mem.InstRegister, mem.AddrRegister);
- $display("DataShifterI: 0x%02x DataShifterO: 0x%01x",
- mem.DataShifterI, mem.DataShifterO);
+ $display("Memory control state:");
+ $display("Hold: 0x%1x BitCounter: 0x%04x", mem.Hold, mem.BitCounter);
+ $display("DataShifterI: 0x%02x DataShifterO: 0x%1x", mem.DataShifterI, mem.DataShifterO);
+ $display("InstRegister: 0x%1x AddrRegister: 0x%02x", mem.InstRegister, mem.AddrRegister);
+ $display("OpMode0: 0x%1x OpMode1: 0x%1x", mem.OpMode0, mem.OpMode1);
+ $display("InstructionREAD: 0x%1x InstructionRDSR: 0x%1x", mem.InstructionREAD, mem.InstructionRDSR);
+ $display("InstructionWRSR: 0x%1x InstructionWRITE: 0x%1x", mem.InstructionWRSR, mem.InstructionWRITE);
+ $display();
end
if (show_spi)
begin
+ $display("SPI interface state:");
$display("spi_clk: 0x%01x, spi_cs_n: 0x%01x, spi_do: 0x%01x, spi_di: 0x%01x",
tb_mkm_spi_sclk, tb_mkm_spi_cs_n, tb_mkm_spi_do, tb_mkm_spi_di);
end