user/js/fpga_mkm - FPGA-based active Master Key Memory (MKM)

Age	Commit message (Collapse)	Author
2019-03-26	(1) Changing key memory to be based on bytes. (2) Adding API commands ands ↵	Joachim Strömbergson
	status values for operating the memory.
2019-03-26	Completed first RTL for the SPI slave. Simplified the design to simply be ↵	Joachim Strömbergson
	two shift registers and a somple FSM that detects clock flanks and SS.
2019-03-12	Adding registers, control signals and logic for receiving and transmitting bits.	Joachim Strömbergson

2019-03-10	Adding bit counters for rx and tx. Since they will be updated the same we ↵	Joachim Strömbergson
	should have a single counter though. Created rx shift register.
2019-03-07	Adding initial version of SPI slave interface. So far just defined ports and ↵	Joachim Strömbergson
	registers with control signals.
2019-02-12	Starting to add control registers and control FSM needed for the key ↵	Joachim Strömbergson
	handling and tamper response.
2019-02-12	(1) Mapped all accessible IOs on the iCEstick and allocated ports on the ↵	Joachim Strömbergson
	PMOD headers for the FPGA_MKM application. (2) Connected the tamper alarm to the counter and can observe that it toggles in sync with the LED.
2019-02-12	(1) Fixed Makefile. Now we can build sim target, generate bitstream and also ↵	Joachim Strömbergson
	burn it to the FPGA dev board. (2) Started structuring the RTL source file.
2019-02-11	Fixed Makefile to allow building of simulation executable, linting and FPGA ↵	Joachim Strömbergson
	bitstream. Updated code to work.
2019-02-11	Adding initial version of top.	Joachim Strömbergson