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2019-03-10Adding bit counters for rx and tx. Since they will be updated the same we ↵Joachim Strömbergson
should have a single counter though. Created rx shift register.
2019-03-07Adding initial version of SPI slave interface. So far just defined ports and ↵Joachim Strömbergson
registers with control signals.
2019-02-12Starting to add control registers and control FSM needed for the key ↵Joachim Strömbergson
handling and tamper response.
2019-02-12Adding initial version of real testbench for the fpga_mkm.Joachim Strömbergson
2019-02-12(1) Mapped all accessible IOs on the iCEstick and allocated ports on the ↵Joachim Strömbergson
PMOD headers for the FPGA_MKM application. (2) Connected the tamper alarm to the counter and can observe that it toggles in sync with the LED.
2019-02-12Adding some info about the requirements in the header of the Makefile. This ↵Joachim Strömbergson
could possibly move to the README though...
2019-02-12(1) Fixed Makefile. Now we can build sim target, generate bitstream and also ↵Joachim Strömbergson
burn it to the FPGA dev board. (2) Started structuring the RTL source file.
2019-02-11Fixed Makefile to allow building of simulation executable, linting and FPGA ↵Joachim Strömbergson
bitstream. Updated code to work.
2019-02-11Adding initial version of top.Joachim Strömbergson
2019-02-11Adding pinmap for the iCEstick.Joachim Strömbergson
2019-02-05Adding LICENSE and initial version of README.txt with a short description of ↵Joachim Strömbergson
what the core will be.