blob: 0f1e1bab6a34a276c9cca16c7d956efd7db41ec2 (
plain) (
blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
|
EESchema Schematic File Version 2
LIBS:power
LIBS:device
LIBS:transistors
LIBS:conn
LIBS:linear
LIBS:regul
LIBS:cmos4000
LIBS:adc-dac
LIBS:memory
LIBS:xilinx
LIBS:special
LIBS:microcontrollers
LIBS:dsp
LIBS:microchip
LIBS:analog_switches
LIBS:motorola
LIBS:texas
LIBS:intel
LIBS:audio
LIBS:interface
LIBS:digital-audio
LIBS:philips
LIBS:display
LIBS:cypress
LIBS:siliconi
LIBS:opto
LIBS:atmel
LIBS:contrib
LIBS:valves
EELAYER 27 0
EELAYER END
$Descr B 17000 11000
encoding utf-8
Sheet 18 27
Title "rev02_16"
Date "15 10 2016"
Rev ""
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
Text Notes 1500 4100 0 60 ~ 12
*) Middle Right Bank
Text Notes 4800 4000 0 60 ~ 12
*) Upper Left Bank
Text Notes 2400 4800 0 60 ~ 12
*) Completely unused banks\nstill must be powered
Text Notes 5900 4700 0 60 ~ 12
*) Completely unused banks\nstill must be powered
Text Notes 8600 10230 0 84 ~ 12
FPGA unused banks
$Comp
L VCCO_3V3 #PWR?58023F33
U 1 1 58023F33
P 2300 4300
F 0 "VCCO_3V3_31" H 2300 4300 20 0000 C CNN
F 1 "+VCCO_3V3" H 2300 4230 30 0000 C CNN
F 2 "" H 2300 4300 70 0000 C CNN
F 3 "" H 2300 4300 70 0000 C CNN
1 2300 4300
1 0 0 -1
$EndComp
$Comp
L VCCO_3V3 #PWR?58023F32
U 1 1 58023F32
P 5800 4200
F 0 "VCCO_3V3_32" H 5800 4200 20 0000 C CNN
F 1 "+VCCO_3V3" H 5800 4130 30 0000 C CNN
F 2 "" H 5800 4200 70 0000 C CNN
F 3 "" H 5800 4200 70 0000 C CNN
1 5800 4200
1 0 0 -1
$EndComp
Wire Wire Line
2300 4500 2100 4500
Wire Wire Line
2300 4500 2300 4600
Wire Wire Line
2300 4600 2300 4700
Wire Wire Line
2300 4700 2300 4800
Wire Wire Line
2300 4800 2100 4800
Wire Wire Line
2300 4700 2100 4700
Wire Wire Line
2300 4600 2100 4600
Wire Wire Line
2300 4300 2300 4500
Wire Wire Line
2300 5000 2100 5000
Wire Wire Line
2300 4900 2300 5000
Wire Wire Line
2300 4800 2300 4900
Wire Wire Line
2300 4900 2100 4900
Wire Wire Line
5800 4400 5600 4400
Wire Wire Line
5800 4400 5800 4500
Wire Wire Line
5800 4500 5800 4600
Wire Wire Line
5800 4600 5800 4700
Wire Wire Line
5800 4700 5600 4700
Wire Wire Line
5800 4600 5600 4600
Wire Wire Line
5800 4500 5600 4500
Wire Wire Line
5800 4200 5800 4400
Wire Wire Line
5800 4900 5600 4900
Wire Wire Line
5800 4800 5800 4900
Wire Wire Line
5800 4700 5800 4800
Wire Wire Line
5800 4800 5600 4800
$Comp
L XC7A200TFBG484_4 U13_7
U 1 1 58023F31
P 1900 7200
F 0 "U13_7" H 1490 4190 60 0000 L BNN
1 1900 7200
1 0 0 -1
F 2 "Cryptech_Alpha_Footprints:BGA484C100P22X22_2300X2300X254" H 1490 4190 60 0001 C CNN
$EndComp
$Comp
L XC7A200TFBG484_7 U13_8
U 1 1 58023F30
P 5400 7100
F 0 "U13_8" H 4990 4090 60 0000 L BNN
1 5400 7100
1 0 0 -1
F 2 "Cryptech_Alpha_Footprints:BGA484C100P22X22_2300X2300X254" H 4990 4090 60 0001 C CNN
$EndComp
$EndSCHEMATC
|
