blob: 23edf9aec608e22ef3782fdac6befc09f2d96c83 (
plain) (
blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
|
EESchema Schematic File Version 2
LIBS:power
LIBS:device
LIBS:transistors
LIBS:conn
LIBS:linear
LIBS:regul
LIBS:cmos4000
LIBS:adc-dac
LIBS:memory
LIBS:xilinx
LIBS:special
LIBS:microcontrollers
LIBS:dsp
LIBS:microchip
LIBS:analog_switches
LIBS:motorola
LIBS:texas
LIBS:intel
LIBS:audio
LIBS:interface
LIBS:digital-audio
LIBS:philips
LIBS:display
LIBS:cypress
LIBS:siliconi
LIBS:opto
LIBS:atmel
LIBS:contrib
LIBS:valves
EELAYER 27 0
EELAYER END
$Descr B 17000 11000
encoding utf-8
Sheet 16 27
Title "rev02_14"
Date "15 10 2016"
Rev ""
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
Text Notes 7500 4300 0 60 ~ 12
*) Temperature Sensor [NOT USED]
Text Notes 5200 4300 0 60 ~ 12
*) XADC [NOT USED]
Text Notes 1100 4200 0 60 ~ 12
*) Transceivers [NOT USED]
Text Notes 8810 10230 0 84 ~ 12
FPGA unused
Text Notes 6160 4990 0 60 ~ 12
C109
Text Notes 6160 5190 0 60 ~ 12
0.1~uF
$Comp
L GND #PWR?58023F57
U 1 1 58023F57
P 8700 5000
F 0 "GND_99" H 8700 5000 20 0000 C CNN
F 1 "+GND" H 8700 4930 30 0000 C CNN
F 2 "" H 8700 5000 70 0000 C CNN
F 3 "" H 8700 5000 70 0000 C CNN
1 8700 5000
1 0 0 -1
$EndComp
$Comp
L GND #PWR?58023F56
U 1 1 58023F56
P 5700 5400
F 0 "GND_100" H 5700 5400 20 0000 C CNN
F 1 "+GND" H 5700 5330 30 0000 C CNN
F 2 "" H 5700 5400 70 0000 C CNN
F 3 "" H 5700 5400 70 0000 C CNN
1 5700 5400
1 0 0 -1
$EndComp
$Comp
L GND #PWR?58023F55
U 1 1 58023F55
P 6100 5400
F 0 "GND_101" H 6100 5400 20 0000 C CNN
F 1 "+GND" H 6100 5330 30 0000 C CNN
F 2 "" H 6100 5400 70 0000 C CNN
F 3 "" H 6100 5400 70 0000 C CNN
1 6100 5400
1 0 0 -1
$EndComp
$Comp
L FPGA_VCCAUX_1V8 #PWR?58023F54
U 1 1 58023F54
P 6100 4500
F 0 "FPGA_VCCAUX_1V8" H 6100 4500 20 0000 C CNN
F 1 "+FPGA_VCCAUX_1V8" H 6100 4430 30 0000 C CNN
F 2 "" H 6100 4500 70 0000 C CNN
F 3 "" H 6100 4500 70 0000 C CNN
1 6100 4500
1 0 0 -1
$EndComp
Wire Wire Line
5700 5200 5500 5200
Wire Wire Line
5700 5200 5700 5400
Wire Wire Line
5700 5100 5500 5100
Wire Wire Line
5700 5100 5700 5200
Wire Wire Line
5700 5000 5500 5000
Wire Wire Line
5700 5000 5700 5100
Wire Wire Line
6100 5200 6100 5400
Wire Wire Line
8700 4800 8500 4800
Wire Wire Line
8700 4800 8700 5000
Wire Wire Line
8700 4700 8500 4700
Wire Wire Line
8700 4700 8700 4800
Wire Wire Line
6100 4700 5500 4700
Wire Wire Line
6100 4700 6100 4900
Wire Wire Line
6100 4500 6100 4700
$Comp
L C-EUC0402 C109
U 1 1 58023F53
P 6100 5000
F 0 "C109" H 6180 4810 60 0000 L BNN
F 1 "0.1uF" H 6420 5020 60 0000 L BNN
F 2 "" H 6420 5020 60 0000 C CNN
F 3 "" H 6420 5020 60 0000 C CNN
1 6100 5000
1 0 0 -1
$EndComp
$Comp
L XC7A200TFBG484_8 U13_2
U 1 1 58023F52
P 1900 7900
F 0 "U13_2" H 1490 6690 60 0000 L BNN
1 1900 7900
1 0 0 -1
$EndComp
$Comp
L XC7A200TFBG484_11 U13_3
U 1 1 58023F51
P 1900 5000
F 0 "U13_3" H 1490 4590 60 0000 L BNN
1 1900 5000
1 0 0 -1
$EndComp
$Comp
L XC7A200TFBG484_12 U13_4
U 1 1 58023F50
P 1900 6000
F 0 "U13_4" H 1490 5490 60 0000 L BNN
1 1900 6000
1 0 0 -1
$EndComp
$Comp
L XC7A200TFBG484_13 U13_5
U 1 1 58023F4F
P 8300 4700
F 0 "U13_5" H 7890 4390 60 0000 L BNN
1 8300 4700
1 0 0 -1
$EndComp
$Comp
L XC7A200TFBG484_17 U13_6
U 1 1 58023F4E
P 5300 4900
F 0 "U13_6" H 4890 4390 60 0000 L BNN
1 5300 4900
1 0 0 -1
$EndComp
$EndSCHEMATC
|
