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-rw-r--r--rev03-KiCad/rev02_18.sch28
1 files changed, 26 insertions, 2 deletions
diff --git a/rev03-KiCad/rev02_18.sch b/rev03-KiCad/rev02_18.sch
index 76b9301..e1947c7 100644
--- a/rev03-KiCad/rev02_18.sch
+++ b/rev03-KiCad/rev02_18.sch
@@ -305,11 +305,11 @@ Wire Wire Line
5500 9000 5500 9200
Wire Wire Line
7000 4800 6000 4800
-Text GLabel 7000 4800 2 48 Output ~ 0
+Text Label 7000 4800 2 48 ~ 0
FPGA_VCCAUX_1V8
Wire Wire Line
7000 8000 6000 8000
-Text Label 7000 8000 2 48 ~ 0
+Text Label 7000 8000 0 48 ~ 0
VCCO_3V3
Wire Wire Line
2100 6200 2100 6300
@@ -788,4 +788,28 @@ F 3 "" H 7000 7800 60 0000 C CNN
1 7000 7800
1 0 0 -1
$EndComp
+$Comp
+L power:PWR_FLAG #FLG?
+U 1 1 5AFA31D0
+P 6050 4800
+F 0 "#FLG?" H 6050 4875 50 0001 C CNN
+F 1 "PWR_FLAG" H 6050 4974 50 0000 C CNN
+F 2 "" H 6050 4800 50 0001 C CNN
+F 3 "~" H 6050 4800 50 0001 C CNN
+ 1 6050 4800
+ 1 0 0 -1
+$EndComp
+Connection ~ 6050 4800
+$Comp
+L power:PWR_FLAG #FLG?
+U 1 1 5AFB3F33
+P 6050 8000
+F 0 "#FLG?" H 6050 8075 50 0001 C CNN
+F 1 "PWR_FLAG" H 6050 8174 50 0000 C CNN
+F 2 "" H 6050 8000 50 0001 C CNN
+F 3 "~" H 6050 8000 50 0001 C CNN
+ 1 6050 8000
+ 1 0 0 -1
+$EndComp
+Connection ~ 6050 8000
$EndSCHEMATC