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-rw-r--r--rev03-KiCad/rev02_18.sch56
1 files changed, 54 insertions, 2 deletions
diff --git a/rev03-KiCad/rev02_18.sch b/rev03-KiCad/rev02_18.sch
index 634d960..e1947c7 100644
--- a/rev03-KiCad/rev02_18.sch
+++ b/rev03-KiCad/rev02_18.sch
@@ -305,11 +305,11 @@ Wire Wire Line
5500 9000 5500 9200
Wire Wire Line
7000 4800 6000 4800
-Text GLabel 7000 4800 2 48 Output ~ 0
+Text Label 7000 4800 2 48 ~ 0
FPGA_VCCAUX_1V8
Wire Wire Line
7000 8000 6000 8000
-Text GLabel 7000 8000 2 48 Output ~ 0
+Text Label 7000 8000 0 48 ~ 0
VCCO_3V3
Wire Wire Line
2100 6200 2100 6300
@@ -760,4 +760,56 @@ F 3 "" H 1570 9470 60 0000 C CNN
1 1600 9600
0 -1 -1 0
$EndComp
+NoConn ~ 3900 5800
+NoConn ~ 3900 9000
+Wire Wire Line
+ 7000 4800 7000 4500
+$Comp
+L Cryptech_Alpha:FPGA_VCCAUX_1V8 #PWR?
+U 1 1 5AF45C1F
+P 7000 4500
+F 0 "#PWR?" H 7000 4350 50 0001 C CNN
+F 1 "FPGA_VCCAUX_1V8" H 7015 4673 50 0000 C CNN
+F 2 "" H 7000 4500 60 0000 C CNN
+F 3 "" H 7000 4500 60 0000 C CNN
+ 1 7000 4500
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
+ 7000 8000 7000 7800
+$Comp
+L Cryptech_Alpha:VCCO_3V3 #PWR?
+U 1 1 5AF49BC2
+P 7000 7800
+F 0 "#PWR?" H 7000 7650 50 0001 C CNN
+F 1 "VCCO_3V3" H 7015 7973 50 0000 C CNN
+F 2 "" H 7000 7800 60 0000 C CNN
+F 3 "" H 7000 7800 60 0000 C CNN
+ 1 7000 7800
+ 1 0 0 -1
+$EndComp
+$Comp
+L power:PWR_FLAG #FLG?
+U 1 1 5AFA31D0
+P 6050 4800
+F 0 "#FLG?" H 6050 4875 50 0001 C CNN
+F 1 "PWR_FLAG" H 6050 4974 50 0000 C CNN
+F 2 "" H 6050 4800 50 0001 C CNN
+F 3 "~" H 6050 4800 50 0001 C CNN
+ 1 6050 4800
+ 1 0 0 -1
+$EndComp
+Connection ~ 6050 4800
+$Comp
+L power:PWR_FLAG #FLG?
+U 1 1 5AFB3F33
+P 6050 8000
+F 0 "#FLG?" H 6050 8075 50 0001 C CNN
+F 1 "PWR_FLAG" H 6050 8174 50 0000 C CNN
+F 2 "" H 6050 8000 50 0001 C CNN
+F 3 "~" H 6050 8000 50 0001 C CNN
+ 1 6050 8000
+ 1 0 0 -1
+$EndComp
+Connection ~ 6050 8000
$EndSCHEMATC