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-rwxr-xr-xconvert.sh44
1 files changed, 44 insertions, 0 deletions
diff --git a/convert.sh b/convert.sh
index fb59cf7..fbfd6f6 100755
--- a/convert.sh
+++ b/convert.sh
@@ -99,6 +99,50 @@ done
# Turn some labels into global labels. All labels seem to be global in Altium?
../fix-labels.py rev02*sch
+# Add NotConnected and some other symbols
+../add-components.py rev02*sch
+
+# Conversion seems to make all power pins power-input, change some to power-output
+# LT3060ITS8-15
+sed -i -e 's/^X OUT 6 600 300 200 L 70 70 0 1 W$/X OUT 6 600 300 200 L 70 70 0 1 w/' Cryptech_Alpha.lib
+# Voltage regulator outputs
+#sed -i -e 's/^X VOUT \(.*\) W$/X VOUT \1 w/g' Cryptech_Alpha.lib
+# Power jack
+sed -i \
+ -e 's/^X PWR 1 100 300 100 L 1 1 0 1 w$/X PWR 1 100 300 100 L 1 1 0 1 P/' \
+ -e 's/^X GND 2 100 100 100 L 1 1 0 1 W$/X GND 2 100 100 100 L 1 1 0 1 P/' \
+ -e 's/^X GNDBREAK 3 100 200 100 L 1 1 0 1 W$/X GNDBREAK 3 100 200 100 L 1 1 0 1 P/' \
+ Cryptech_Alpha.lib
+# VCCs
+#sed -i \
+# -e 's/^X 3V3_BATT 1 0 0 0 U 50 50 1 1 w N$/X 3V3_BATT 1 0 0 0 U 50 50 1 1 W N/' \
+# -e 's/^X FT_VPLL 1 0 0 0 U 50 50 1 1 w N$/X FT_VPLL 1 0 0 0 U 50 50 1 1 W N/' \
+# -e 's/^X FT_VPHY 1 0 0 0 U 50 50 1 1 w N$/X FT_VPHY 1 0 0 0 U 50 50 1 1 W N/' \
+# -e 's/^X FT_VREGIN 1 0 0 0 U 50 50 1 1 w N$/X FT_VREGIN 1 0 0 0 U 50 50 1 1 W N/' \
+# -e 's/^X FT_VCC3V3 1 0 0 0 U 50 50 1 1 w N$/X FT_VCC3V3 1 0 0 0 U 50 50 1 1 W N/' \
+# -e 's/^X FT_VREGIN 1 0 0 0 U 50 50 1 1 w N$/X FT_VREGIN 1 0 0 0 U 50 50 1 1 W N/' \
+# Cryptech_Alpha.lib
+
+# Fix off-grid capacitor
+sed -i \
+ -e 's/^X + 1 110 0 10 L 1 1 0 1 P$/X + 1 100 0 10 L 1 1 0 1 P/' \
+ -e 's/^X - 2 -110 0 10 R 1 1 0 1 P$/X - 2 -100 0 10 R 1 1 0 1 P/' \
+ Cryptech_Alpha.lib
+
+# Component attributes seem to get added in a big pile on components
+grep -v \
+ -e '^T 0 -80 120 50 0 1 1 10% Normal 1 C C' \
+ -e '^T 0 -80 120 50 0 1 1 50V Normal 1 C C' \
+ -e '^T 0 -80 120 50 0 1 1 6.3V Normal 1 C C' \
+ -e '^T 0 -80 120 50 0 1 1 X5R Normal 1 C C' \
+ -e '^T 0 -80 120 50 0 1 1 X7R Normal 1 C C' \
+ -e '^T 0 -220 -50 50 0 1 1 5% Normal 1 C C' \
+ -e '^T 0 -220 40 50 0 1 1 5% Normal 1 C C' \
+ -e '^T 0 -80 120 50 0 1 1 16V Normal 1 C C' \
+ -e '^T 0 -80 120 50 0 1 1 20% Normal 1 C C' \
+ Cryptech_Alpha.lib > Cryptech_Alpha.lib2
+mv Cryptech_Alpha.lib2 Cryptech_Alpha.lib
+
# Segments on non-copper layer Eco2.User are not visible, and causes ERC warnings.
# Turn them into graphical lines instead.