init

1 files changed, 617 insertions, 0 deletions

diff --git a/rev03-KiCad/rev02_19.sch b/rev03-KiCad/rev02_19.sch
new file mode 100644
index 0000000..fde475a
--- /dev/null
+++ b/rev03-KiCad/rev02_19.sch
@@ -0,0 +1,617 @@
+EESchema Schematic File Version 2
+LIBS:power
+LIBS:device
+LIBS:transistors
+LIBS:conn
+LIBS:linear
+LIBS:regul
+LIBS:cmos4000
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:special
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:valves
+EELAYER 27 0
+EELAYER END
+$Descr B 17000 11000
+encoding utf-8
+Sheet 21 27
+Title "rev02_19"
+Date "15 10 2016"
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+Text Notes 1100 3300 0    60   ~ 12
+*) Upper Right Bank
+Text Notes 3619 7161 0    60   ~ 12
+*) FPGA_GCLK signal _MUST_ go into either D17 or C18\n(i.e. into one of the two positive (master) sides\nof the two available MRCC differential pairs)
+Text Notes 3586 7535 0    60   ~ 12
+*) FPGA_GPIO_* and FPGA_IRQ_N_* signals can be swapped
+Text Notes 7623 3201 0    60   ~ 12
+*) Signals, that are allowed to be swapped, can be be swapped\nwith each other and/or moved to different pins within their bank.
+Text Notes 3630 6050 0    60   ~ 12
+NOTE: One of the FPGA_GPIO_* pins\nshould be connected to one of the\nMRCC pins.\nThe non-MRCC GPIO signals should be\nlength matched to within 500 ps of\nthe MRCC signal.
+Text Notes 9724 10153 0    84   ~ 12
+FPGA GPIO
+Text Notes 9845 3850 2    60   ~ 12
+MA08-2
+Text Notes 9845 4983 2    60   ~ 12
+SV2
+Text Notes 9845 5940 2    60   ~ 12
+MA08-2
+Text Notes 9845 7073 2    60   ~ 12
+SV3
+Text Notes 7986 4499 0    60   ~ 12
+C121
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