Fix the drill size of the 296 0.5 mm holes

1 files changed, 19 insertions, 8 deletions

diff --git a/fix-pcb.py b/fix-pcb.py
index 4011f06..fdd1ec3 100755
--- a/fix-pcb.py
+++ b/fix-pcb.py
@@ -73,14 +73,24 @@ def layer_zone_fixes(board, layer, clearance=0.15, min_width=0.05, thermal=0.5,
             area.SetThermalReliefCopperBridge(int(thermal * 1000000))
 
 
-#def change_via_drill_size(board, from_, to_):
-#    for this in board.GetTracks():
-#        if type(this) is pcbnew.VIA:
-#            if this.GetDrill() == from_:
-#                this.SetDrill(pcbnew.FromMM(to_))
-#            else:
-#                help(this)
-#                print('Not changing drill {} to {}'.format(this.GetDrill(), to_))
+def change_via_drill_size(board, from_size, to_drill):
+    """
+    The Cryptech board has 296 vias that should be drilled 0.5 mm.
+
+    Oddly enough, these have a 'width' of 1000000 but need to have the drill size set
+    to not inherit the default for the net class which will be 0.25 mm.
+    """
+    sizes = {}
+    for this in board.GetTracks():
+        if type(this) is pcbnew.VIA:
+            size = this.GetWidth()
+            sizes[size] = sizes.get(size, 0) + 1
+            if size == from_size:
+                this.SetDrill(pcbnew.FromMM(to_drill))
+            #else:
+            #    help(this)
+            #    print('Not changing drill {} to {}'.format(this.GetDrill(), to_drill))
+    print("Via 'widths': {}".format(sizes))
 
 def change_netclass_drill_size(board, from_, to_):
     #help(board.GetDesignSettings())
@@ -232,6 +242,7 @@ def main(in_fn='rev03-KiCad/convert.kicad_pcb', out_fn='rev03-KiCad/Cryptech Alp
     fix_layer_In6_aka_GP4(board)
     fix_layer_B_aka_GBL(board)
 
+    change_via_drill_size(board, 1000000, 0.5)
     change_netclass_drill_size(board, 0.635, 0.250)
 
     # Only show a single layer while working on this