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authorFredrik Thulin <fredrik@thulin.net>2016-10-19 21:02:33 +0200
committerFredrik Thulin <fredrik@thulin.net>2016-10-19 21:02:33 +0200
commit11e56869e35e2b307e23d1c0206fc41563662852 (patch)
tree1838edab8d246d31c6912d9b5197df77d5a56fd4
parent519435be35919f81737dd4ba6f1af9717025125d (diff)
saved using kicad, text label added
-rw-r--r--rev03-KiCad/Cryptech Alpha.kicad_pcb81181
1 files changed, 24628 insertions, 56553 deletions
diff --git a/rev03-KiCad/Cryptech Alpha.kicad_pcb b/rev03-KiCad/Cryptech Alpha.kicad_pcb
index 62a2e61..9730422 100644
--- a/rev03-KiCad/Cryptech Alpha.kicad_pcb
+++ b/rev03-KiCad/Cryptech Alpha.kicad_pcb
@@ -1,27 +1,26 @@
-(kicad_pcb (version 4) (host pcbnew "(2014-07-21 BZR 5016)-product")
+(kicad_pcb (version 4) (host pcbnew 4.0.2+dfsg1-stable)
(general
- (links 0)
- (no_connects 0)
- (area 0 0 0 0)
+ (links 1412)
+ (no_connects 729)
+ (area -32.294113 -104.25 148.466654 54.64848)
(thickness 1.6)
- (drawings 1)
- (tracks 0)
+ (drawings 7055)
+ (tracks 9335)
(zones 0)
- (modules 42)
- (nets 304)
+ (modules 385)
+ (nets 303)
)
(page A4)
(layers
(0 F.Cu signal)
- (1 In1.Cu signal)
- (2 In2.Cu signal)
- (3 In3.Cu signal)
- (4 In4.Cu signal)
- (5 In5.Cu signal)
- (6 In6.Cu signal)
-
+ (1 In1.Cu signal)
+ (2 In2.Cu signal)
+ (3 In3.Cu signal)
+ (4 In4.Cu signal)
+ (5 In5.Cu signal)
+ (6 In6.Cu signal)
(31 B.Cu signal)
(32 B.Adhes user)
(33 F.Adhes user)
@@ -41,12 +40,11 @@
(47 F.CrtYd user)
(48 B.Fab user)
(49 F.Fab user)
-
)
(setup
(last_trace_width 0.254)
- (trace_clearance 0.127)
+ (trace_clearance 0.15)
(zone_clearance 0.0144)
(zone_45_only no)
(trace_min 0.254)
@@ -72,7 +70,7 @@
(aux_axis_origin 0 0)
(visible_elements 7FFFF77F)
(pcbplotparams
- (layerselection 262143)
+ (layerselection 0x00030_80000001)
(usegerberextensions false)
(excludeedgelayer true)
(linewidth 0.100000)
@@ -95,52606 +93,29606 @@
(mirror false)
(drillshape 0)
(scaleselection 1)
- (outputdirectory "GerberOutput/"))
+ (outputdirectory GerberOutput/))
)
(net 0 "")
- (net 1 "Net1")
- (net 2 "DM_P")
- (net 3 "DM_N")
- (net 4 "3V3_BATT")
- (net 5 "15V_LDO_ENABLE")
- (net 6 "15V_STABLE")
- (net 7 "GND")
- (net 8 "NetC15_2")
- (net 9 "AMPLIFIED")
- (net 10 "ARM_FPGA_CFG_CS_N")
- (net 11 "ARM_FPGA_CFG_MISO")
- (net 12 "ARM_FPGA_CFG_MOSI")
- (net 13 "ARM_FPGA_CFG_SCLK")
- (net 14 "ARM_LED1")
- (net 15 "ARM_LED2")
- (net 16 "ARM_LED3")
- (net 17 "ARM_LED4")
- (net 18 "AVR_GPIO_0")
- (net 19 "AVR_GPIO_1")
- (net 20 "AVR_GPIO_2")
- (net 21 "AVR_GPIO_3")
- (net 22 "AVR_GPIO_4")
- (net 23 "AVR_GPIO_5")
- (net 24 "AVR_GPIO_6")
- (net 25 "AVR_GPIO_7")
- (net 26 "AVR_GPIO_ARM_0")
- (net 27 "AVR_GPIO_ARM_1")
- (net 28 "AVR_GPIO_ARM_2")
- (net 29 "AVR_GPIO_ARM_3")
- (net 30 "AVR_GPIO_FPGA_0")
- (net 31 "AVR_GPIO_FPGA_1")
- (net 32 "AVR_GPIO_FPGA_2")
- (net 33 "AVR_GPIO_FPGA_3")
- (net 34 "AVR_LED1")
- (net 35 "AVR_LED2")
- (net 36 "AVR_LED3")
- (net 37 "AVR_LED4")
- (net 38 "AVR_PANIC")
- (net 39 "AVR_RESET")
- (net 40 "BOOT0")
- (net 41 "D1_N")
- (net 42 "D1_P")
- (net 43 "DIGITIZED_NOISE")
- (net 44 "FMC_A0")
- (net 45 "FMC_A1")
- (net 46 "FMC_A2")
- (net 47 "FMC_A3")
- (net 48 "FMC_A4")
- (net 49 "FMC_A5")
- (net 50 "FMC_A6")
- (net 51 "FMC_A7")
- (net 52 "FMC_A8")
- (net 53 "FMC_A9")
- (net 54 "FMC_A10")
- (net 55 "FMC_A11")
- (net 56 "FMC_A12")
- (net 57 "FMC_A13")
- (net 58 "FMC_A14")
- (net 59 "FMC_A15")
- (net 60 "FMC_A16")
- (net 61 "FMC_A17")
- (net 62 "FMC_A18")
- (net 63 "FMC_A19")
- (net 64 "FMC_A20")
- (net 65 "FMC_A21")
- (net 66 "FMC_A22")
- (net 67 "FMC_A23")
- (net 68 "FMC_A24")
- (net 69 "FMC_A25")
- (net 70 "FMC_CLK")
- (net 71 "FMC_D0")
- (net 72 "FMC_D1")
- (net 73 "FMC_D2")
- (net 74 "FMC_D3")
- (net 75 "FMC_D4")
- (net 76 "FMC_D5")
- (net 77 "FMC_D6")
- (net 78 "FMC_D7")
- (net 79 "FMC_D8")
- (net 80 "FMC_D9")
- (net 81 "FMC_D10")
- (net 82 "FMC_D11")
- (net 83 "FMC_D12")
- (net 84 "FMC_D13")
- (net 85 "FMC_D14")
- (net 86 "FMC_D15")
- (net 87 "FMC_D16")
- (net 88 "FMC_D17")
- (net 89 "FMC_D18")
- (net 90 "FMC_D19")
- (net 91 "FMC_D20")
- (net 92 "FMC_D21")
- (net 93 "FMC_D22")
- (net 94 "FMC_D23")
- (net 95 "FMC_D24")
- (net 96 "FMC_D25")
- (net 97 "FMC_D26")
- (net 98 "FMC_D27")
- (net 99 "FMC_D28")
- (net 100 "FMC_D29")
- (net 101 "FMC_D30")
- (net 102 "FMC_D31")
- (net 103 "FMC_NBL0")
- (net 104 "FMC_NBL1")
- (net 105 "FMC_NBL2")
- (net 106 "FMC_NBL3")
- (net 107 "FMC_NE1")
- (net 108 "FMC_NL")
- (net 109 "FMC_NOE")
- (net 110 "FMC_NWAIT")
- (net 111 "FMC_NWE")
- (net 112 "FMC_SDCKE0")
- (net 113 "FMC_SDCKE1")
- (net 114 "FMC_SDCLK")
- (net 115 "FMC_SDNCAS")
- (net 116 "FMC_SDNE0")
- (net 117 "FMC_SDNE1")
- (net 118 "FMC_SDNRAS")
- (net 119 "FMC_SDNWE")
- (net 120 "FPGA_CFG_CS_N1")
- (net 121 "FPGA_CFG_CS_N")
- (net 122 "FPGA_CFG_CTRL_ARM_ENA")
- (net 123 "FPGA_CFG_CTRL_FPGA_DIS")
- (net 124 "FPGA_CFG_MISO1")
- (net 125 "FPGA_CFG_MISO")
- (net 126 "FPGA_CFG_MOSI1")
- (net 127 "FPGA_CFG_MOSI")
- (net 128 "FPGA_CFG_SCLK1")
- (net 129 "FPGA_CFG_SCLK")
- (net 130 "FPGA_DONE_INT")
- (net 131 "FPGA_DONE")
- (net 132 "FPGA_ENTROPY_DISABLE")
- (net 133 "FPGA_GCLK")
- (net 134 "FPGA_GPIO_A_0")
- (net 135 "FPGA_GPIO_A_1")
- (net 136 "FPGA_GPIO_A_2")
- (net 137 "FPGA_GPIO_A_3")
- (net 138 "FPGA_GPIO_A_4")
- (net 139 "FPGA_GPIO_A_5")
- (net 140 "FPGA_GPIO_A_6")
- (net 141 "FPGA_GPIO_A_7")
- (net 142 "FPGA_GPIO_B_0")
- (net 143 "FPGA_GPIO_B_1")
- (net 144 "FPGA_GPIO_B_2")
- (net 145 "FPGA_GPIO_B_3")
- (net 146 "FPGA_GPIO_B_4")
- (net 147 "FPGA_GPIO_B_5")
- (net 148 "FPGA_GPIO_B_6")
- (net 149 "FPGA_GPIO_B_7")
- (net 150 "FPGA_GPIO_LED_0")
- (net 151 "FPGA_GPIO_LED_1")
- (net 152 "FPGA_GPIO_LED_2")
- (net 153 "FPGA_GPIO_LED_3")
- (net 154 "FPGA_INIT_B_INT1")
- (net 155 "FPGA_INIT_B_INT")
- (net 156 "FPGA_INIT_B")
- (net 157 "FPGA_IRQ_N_0")
- (net 158 "FPGA_IRQ_N_1")
- (net 159 "FPGA_IRQ_N_2")
- (net 160 "FPGA_IRQ_N_3")
- (net 161 "FPGA_JTAG_TCK")
- (net 162 "FPGA_JTAG_TDI")
- (net 163 "FPGA_JTAG_TDO")
- (net 164 "FPGA_JTAG_TMS")
- (net 165 "FPGA_M0")
- (net 166 "FPGA_M1")
- (net 167 "FPGA_M2")
- (net 168 "FPGA_PROGRAM_B1")
- (net 169 "FPGA_PROGRAM_B")
- (net 170 "FPGA_PROM_CS_N")
- (net 171 "FPGA_PROM_MISO")
- (net 172 "FPGA_PROM_MOSI")
- (net 173 "FPGA_PROM_SCLK")
- (net 174 "FPGA_PROM_W_N")
- (net 175 "FPGA_VCCAUX_1V8")
- (net 176 "FPGA_VCCINT_1V0")
- (net 177 "FT_CTS")
- (net 178 "FT_DTR")
- (net 179 "FT_MGMT_CTS")
- (net 180 "FT_MGMT_DTR")
- (net 181 "FT_MGMT_RTS")
- (net 182 "FT_MGMT_RXD1")
- (net 183 "FT_MGMT_RXD")
- (net 184 "FT_MGMT_TXD1")
- (net 185 "FT_MGMT_TXD")
- (net 186 "FT_MGMT_VCC3V3")
- (net 187 "FT_MGMT_VPHY")
- (net 188 "FT_MGMT_VPLL")
- (net 189 "FT_MGMT_VREGIN")
- (net 190 "FT_REF1")
- (net 191 "FT_REF")
- (net 192 "FT_RESET1")
- (net 193 "FT_RESET")
- (net 194 "FT_RTS")
- (net 195 "FT_RXD1")
- (net 196 "FT_RXD")
- (net 197 "FT_TXD1")
- (net 198 "FT_TXD")
- (net 199 "FT_VCC3V3")
- (net 200 "FT_VCCA1")
- (net 201 "FT_VCCA")
- (net 202 "FT_VCCORE1")
- (net 203 "FT_VCCORE")
- (net 204 "FT_VPHY")
- (net 205 "FT_VPLL")
- (net 206 "FT_VREGIN")
- (net 207 "KSM_PROM_CS_N")
- (net 208 "KSM_PROM_MISO")
- (net 209 "KSM_PROM_MOSI")
- (net 210 "KSM_PROM_SCLK")
- (net 211 "MKM_AVR_CS_N")
- (net 212 "MKM_AVR_MISO")
- (net 213 "MKM_AVR_MOSI")
- (net 214 "MKM_AVR_SCK")
- (net 215 "MKM_CONTROL_AVR_ENA")
- (net 216 "MKM_CONTROL_FPGA_DIS")
- (net 217 "MKM_CS_N")
- (net 218 "MKM_FPGA_CS_N")
- (net 219 "MKM_FPGA_MISO")
- (net 220 "MKM_FPGA_MOSI")
- (net 221 "MKM_FPGA_SCK")
- (net 222 "MKM_MISO")
- (net 223 "MKM_MOSI")
- (net 224 "MKM_SCK")
- (net 225 "NetC5_1")
- (net 226 "NetC11_1")
- (net 227 "NetC12_2")
- (net 228 "NetC17_2")
- (net 229 "NetC70_2")
- (net 230 "NetC71_2")
- (net 231 "NetC75_2")
- (net 232 "NetC78_2")
- (net 233 "NetC90_2")
- (net 234 "NetC93_2")
- (net 235 "NetC115_1")
- (net 236 "NetC116_1")
- (net 237 "NetC117_1")
- (net 238 "NetC117_2")
- (net 239 "NetC118_1")
- (net 240 "NetC118_2")
- (net 241 "NetC207_1")
- (net 242 "NetC208_1")
- (net 243 "NetC208_2")
- (net 244 "NetIC1_3")
- (net 245 "NetJP2_2")
- (net 246 "NetLED1_1")
- (net 247 "NetLED2_1")
- (net 248 "NetLED3_1")
- (net 249 "NetLED4_1")
- (net 250 "NetLED9_1")
- (net 251 "NetLED10_1")
- (net 252 "NetLED11_1")
- (net 253 "NetLED12_1")
- (net 254 "NetLED13_1")
- (net 255 "NetLED14_1")
- (net 256 "NetLED15_1")
- (net 257 "NetLED16_1")
- (net 258 "NetLED17_1")
- (net 259 "NetLED18_1")
- (net 260 "NetLED18_2")
- (net 261 "NetQ1_1")
- (net 262 "NetQ5_1")
- (net 263 "NetQ5_3")
- (net 264 "NetR1_1")
- (net 265 "NetR3_2")
- (net 266 "NetR8_1")
- (net 267 "NetR32_2")
- (net 268 "NetR33_2")
- (net 269 "NetR52_1")
- (net 270 "NetR53_2")
- (net 271 "NetR54_1")
- (net 272 "NetR55_2")
- (net 273 "NetR65_1")
- (net 274 "NetR66_1")
- (net 275 "NetR67_1")
- (net 276 "NOISE_IN")
- (net 277 "NOISE_OUT")
- (net 278 "NRST")
- (net 279 "OSC_IN")
- (net 280 "OSC_OUT")
- (net 281 "POK_VCCAUX")
- (net 282 "POK_VCCINT")
- (net 283 "POK_VCCO")
- (net 284 "PWR_18V")
- (net 285 "PWR_ENA_VCCAUX")
- (net 286 "PWR_ENA_VCCINT")
- (net 287 "PWR_ENA_VCCO")
- (net 288 "RAW_NOISE")
- (net 289 "RTC_MFP")
- (net 290 "RTC_SCL")
- (net 291 "RTC_SDA")
- (net 292 "SPI_A_TRISTATE")
- (net 293 "SPI_B_TRISTATE")
- (net 294 "SWDCLK")
- (net 295 "SWDIO")
- (net 296 "USB_MGMT_N")
- (net 297 "USB_MGMT_P")
- (net 298 "USB_N")
- (net 299 "USB_P")
- (net 300 "VCAP1")
- (net 301 "VCAP2")
- (net 302 "VCC_5V0")
- (net 303 "VCCO_3V3")
-
-
+ (net 1 DM_P)
+ (net 2 DM_N)
+ (net 3 3V3_BATT)
+ (net 4 15V_LDO_ENABLE)
+ (net 5 15V_STABLE)
+ (net 6 GND)
+ (net 7 NetC15_2)
+ (net 8 AMPLIFIED)
+ (net 9 ARM_FPGA_CFG_CS_N)
+ (net 10 ARM_FPGA_CFG_MISO)
+ (net 11 ARM_FPGA_CFG_MOSI)
+ (net 12 ARM_FPGA_CFG_SCLK)
+ (net 13 ARM_LED1)
+ (net 14 ARM_LED2)
+ (net 15 ARM_LED3)
+ (net 16 ARM_LED4)
+ (net 17 AVR_GPIO_0)
+ (net 18 AVR_GPIO_1)
+ (net 19 AVR_GPIO_2)
+ (net 20 AVR_GPIO_3)
+ (net 21 AVR_GPIO_4)
+ (net 22 AVR_GPIO_5)
+ (net 23 AVR_GPIO_6)
+ (net 24 AVR_GPIO_7)
+ (net 25 AVR_GPIO_ARM_0)
+ (net 26 AVR_GPIO_ARM_1)
+ (net 27 AVR_GPIO_ARM_2)
+ (net 28 AVR_GPIO_ARM_3)
+ (net 29 AVR_GPIO_FPGA_0)
+ (net 30 AVR_GPIO_FPGA_1)
+ (net 31 AVR_GPIO_FPGA_2)
+ (net 32 AVR_GPIO_FPGA_3)
+ (net 33 AVR_LED1)
+ (net 34 AVR_LED2)
+ (net 35 AVR_LED3)
+ (net 36 AVR_LED4)
+ (net 37 AVR_PANIC)
+ (net 38 AVR_RESET)
+ (net 39 BOOT0)
+ (net 40 D1_N)
+ (net 41 D1_P)
+ (net 42 DIGITIZED_NOISE)
+ (net 43 FMC_A0)
+ (net 44 FMC_A1)
+ (net 45 FMC_A2)
+ (net 46 FMC_A3)
+ (net 47 FMC_A4)
+ (net 48 FMC_A5)
+ (net 49 FMC_A6)
+ (net 50 FMC_A7)
+ (net 51 FMC_A8)
+ (net 52 FMC_A9)
+ (net 53 FMC_A10)
+ (net 54 FMC_A11)
+ (net 55 FMC_A12)
+ (net 56 FMC_A13)
+ (net 57 FMC_A14)
+ (net 58 FMC_A15)
+ (net 59 FMC_A16)
+ (net 60 FMC_A17)
+ (net 61 FMC_A18)
+ (net 62 FMC_A19)
+ (net 63 FMC_A20)
+ (net 64 FMC_A21)
+ (net 65 FMC_A22)
+ (net 66 FMC_A23)
+ (net 67 FMC_A24)
+ (net 68 FMC_A25)
+ (net 69 FMC_CLK)
+ (net 70 FMC_D0)
+ (net 71 FMC_D1)
+ (net 72 FMC_D2)
+ (net 73 FMC_D3)
+ (net 74 FMC_D4)
+ (net 75 FMC_D5)
+ (net 76 FMC_D6)
+ (net 77 FMC_D7)
+ (net 78 FMC_D8)
+ (net 79 FMC_D9)
+ (net 80 FMC_D10)
+ (net 81 FMC_D11)
+ (net 82 FMC_D12)
+ (net 83 FMC_D13)
+ (net 84 FMC_D14)
+ (net 85 FMC_D15)
+ (net 86 FMC_D16)
+ (net 87 FMC_D17)
+ (net 88 FMC_D18)
+ (net 89 FMC_D19)
+ (net 90 FMC_D20)
+ (net 91 FMC_D21)
+ (net 92 FMC_D22)
+ (net 93 FMC_D23)
+ (net 94 FMC_D24)
+ (net 95 FMC_D25)
+ (net 96 FMC_D26)
+ (net 97 FMC_D27)
+ (net 98 FMC_D28)
+ (net 99 FMC_D29)
+ (net 100 FMC_D30)
+ (net 101 FMC_D31)
+ (net 102 FMC_NBL0)
+ (net 103 FMC_NBL1)
+ (net 104 FMC_NBL2)
+ (net 105 FMC_NBL3)
+ (net 106 FMC_NE1)
+ (net 107 FMC_NL)
+ (net 108 FMC_NOE)
+ (net 109 FMC_NWAIT)
+ (net 110 FMC_NWE)
+ (net 111 FMC_SDCKE0)
+ (net 112 FMC_SDCKE1)
+ (net 113 FMC_SDCLK)
+ (net 114 FMC_SDNCAS)
+ (net 115 FMC_SDNE0)
+ (net 116 FMC_SDNE1)
+ (net 117 FMC_SDNRAS)
+ (net 118 FMC_SDNWE)
+ (net 119 FPGA_CFG_CS_N1)
+ (net 120 FPGA_CFG_CS_N)
+ (net 121 FPGA_CFG_CTRL_ARM_ENA)
+ (net 122 FPGA_CFG_CTRL_FPGA_DIS)
+ (net 123 FPGA_CFG_MISO1)
+ (net 124 FPGA_CFG_MISO)
+ (net 125 FPGA_CFG_MOSI1)
+ (net 126 FPGA_CFG_MOSI)
+ (net 127 FPGA_CFG_SCLK1)
+ (net 128 FPGA_CFG_SCLK)
+ (net 129 FPGA_DONE_INT)
+ (net 130 FPGA_DONE)
+ (net 131 FPGA_ENTROPY_DISABLE)
+ (net 132 FPGA_GCLK)
+ (net 133 FPGA_GPIO_A_0)
+ (net 134 FPGA_GPIO_A_1)
+ (net 135 FPGA_GPIO_A_2)
+ (net 136 FPGA_GPIO_A_3)
+ (net 137 FPGA_GPIO_A_4)
+ (net 138 FPGA_GPIO_A_5)
+ (net 139 FPGA_GPIO_A_6)
+ (net 140 FPGA_GPIO_A_7)
+ (net 141 FPGA_GPIO_B_0)
+ (net 142 FPGA_GPIO_B_1)
+ (net 143 FPGA_GPIO_B_2)
+ (net 144 FPGA_GPIO_B_3)
+ (net 145 FPGA_GPIO_B_4)
+ (net 146 FPGA_GPIO_B_5)
+ (net 147 FPGA_GPIO_B_6)
+ (net 148 FPGA_GPIO_B_7)
+ (net 149 FPGA_GPIO_LED_0)
+ (net 150 FPGA_GPIO_LED_1)
+ (net 151 FPGA_GPIO_LED_2)
+ (net 152 FPGA_GPIO_LED_3)
+ (net 153 FPGA_INIT_B_INT1)
+ (net 154 FPGA_INIT_B_INT)
+ (net 155 FPGA_INIT_B)
+ (net 156 FPGA_IRQ_N_0)
+ (net 157 FPGA_IRQ_N_1)
+ (net 158 FPGA_IRQ_N_2)
+ (net 159 FPGA_IRQ_N_3)
+ (net 160 FPGA_JTAG_TCK)
+ (net 161 FPGA_JTAG_TDI)
+ (net 162 FPGA_JTAG_TDO)
+ (net 163 FPGA_JTAG_TMS)
+ (net 164 FPGA_M0)
+ (net 165 FPGA_M1)
+ (net 166 FPGA_M2)
+ (net 167 FPGA_PROGRAM_B1)
+ (net 168 FPGA_PROGRAM_B)
+ (net 169 FPGA_PROM_CS_N)
+ (net 170 FPGA_PROM_MISO)
+ (net 171 FPGA_PROM_MOSI)
+ (net 172 FPGA_PROM_SCLK)
+ (net 173 FPGA_PROM_W_N)
+ (net 174 FPGA_VCCAUX_1V8)
+ (net 175 FPGA_VCCINT_1V0)
+ (net 176 FT_CTS)
+ (net 177 FT_DTR)
+ (net 178 FT_MGMT_CTS)
+ (net 179 FT_MGMT_DTR)
+ (net 180 FT_MGMT_RTS)
+ (net 181 FT_MGMT_RXD1)
+ (net 182 FT_MGMT_RXD)
+ (net 183 FT_MGMT_TXD1)
+ (net 184 FT_MGMT_TXD)
+ (net 185 FT_MGMT_VCC3V3)
+ (net 186 FT_MGMT_VPHY)
+ (net 187 FT_MGMT_VPLL)
+ (net 188 FT_MGMT_VREGIN)
+ (net 189 FT_REF1)
+ (net 190 FT_REF)
+ (net 191 FT_RESET1)
+ (net 192 FT_RESET)
+ (net 193 FT_RTS)
+ (net 194 FT_RXD1)
+ (net 195 FT_RXD)
+ (net 196 FT_TXD1)
+ (net 197 FT_TXD)
+ (net 198 FT_VCC3V3)
+ (net 199 FT_VCCA1)
+ (net 200 FT_VCCA)
+ (net 201 FT_VCCORE1)
+ (net 202 FT_VCCORE)
+ (net 203 FT_VPHY)
+ (net 204 FT_VPLL)
+ (net 205 FT_VREGIN)
+ (net 206 KSM_PROM_CS_N)
+ (net 207 KSM_PROM_MISO)
+ (net 208 KSM_PROM_MOSI)
+ (net 209 KSM_PROM_SCLK)
+ (net 210 MKM_AVR_CS_N)
+ (net 211 MKM_AVR_MISO)
+ (net 212 MKM_AVR_MOSI)
+ (net 213 MKM_AVR_SCK)
+ (net 214 MKM_CONTROL_AVR_ENA)
+ (net 215 MKM_CONTROL_FPGA_DIS)
+ (net 216 MKM_CS_N)
+ (net 217 MKM_FPGA_CS_N)
+ (net 218 MKM_FPGA_MISO)
+ (net 219 MKM_FPGA_MOSI)
+ (net 220 MKM_FPGA_SCK)
+ (net 221 MKM_MISO)
+ (net 222 MKM_MOSI)
+ (net 223 MKM_SCK)
+ (net 224 NetC5_1)
+ (net 225 NetC11_1)
+ (net 226 NetC12_2)
+ (net 227 NetC17_2)
+ (net 228 NetC70_2)
+ (net 229 NetC71_2)
+ (net 230 NetC75_2)
+ (net 231 NetC78_2)
+ (net 232 NetC90_2)
+ (net 233 NetC93_2)
+ (net 234 NetC115_1)
+ (net 235 NetC116_1)
+ (net 236 NetC117_1)
+ (net 237 NetC117_2)
+ (net 238 NetC118_1)
+ (net 239 NetC118_2)
+ (net 240 NetC207_1)
+ (net 241 NetC208_1)
+ (net 242 NetC208_2)
+ (net 243 NetIC1_3)
+ (net 244 NetJP2_2)
+ (net 245 NetLED1_1)
+ (net 246 NetLED2_1)
+ (net 247 NetLED3_1)
+ (net 248 NetLED4_1)
+ (net 249 NetLED9_1)
+ (net 250 NetLED10_1)
+ (net 251 NetLED11_1)
+ (net 252 NetLED12_1)
+ (net 253 NetLED13_1)
+ (net 254 NetLED14_1)
+ (net 255 NetLED15_1)
+ (net 256 NetLED16_1)
+ (net 257 NetLED17_1)
+ (net 258 NetLED18_1)
+ (net 259 NetLED18_2)
+ (net 260 NetQ1_1)
+ (net 261 NetQ5_1)
+ (net 262 NetQ5_3)
+ (net 263 NetR1_1)
+ (net 264 NetR3_2)
+ (net 265 NetR8_1)
+ (net 266 NetR32_2)
+ (net 267 NetR33_2)
+ (net 268 NetR52_1)
+ (net 269 NetR53_2)
+ (net 270 NetR54_1)
+ (net 271 NetR55_2)
+ (net 272 NetR65_1)
+ (net 273 NetR66_1)
+ (net 274 NetR67_1)
+ (net 275 NOISE_IN)
+ (net 276 NOISE_OUT)
+ (net 277 NRST)
+ (net 278 OSC_IN)
+ (net 279 OSC_OUT)
+ (net 280 POK_VCCAUX)
+ (net 281 POK_VCCINT)
+ (net 282 POK_VCCO)
+ (net 283 PWR_18V)
+ (net 284 PWR_ENA_VCCAUX)
+ (net 285 PWR_ENA_VCCINT)
+ (net 286 PWR_ENA_VCCO)
+ (net 287 RAW_NOISE)
+ (net 288 RTC_MFP)
+ (net 289 RTC_SCL)
+ (net 290 RTC_SDA)
+ (net 291 SPI_A_TRISTATE)
+ (net 292 SPI_B_TRISTATE)
+ (net 293 SWDCLK)
+ (net 294 SWDIO)
+ (net 295 USB_MGMT_N)
+ (net 296 USB_MGMT_P)
+ (net 297 USB_N)
+ (net 298 USB_P)
+ (net 299 VCAP1)
+ (net 300 VCAP2)
+ (net 301 VCC_5V0)
+ (net 302 VCCO_3V3)
+
(net_class Default "This is the default net class."
- (clearance 0.150000)
- (trace_width 0.254000)
+ (clearance 0.15)
+ (trace_width 0.254)
(via_dia 0.889)
(via_drill 0.635)
(uvia_dia 0.508)
(uvia_drill 0.127)
- (add_net Net1)
- )
-
- (net_class FMC "FMC"
- (clearance 0.150000)
- (trace_width 0.254000)
+ (add_net 15V_LDO_ENABLE)
+ (add_net 15V_STABLE)
+ (add_net 3V3_BATT)
+ (add_net AMPLIFIED)
+ (add_net ARM_FPGA_CFG_CS_N)
+ (add_net ARM_FPGA_CFG_MISO)
+ (add_net ARM_FPGA_CFG_MOSI)
+ (add_net ARM_FPGA_CFG_SCLK)
+ (add_net ARM_LED1)
+ (add_net ARM_LED2)
+ (add_net ARM_LED3)
+ (add_net ARM_LED4)
+ (add_net AVR_GPIO_0)
+ (add_net AVR_GPIO_1)
+ (add_net AVR_GPIO_2)
+ (add_net AVR_GPIO_3)
+ (add_net AVR_GPIO_4)
+ (add_net AVR_GPIO_5)
+ (add_net AVR_GPIO_6)
+ (add_net AVR_GPIO_7)
+ (add_net AVR_GPIO_ARM_0)
+ (add_net AVR_GPIO_ARM_1)
+ (add_net AVR_GPIO_ARM_2)
+ (add_net AVR_GPIO_ARM_3)
+ (add_net AVR_GPIO_FPGA_0)
+ (add_net AVR_GPIO_FPGA_1)
+ (add_net AVR_GPIO_FPGA_2)
+ (add_net AVR_GPIO_FPGA_3)
+ (add_net AVR_LED1)
+ (add_net AVR_LED2)
+ (add_net AVR_LED3)
+ (add_net AVR_LED4)
+ (add_net AVR_PANIC)
+ (add_net AVR_RESET)
+ (add_net BOOT0)
+ (add_net DIGITIZED_NOISE)
+ (add_net FPGA_CFG_CS_N)
+ (add_net FPGA_CFG_CS_N1)
+ (add_net FPGA_CFG_CTRL_ARM_ENA)
+ (add_net FPGA_CFG_CTRL_FPGA_DIS)
+ (add_net FPGA_CFG_MISO)
+ (add_net FPGA_CFG_MISO1)
+ (add_net FPGA_CFG_MOSI)
+ (add_net FPGA_CFG_MOSI1)
+ (add_net FPGA_CFG_SCLK)
+ (add_net FPGA_CFG_SCLK1)
+ (add_net FPGA_DONE)
+ (add_net FPGA_DONE_INT)
+ (add_net FPGA_ENTROPY_DISABLE)
+ (add_net FPGA_GCLK)
+ (add_net FPGA_GPIO_LED_0)
+ (add_net FPGA_GPIO_LED_1)
+ (add_net FPGA_GPIO_LED_2)
+ (add_net FPGA_GPIO_LED_3)
+ (add_net FPGA_INIT_B)
+ (add_net FPGA_INIT_B_INT)
+ (add_net FPGA_INIT_B_INT1)
+ (add_net FPGA_IRQ_N_0)
+ (add_net FPGA_IRQ_N_1)
+ (add_net FPGA_IRQ_N_2)
+ (add_net FPGA_IRQ_N_3)
+ (add_net FPGA_JTAG_TCK)
+ (add_net FPGA_JTAG_TDI)
+ (add_net FPGA_JTAG_TDO)
+ (add_net FPGA_JTAG_TMS)
+ (add_net FPGA_M0)
+ (add_net FPGA_M1)
+ (add_net FPGA_M2)
+ (add_net FPGA_PROGRAM_B)
+ (add_net FPGA_PROGRAM_B1)
+ (add_net FPGA_PROM_CS_N)
+ (add_net FPGA_PROM_MISO)
+ (add_net FPGA_PROM_MOSI)
+ (add_net FPGA_PROM_SCLK)
+ (add_net FPGA_PROM_W_N)
+ (add_net FPGA_VCCAUX_1V8)
+ (add_net FPGA_VCCINT_1V0)
+ (add_net FT_CTS)
+ (add_net FT_DTR)
+ (add_net FT_MGMT_CTS)
+ (add_net FT_MGMT_DTR)
+ (add_net FT_MGMT_RTS)
+ (add_net FT_MGMT_RXD)
+ (add_net FT_MGMT_RXD1)
+ (add_net FT_MGMT_TXD)
+ (add_net FT_MGMT_TXD1)
+ (add_net FT_MGMT_VCC3V3)
+ (add_net FT_MGMT_VPHY)
+ (add_net FT_MGMT_VPLL)
+ (add_net FT_MGMT_VREGIN)
+ (add_net FT_REF)
+ (add_net FT_REF1)
+ (add_net FT_RESET)
+ (add_net FT_RESET1)
+ (add_net FT_RTS)
+ (add_net FT_RXD)
+ (add_net FT_RXD1)
+ (add_net FT_TXD)
+ (add_net FT_TXD1)
+ (add_net FT_VCC3V3)
+ (add_net FT_VCCA)
+ (add_net FT_VCCA1)
+ (add_net FT_VCCORE)
+ (add_net FT_VCCORE1)
+ (add_net FT_VPHY)
+ (add_net FT_VPLL)
+ (add_net FT_VREGIN)
+ (add_net GND)
+ (add_net KSM_PROM_CS_N)
+ (add_net KSM_PROM_MISO)
+ (add_net KSM_PROM_MOSI)
+ (add_net KSM_PROM_SCLK)
+ (add_net MKM_AVR_CS_N)
+ (add_net MKM_AVR_MISO)
+ (add_net MKM_AVR_MOSI)
+ (add_net MKM_AVR_SCK)
+ (add_net MKM_CONTROL_AVR_ENA)
+ (add_net MKM_CONTROL_FPGA_DIS)
+ (add_net MKM_CS_N)
+ (add_net MKM_FPGA_CS_N)
+ (add_net MKM_FPGA_MISO)
+ (add_net MKM_FPGA_MOSI)
+ (add_net MKM_FPGA_SCK)
+ (add_net MKM_MISO)
+ (add_net MKM_MOSI)
+ (add_net MKM_SCK)
+ (add_net NOISE_IN)
+ (add_net NOISE_OUT)
+ (add_net NRST)
+ (add_net NetC115_1)
+ (add_net NetC116_1)
+ (add_net NetC117_1)
+ (add_net NetC117_2)
+ (add_net NetC118_1)
+ (add_net NetC118_2)
+ (add_net NetC11_1)
+ (add_net NetC12_2)
+ (add_net NetC15_2)
+ (add_net NetC17_2)
+ (add_net NetC207_1)
+ (add_net NetC208_1)
+ (add_net NetC208_2)
+ (add_net NetC5_1)
+ (add_net NetC70_2)
+ (add_net NetC71_2)
+ (add_net NetC75_2)
+ (add_net NetC78_2)
+ (add_net NetC90_2)
+ (add_net NetC93_2)
+ (add_net NetIC1_3)
+ (add_net NetJP2_2)
+ (add_net NetLED10_1)
+ (add_net NetLED11_1)
+ (add_net NetLED12_1)
+ (add_net NetLED13_1)
+ (add_net NetLED14_1)
+ (add_net NetLED15_1)
+ (add_net NetLED16_1)
+ (add_net NetLED17_1)
+ (add_net NetLED18_1)
+ (add_net NetLED18_2)
+ (add_net NetLED1_1)
+ (add_net NetLED2_1)
+ (add_net NetLED3_1)
+ (add_net NetLED4_1)
+ (add_net NetLED9_1)
+ (add_net NetQ1_1)
+ (add_net NetQ5_1)
+ (add_net NetQ5_3)
+ (add_net NetR1_1)
+ (add_net NetR32_2)
+ (add_net NetR33_2)
+ (add_net NetR3_2)
+ (add_net NetR52_1)
+ (add_net NetR53_2)
+ (add_net NetR54_1)
+ (add_net NetR55_2)
+ (add_net NetR65_1)
+ (add_net NetR66_1)
+ (add_net NetR67_1)
+ (add_net NetR8_1)
+ (add_net OSC_IN)
+ (add_net OSC_OUT)
+ (add_net POK_VCCAUX)
+ (add_net POK_VCCINT)
+ (add_net POK_VCCO)
+ (add_net PWR_18V)
+ (add_net PWR_ENA_VCCAUX)
+ (add_net PWR_ENA_VCCINT)
+ (add_net PWR_ENA_VCCO)
+ (add_net RAW_NOISE)
+ (add_net RTC_MFP)
+ (add_net RTC_SCL)
+ (add_net RTC_SDA)
+ (add_net SPI_A_TRISTATE)
+ (add_net SPI_B_TRISTATE)
+ (add_net SWDCLK)
+ (add_net SWDIO)
+ (add_net VCAP1)
+ (add_net VCAP2)
+ (add_net VCCO_3V3)
+ (add_net VCC_5V0)
+ )
+
+ (net_class FMC FMC
+ (clearance 0.15)
+ (trace_width 0.254)
(via_dia 0.889)
(via_drill 0.635)
(uvia_dia 0.508)
(uvia_drill 0.127)
- (add_net "FMC_A0")
- (add_net "FMC_A1")
- (add_net "FMC_A10")
- (add_net "FMC_A11")
- (add_net "FMC_A12")
- (add_net "FMC_A13")
- (add_net "FMC_A14")
- (add_net "FMC_A15")
- (add_net "FMC_A16")
- (add_net "FMC_A17")
- (add_net "FMC_A18")
- (add_net "FMC_A19")
- (add_net "FMC_A2")
- (add_net "FMC_A20")
- (add_net "FMC_A21")
- (add_net "FMC_A22")
- (add_net "FMC_A23")
- (add_net "FMC_A24")
- (add_net "FMC_A25")
- (add_net "FMC_A3")
- (add_net "FMC_A4")
- (add_net "FMC_A5")
- (add_net "FMC_A6")
- (add_net "FMC_A7")
- (add_net "FMC_A8")
- (add_net "FMC_A9")
- (add_net "FMC_CLK")
- (add_net "FMC_D0")
- (add_net "FMC_D1")
- (add_net "FMC_D10")
- (add_net "FMC_D11")
- (add_net "FMC_D12")
- (add_net "FMC_D13")
- (add_net "FMC_D14")
- (add_net "FMC_D15")
- (add_net "FMC_D16")
- (add_net "FMC_D17")
- (add_net "FMC_D18")
- (add_net "FMC_D19")
- (add_net "FMC_D2")
- (add_net "FMC_D20")
- (add_net "FMC_D21")
- (add_net "FMC_D22")
- (add_net "FMC_D23")
- (add_net "FMC_D24")
- (add_net "FMC_D25")
- (add_net "FMC_D26")
- (add_net "FMC_D27")
- (add_net "FMC_D28")
- (add_net "FMC_D29")
- (add_net "FMC_D3")
- (add_net "FMC_D30")
- (add_net "FMC_D31")
- (add_net "FMC_D4")
- (add_net "FMC_D5")
- (add_net "FMC_D6")
- (add_net "FMC_D7")
- (add_net "FMC_D8")
- (add_net "FMC_D9")
- (add_net "FMC_NBL0")
- (add_net "FMC_NBL1")
- (add_net "FMC_NBL2")
- (add_net "FMC_NBL3")
- (add_net "FMC_NE1")
- (add_net "FMC_NL")
- (add_net "FMC_NOE")
- (add_net "FMC_NWAIT")
- (add_net "FMC_NWE")
- (add_net "FMC_SDCKE0")
- (add_net "FMC_SDCKE1")
- (add_net "FMC_SDCLK")
- (add_net "FMC_SDNCAS")
- (add_net "FMC_SDNE0")
- (add_net "FMC_SDNE1")
- (add_net "FMC_SDNRAS")
- (add_net "FMC_SDNWE")
- )
- (net_class FPGA_GPIO "FPGA_GPIO"
- (clearance 0.150000)
- (trace_width 0.254000)
+ (add_net FMC_A0)
+ (add_net FMC_A1)
+ (add_net FMC_A10)
+ (add_net FMC_A11)
+ (add_net FMC_A12)
+ (add_net FMC_A13)
+ (add_net FMC_A14)
+ (add_net FMC_A15)
+ (add_net FMC_A16)
+ (add_net FMC_A17)
+ (add_net FMC_A18)
+ (add_net FMC_A19)
+ (add_net FMC_A2)
+ (add_net FMC_A20)
+ (add_net FMC_A21)
+ (add_net FMC_A22)
+ (add_net FMC_A23)
+ (add_net FMC_A24)
+ (add_net FMC_A25)
+ (add_net FMC_A3)
+ (add_net FMC_A4)
+ (add_net FMC_A5)
+ (add_net FMC_A6)
+ (add_net FMC_A7)
+ (add_net FMC_A8)
+ (add_net FMC_A9)
+ (add_net FMC_CLK)
+ (add_net FMC_D0)
+ (add_net FMC_D1)
+ (add_net FMC_D10)
+ (add_net FMC_D11)
+ (add_net FMC_D12)
+ (add_net FMC_D13)
+ (add_net FMC_D14)
+ (add_net FMC_D15)
+ (add_net FMC_D16)
+ (add_net FMC_D17)
+ (add_net FMC_D18)
+ (add_net FMC_D19)
+ (add_net FMC_D2)
+ (add_net FMC_D20)
+ (add_net FMC_D21)
+ (add_net FMC_D22)
+ (add_net FMC_D23)
+ (add_net FMC_D24)
+ (add_net FMC_D25)
+ (add_net FMC_D26)
+ (add_net FMC_D27)
+ (add_net FMC_D28)
+ (add_net FMC_D29)
+ (add_net FMC_D3)
+ (add_net FMC_D30)
+ (add_net FMC_D31)
+ (add_net FMC_D4)
+ (add_net FMC_D5)
+ (add_net FMC_D6)
+ (add_net FMC_D7)
+ (add_net FMC_D8)
+ (add_net FMC_D9)
+ (add_net FMC_NBL0)
+ (add_net FMC_NBL1)
+ (add_net FMC_NBL2)
+ (add_net FMC_NBL3)
+ (add_net FMC_NE1)
+ (add_net FMC_NL)
+ (add_net FMC_NOE)
+ (add_net FMC_NWAIT)
+ (add_net FMC_NWE)
+ (add_net FMC_SDCKE0)
+ (add_net FMC_SDCKE1)
+ (add_net FMC_SDCLK)
+ (add_net FMC_SDNCAS)
+ (add_net FMC_SDNE0)
+ (add_net FMC_SDNE1)
+ (add_net FMC_SDNRAS)
+ (add_net FMC_SDNWE)
+ )
+
+ (net_class FPGA_GPIO FPGA_GPIO
+ (clearance 0.15)
+ (trace_width 0.254)
(via_dia 0.889)
(via_drill 0.635)
(uvia_dia 0.508)
(uvia_drill 0.127)
- (add_net "FPGA_GPIO_A_0")
- (add_net "FPGA_GPIO_A_1")
- (add_net "FPGA_GPIO_A_2")
- (add_net "FPGA_GPIO_A_3")
- (add_net "FPGA_GPIO_A_4")
- (add_net "FPGA_GPIO_A_5")
- (add_net "FPGA_GPIO_A_6")
- (add_net "FPGA_GPIO_A_7")
- (add_net "FPGA_GPIO_B_0")
- (add_net "FPGA_GPIO_B_1")
- (add_net "FPGA_GPIO_B_2")
- (add_net "FPGA_GPIO_B_3")
- (add_net "FPGA_GPIO_B_4")
- (add_net "FPGA_GPIO_B_5")
- (add_net "FPGA_GPIO_B_6")
- (add_net "FPGA_GPIO_B_7")
- )
- (net_class USB "USB"
- (clearance 0.150000)
- (trace_width 0.254000)
+ (add_net FPGA_GPIO_A_0)
+ (add_net FPGA_GPIO_A_1)
+ (add_net FPGA_GPIO_A_2)
+ (add_net FPGA_GPIO_A_3)
+ (add_net FPGA_GPIO_A_4)
+ (add_net FPGA_GPIO_A_5)
+ (add_net FPGA_GPIO_A_6)
+ (add_net FPGA_GPIO_A_7)
+ (add_net FPGA_GPIO_B_0)
+ (add_net FPGA_GPIO_B_1)
+ (add_net FPGA_GPIO_B_2)
+ (add_net FPGA_GPIO_B_3)
+ (add_net FPGA_GPIO_B_4)
+ (add_net FPGA_GPIO_B_5)
+ (add_net FPGA_GPIO_B_6)
+ (add_net FPGA_GPIO_B_7)
+ )
+
+ (net_class USB USB
+ (clearance 0.15)
+ (trace_width 0.254)
(via_dia 0.889)
(via_drill 0.635)
(uvia_dia 0.508)
(uvia_drill 0.127)
- (add_net "D1_N")
- (add_net "D1_P")
- (add_net "DM_N")
- (add_net "DM_P")
- (add_net "USB_MGMT_N")
- (add_net "USB_MGMT_P")
- (add_net "USB_N")
- (add_net "USB_P")
- )
-#ComponentBodies#0: 0C83030000450C00FFFFFFFF6A00FFFFFFFF0000000000 V7_LAYER=MECHANICAL13|NAME= |KIND=0|SUBPOLYINDEX=-1|UNIONINDEX=0|ARCRESOLUTION=0.5mil|ISSHAPEBASED=FALSE|CAVITYHEIGHT=0mil|STANDOFFHEIGHT=0mil|OVERALLHEIGHT=7.9528mil|BODYPROJECTION=1|ARCRESOLUTION=0.5mil|BODYCOLOR3D=8421504|BODYOPACITY3D=1.000|IDENTIFIER=83,87,51,100,80,83,45,48,52,48,50,32,83,77,68,32,67,97,112,97,99,105,116,111,114|TEXTURE=|TEXTURECENTERX=0mil|TEXTURECENTERY=0mil|TEXTURESIZEX=0mil|TEXTURESIZEY=0mil|TEXTUREROTATION= 9.00000000000000E+0001|MODELID={ECAF1ED8-FCC0-4738-A947-200F4027AE60}|MODEL.CHECKSUM=1351519988|MODEL.EMBED=TRUE|MODEL.NAME=SW3dPS-0402 SMD Capacitor.STEP|MODEL.2D.X=9110.1575mil|MODEL.2D.Y=2205.3543mil|MODEL.2D.ROTATION=0.000|MODEL.3D.ROTX=90.000|MODEL.3D.ROTY=0.000|MODEL.3D.ROTZ=90.000|MODEL.3D.DZ=0mil|MODEL.SNAPCOUNT=0|MODEL.MODELTYPE=1|MODEL.MODELSOURCE=Undefined
-#$pads{106}
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-#$pads{359}
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-#$pads{358}
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-#$pads{243}
-#Now handling Shape Based Bodies ...
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-(gr_line (start 31.20000 9.00000) (end 31.80000 9.00000) (angle 90) (layer F.CrtYd) (width 0.2))
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-#ncoords: 4
-#ShapeBasedAdhesiveLine
-(gr_line (start 15.71000 -33.27500) (end 15.71000 -25.65500) (angle 90) (layer F.CrtYd) (width 0.2))
-#ShapeBasedAdhesiveLine
-(gr_line (start 15.71000 -25.65500) (end 20.79000 -25.65500) (angle 90) (layer F.CrtYd) (width 0.2))
-#ShapeBasedAdhesiveLine
-(gr_line (start 20.79000 -25.65500) (end 20.79000 -33.27500) (angle 90) (layer F.CrtYd) (width 0.2))
-#ShapeBasedAdhesiveLine
-(gr_line (start 20.79000 -33.27500) (end 15.71000 -33.27500) (angle 90) (layer F.CrtYd) (width 0.2))
-#Components#0: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9110.1575mil|Y=2303.7795mil|PATTERN=HDR1X10|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=6|SOURCEDESIGNATOR=JP5|SOURCEUNIQUEID=\XAITQOUL|SOURCEHIERARCHICALPATH=rev02_11|SOURCEFOOTPRINTLIBRARY=rev02.PcbLib|SOURCECOMPONENTLIBRARY=SparkFun-Connectors.IntLib|SOURCELIBREFERENCE=M10LOCK|SOURCEDESCRIPTION=Standard 10-pin 0.1" header. Use with straight break away headers (SKU : PRT-00116), right angle break away headers (PRT-00553), swiss pins (PRT-00743), machine pins (PRT-00117), and female headers (PRT-00115).|FOOTPRINTDESCRIPTION=Connector; Header; 10 Position|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=ATAMVMMC|JUMPERSVISIBLE=TRUE
-#$pads{0}
- (module "HDR1X10" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (add_net D1_N)
+ (add_net D1_P)
+ (add_net DM_N)
+ (add_net DM_P)
+ (add_net USB_MGMT_N)
+ (add_net USB_MGMT_P)
+ (add_net USB_N)
+ (add_net USB_P)
+ )
+
+ (module HDR1X10 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 31.5 6.000001)
(path /539EEC0F)
(attr smd)
- (fp_text reference "JP5" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference JP5 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "Connector; Header; 10 Position" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:0 pos:0(0x0) type:1 net:17
-#010000000005000000047C267C300100000000AA0000004A0C001100FFFF0000FFFFFFFF079E8C0563875F01D7020900D7020900D7020900D7020900D7020900D7020900E501060001010100000000000000000100000000000001F200030004007980010079800100798001001BB3FFFFE54C000000000101010101010101010000000000000000000F0003010000
- (pad "3" thru_hole circle (at 5.08000 -0.00000) (size 1.4999995 1.4999995) (drill 1.0000005)
- (layers F.Cu B.Cu F.Mask F.Paste B.Mask B.Paste) (net 19 "AVR_GPIO_1")
- )
-#1309 counter:1 pos:204(0xCC) type:1 net:5
-#010000000005000000047C267C300100000000AA0000004A0C000500FFFF0000FFFFFFFFC76DF70563875F01D7020900D7020900D7020900D7020900D7020900D7020900E501060001010100000000000000000100000000000001F200030004007980010079800100798001001BB3FFFFE54C000007000101010101010101010000000000000000000F0003010000
- (pad "10" thru_hole circle (at 22.86000 -0.00000) (size 1.4999995 1.4999995) (drill 1.0000005)
- (layers F.Cu B.Cu F.Mask F.Paste B.Mask B.Paste) (net 7 "GND")
- )
-#1309 counter:2 pos:409(0x199) type:1 net:23
-#010000000005000000047C267C300100000000AA0000004A0C001700FFFF0000FFFFFFFF872BE80563875F01D7020900D7020900D7020900D7020900D7020900D7020900E501060001010100000000000000000100000000000001F200030004007980010079800100798001001BB3FFFFE54C000000000101010101010101010000000000000000000F0003010000
- (pad "9" thru_hole circle (at 20.32000 -0.00000) (size 1.4999995 1.4999995) (drill 1.0000005)
- (layers F.Cu B.Cu F.Mask F.Paste B.Mask B.Paste) (net 25 "AVR_GPIO_7")
- )
-#1309 counter:3 pos:613(0x265) type:1 net:22
-#010000000005000000047C267C300100000000AA0000004A0C001600FFFF0000FFFFFFFF47E9D80563875F01D7020900D7020900D7020900D7020900D7020900D7020900E501060001010100000000000000000100000000000001F200030004007980010079800100798001001BB3FFFFE54C000000000101010101010101010000000000000000000F0003010000
- (pad "8" thru_hole circle (at 17.78000 -0.00000) (size 1.4999995 1.4999995) (drill 1.0000005)
- (layers F.Cu B.Cu F.Mask F.Paste B.Mask B.Paste) (net 24 "AVR_GPIO_6")
- )
-#1309 counter:4 pos:817(0x331) type:1 net:21
-#010000000005000000047C267C300100000000AA0000004A0C001500FFFF0000FFFFFFFF07A7C90563875F01D7020900D7020900D7020900D7020900D7020900D7020900E501060001010100000000000000000100000000000001F200030004007980010079800100798001001BB3FFFFE54C000000000101010101010101010000000000000000000F0003010000
- (pad "7" thru_hole circle (at 15.24000 -0.00000) (size 1.4999995 1.4999995) (drill 1.0000005)
- (layers F.Cu B.Cu F.Mask F.Paste B.Mask B.Paste) (net 23 "AVR_GPIO_5")
- )
-#1309 counter:5 pos:1021(0x3FD) type:1 net:20
-#010000000005000000047C267C300100000000AA0000004A0C001400FFFF0000FFFFFFFFC764BA0563875F01D7020900D7020900D7020900D7020900D7020900D7020900E501060001010100000000000000000100000000000001F200030004007980010079800100798001001BB3FFFFE54C000000000101010101010101010000000000000000000F0003010000
- (pad "6" thru_hole circle (at 12.70000 -0.00000) (size 1.4999995 1.4999995) (drill 1.0000005)
- (layers F.Cu B.Cu F.Mask F.Paste B.Mask B.Paste) (net 22 "AVR_GPIO_4")
- )
-#1309 counter:6 pos:1225(0x4C9) type:1 net:19
-#010000000005000000047C267C300100000000AA0000004A0C001300FFFF0000FFFFFFFF8722AB0563875F01D7020900D7020900D7020900D7020900D7020900D7020900E501060001010100000000000000000100000000000001F200030004007980010079800100798001001BB3FFFFE54C000000000101010101010101010000000000000000000F0003010000
- (pad "5" thru_hole circle (at 10.16000 -0.00000) (size 1.4999995 1.4999995) (drill 1.0000005)
- (layers F.Cu B.Cu F.Mask F.Paste B.Mask B.Paste) (net 21 "AVR_GPIO_3")
- )
-#1309 counter:7 pos:1429(0x595) type:1 net:18
-#010000000005000000047C267C300100000000AA0000004A0C001200FFFF0000FFFFFFFF47E09B0563875F01D7020900D7020900D7020900D7020900D7020900D7020900E501060001010100000000000000000100000000000001F200030004007980010079800100798001001BB3FFFFE54C000000000101010101010101010000000000000000000F0003010000
- (pad "4" thru_hole circle (at 7.62000 -0.00000) (size 1.4999995 1.4999995) (drill 1.0000005)
- (layers F.Cu B.Cu F.Mask F.Paste B.Mask B.Paste) (net 20 "AVR_GPIO_2")
- )
-#1309 counter:8 pos:1633(0x661) type:1 net:16
-#010000000005000000047C267C300100000000AA0000004A0C001000FFFF0000FFFFFFFFC75B7D0563875F01D7020900D7020900D7020900D7020900D7020900D7020900E501060001010100000000000000000100000000000001F200030004007980010079800100798001001BB3FFFFE54C000000000101010101010101010000000000000000000F0003010000
- (pad "2" thru_hole circle (at 2.54000 -0.00000) (size 1.4999995 1.4999995) (drill 1.0000005)
- (layers F.Cu B.Cu F.Mask F.Paste B.Mask B.Paste) (net 18 "AVR_GPIO_0")
- )
-#1309 counter:9 pos:1837(0x72D) type:2 net:301
-#010000000005000000047C267C300100000000AA0000004A0C002D01FFFF0000FFFFFFFF87196E0563875F01D7020900D7020900D7020900D7020900D7020900D7020900E501060002020200000000000000000100000000000001F200030004007980010079800100798001001BB3FFFFE54C000008000101010101010101010000000000000000000F0003010000
- (pad "1" thru_hole rect (at 0.00000 -0.00000) (size 1.4999995 1.4999995) (drill 1.0000005)
- (layers F.Cu B.Cu F.Mask F.Paste B.Mask B.Paste) (net 303 "VCCO_3V3")
- )
-
- )
-#Components#1: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11183.4152mil|Y=3791.9685mil|PATTERN=PLS-2|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=3|SOURCEDESIGNATOR=JP6|SOURCEUNIQUEID=\NOUSWGVF|SOURCEHIERARCHICALPATH=rev02_12|SOURCEFOOTPRINTLIBRARY=Connectors.PcbLib|SOURCECOMPONENTLIBRARY=jumper.IntLib|SOURCELIBREFERENCE=JP1Q|SOURCEDESCRIPTION=Wurth 2pins connector (for jumper)|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=MJLNOLGI|JUMPERSVISIBLE=TRUE
-#$pads{1}
- (module "PLS-2" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (pad 3 thru_hole circle (at 5.08 0) (size 1.5 1.5) (drill 1.000001) (layers F&B.Cu *.Paste *.Mask)
+ (net 18 AVR_GPIO_1))
+ (pad 10 thru_hole circle (at 22.86 0) (size 1.5 1.5) (drill 1.000001) (layers F&B.Cu *.Paste *.Mask)
+ (net 6 GND))
+ (pad 9 thru_hole circle (at 20.32 0) (size 1.5 1.5) (drill 1.000001) (layers F&B.Cu *.Paste *.Mask)
+ (net 24 AVR_GPIO_7))
+ (pad 8 thru_hole circle (at 17.78 0) (size 1.5 1.5) (drill 1.000001) (layers F&B.Cu *.Paste *.Mask)
+ (net 23 AVR_GPIO_6))
+ (pad 7 thru_hole circle (at 15.24 0) (size 1.5 1.5) (drill 1.000001) (layers F&B.Cu *.Paste *.Mask)
+ (net 22 AVR_GPIO_5))
+ (pad 6 thru_hole circle (at 12.7 0) (size 1.5 1.5) (drill 1.000001) (layers F&B.Cu *.Paste *.Mask)
+ (net 21 AVR_GPIO_4))
+ (pad 5 thru_hole circle (at 10.16 0) (size 1.5 1.5) (drill 1.000001) (layers F&B.Cu *.Paste *.Mask)
+ (net 20 AVR_GPIO_3))
+ (pad 4 thru_hole circle (at 7.62 0) (size 1.5 1.5) (drill 1.000001) (layers F&B.Cu *.Paste *.Mask)
+ (net 19 AVR_GPIO_2))
+ (pad 2 thru_hole circle (at 2.54 0) (size 1.5 1.5) (drill 1.000001) (layers F&B.Cu *.Paste *.Mask)
+ (net 17 AVR_GPIO_0))
+ (pad 1 thru_hole rect (at 0 0) (size 1.5 1.5) (drill 1.000001) (layers F&B.Cu *.Paste *.Mask)
+ (net 302 VCCO_3V3))
+ )
+
+ (module PLS-2 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 84.160746 -31.8)
(path /539EEC0F)
(attr smd)
- (fp_text reference "JP6" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference JP6 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:10 pos:2041(0x7F9) type:2 net:5
-#010000000005000000047C267C300100000000AA0000004A0C000500FFFF0100FFFFFFFF2774AA06A6FA3A02D7020900D7020900D7020900D7020900D7020900D7020900E501060002020200000000008056400100000000000001F200030004007980010079800100798001001BB3FFFFE54C000005000101010101010101010000000000000000000F0003010000
- (pad "1" thru_hole rect (at -0.00000 1.27000 90) (size 1.4999995 1.4999995) (drill 1.0000005)
- (layers F.Cu B.Cu F.Mask F.Paste B.Mask B.Paste) (net 7 "GND")
- )
-#1309 counter:11 pos:2245(0x8C5) type:1 net:210
-#010000000005000000047C267C300100000000AA0000004A0C00D200FFFF0100FFFFFFFF2774AA06E63C4A02D7020900D7020900D7020900D7020900D7020900D7020900E501060001010100000000008056400100000000000001F200030004007980010079800100798001001BB3FFFFE54C000000000101010101010101010000000000000000000F0003010000
- (pad "2" thru_hole circle (at -0.00000 -1.27000 90) (size 1.4999995 1.4999995) (drill 1.0000005)
- (layers F.Cu B.Cu F.Mask F.Paste B.Mask B.Paste) (net 212 "MKM_AVR_MISO")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/3416A7AC-A52A.wrl"
+ (pad 1 thru_hole rect (at 0 1.27 90) (size 1.5 1.5) (drill 1.000001) (layers F&B.Cu *.Paste *.Mask)
+ (net 6 GND))
+ (pad 2 thru_hole circle (at 0 -1.27 90) (size 1.5 1.5) (drill 1.000001) (layers F&B.Cu *.Paste *.Mask)
+ (net 211 MKM_AVR_MISO))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/3416A7AC-A52A.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#2: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8715mil|Y=6441mil|PATTERN=C_1210|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=0|SOURCEDESIGNATOR=C1|SOURCEUNIQUEID=\LRIFEHMB|SOURCEHIERARCHICALPATH=rev02_1|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC1210|SOURCEDESCRIPTION=1210 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=RKIBUJSD|JUMPERSVISIBLE=TRUE
-#$pads{2}
- (module "C_1210" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_1210 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 21.463 -99.0854)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C1" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C1 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:1730 pos:357542(0x574A6) type:2 net:5
-#010000000005000000047C267C300100000000AA000000200C000500FFFF0200FFFFFFFF87D03A0590D1D603A19C0900869E0F00A19C0900869E0F00A19C0900869E0F000000000002020200000000000000000100000000000000F200030004007980010079800100798001003666FFFFE54C00000000000101010102010100000000000000000000FFFF00010000
- (pad "2" smd rect (at 1.50000 0.00000) (size 1.5999993 2.5999999)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
-#1309 counter:1731 pos:357746(0x57572) type:2 net:282
-#010000000005000000047C267C300100000000AA000000200C001A01FFFF0200FFFFFFFFD9CA280590D1D603A19C0900869E0F00A19C0900869E0F00A19C0900869E0F000000000002020200000000000000000100000000000000F200030004007980010079800100798001003666FFFFE54C00000000000101010102010100000000000000000000FFFF00010000
- (pad "1" smd rect (at -1.50000 0.00000) (size 1.5999993 2.5999999)
- (layers B.Cu B.Mask B.Paste) (net 284 "PWR_18V")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl"
+ (pad 2 smd rect (at 1.5 0) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at -1.5 0) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
+ (net 283 PWR_18V))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#3: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8715mil|Y=6243.5mil|PATTERN=C_1210|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=1|SOURCEDESIGNATOR=C2|SOURCEUNIQUEID=\IOLGIWQB|SOURCEHIERARCHICALPATH=rev02_1|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC1210|SOURCEDESCRIPTION=1210 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=NBPBNQDA|JUMPERSVISIBLE=TRUE
-#$pads{3}
- (module "C_1210" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_1210 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 21.463 -94.0689)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C2" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C2 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:1728 pos:357134(0x5730E) type:2 net:282
-#010000000005000000047C267C300100000000AA000000200C001A01FFFF0300FFFFFFFFD9CA2805B8AEB803A19C0900869E0F00A19C0900869E0F00A19C0900869E0F000000000002020200000000000000000100000000000000F200030004007980010079800100798001003666FFFFE54C00000000000101010102010100000000000000000000FFFF00010000
- (pad "1" smd rect (at -1.50000 0.00000) (size 1.5999993 2.5999999)
- (layers B.Cu B.Mask B.Paste) (net 284 "PWR_18V")
- )
-#1309 counter:1729 pos:357338(0x573DA) type:2 net:5
-#010000000005000000047C267C300100000000AA000000200C000500FFFF0300FFFFFFFF87D03A05B8AEB803A19C0900869E0F00A19C0900869E0F00A19C0900869E0F000000000002020200000000000000000100000000000000F200030004007980010079800100798001003666FFFFE54C00000000000101010102010100000000000000000000FFFF00010000
- (pad "2" smd rect (at 1.50000 0.00000) (size 1.5999993 2.5999999)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl"
+ (pad 1 smd rect (at -1.5 0) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
+ (net 283 PWR_18V))
+ (pad 2 smd rect (at 1.5 0) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#4: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8715mil|Y=6046mil|PATTERN=C_1210|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=2|SOURCEDESIGNATOR=C3|SOURCEUNIQUEID=\GQYOAUWQ|SOURCEHIERARCHICALPATH=rev02_1|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC1210|SOURCEDESCRIPTION=1210 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=UDNYJKQI|JUMPERSVISIBLE=TRUE
-#$pads{4}
- (module "C_1210" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_1210 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 21.463 -89.0524)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C3" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C3 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:1726 pos:356726(0x57176) type:2 net:5
-#010000000005000000047C267C300100000000AA000000200C000500FFFF0400FFFFFFFF87D03A05E08B9A03A19C0900869E0F00A19C0900869E0F00A19C0900869E0F000000000002020200000000000000000100000000000000F200030004007980010079800100798001003666FFFFE54C00000000000101010102010100000000000000000000FFFF00010000
- (pad "2" smd rect (at 1.50000 0.00000) (size 1.5999993 2.5999999)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
-#1309 counter:1727 pos:356930(0x57242) type:2 net:282
-#010000000005000000047C267C300100000000AA000000200C001A01FFFF0400FFFFFFFFD9CA2805E08B9A03A19C0900869E0F00A19C0900869E0F00A19C0900869E0F000000000002020200000000000000000100000000000000F200030004007980010079800100798001003666FFFFE54C00000000000101010102010100000000000000000000FFFF00010000
- (pad "1" smd rect (at -1.50000 0.00000) (size 1.5999993 2.5999999)
- (layers B.Cu B.Mask B.Paste) (net 284 "PWR_18V")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl"
+ (pad 2 smd rect (at 1.5 0) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at -1.5 0) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
+ (net 283 PWR_18V))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#5: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8897.5591mil|Y=5874.6457mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|NAMEAUTOPOSITION=1|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=3|SOURCEDESIGNATOR=C4|SOURCEUNIQUEID=\JTNMPEQT|SOURCEHIERARCHICALPATH=rev02_1|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=HLOWEYXK|JUMPERSVISIBLE=TRUE
-#$pads{5}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 26.100001 -84.700001)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C4" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C4 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 284 "PWR_18V")
- )
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- (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 283 PWR_18V))
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#6: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8875.9055mil|Y=5521.2992mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=4|SOURCEDESIGNATOR=C5|SOURCEUNIQUEID=\DHXJMWHX|SOURCEHIERARCHICALPATH=rev02_1|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=ARVYIINX|JUMPERSVISIBLE=TRUE
-#$pads{6}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 25.55 -75.725)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C5" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C5 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
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- (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 225 "NetC5_1")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 224 NetC5_1))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#7: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8877mil|Y=5368mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=5|SOURCEDESIGNATOR=C6|SOURCEUNIQUEID=\XAUUFRQR|SOURCEHIERARCHICALPATH=rev02_1|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=VMCHPYUW|JUMPERSVISIBLE=TRUE
-#$pads{7}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 25.5778 -71.8312)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C6" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C6 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 302 "VCC_5V0")
- )
-#1309 counter:1679 pos:347138(0x54C02) type:2 net:5
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- (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 301 VCC_5V0))
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#8: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10724.3307mil|Y=5945.5118mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=6|SOURCEDESIGNATOR=C7|SOURCEUNIQUEID=\LGRMREEA|SOURCEHIERARCHICALPATH=rev02_1|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR X7R 25V|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=ACVBYLQP|JUMPERSVISIBLE=TRUE
-#$pads{8}
- (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 72.5 -86.5)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C7" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C7 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:445 pos:92763(0x16A5B) type:2 net:5
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- (pad "2" smd rect (at -1.00000 0.00000 180) (size 1.0000005 1.2000001)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1309 counter:446 pos:92967(0x16B27) type:2 net:282
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- (pad "1" smd rect (at 1.00000 0.00000 180) (size 1.0000005 1.2000001)
- (layers F.Cu F.Mask F.Paste) (net 284 "PWR_18V")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl"
+ (pad 2 smd rect (at -1 0 180) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 1 0 180) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 283 PWR_18V))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#9: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8472mil|Y=5191mil|PATTERN=C_1210|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=7|SOURCEDESIGNATOR=C8|SOURCEUNIQUEID=\QFBFXXFU|SOURCEHIERARCHICALPATH=rev02_1|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC1210|SOURCEDESCRIPTION=1210 CAPACITOR X5R 6.3V|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=BDAWWRKF|JUMPERSVISIBLE=TRUE
-#$pads{9}
- (module "C_1210" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_1210 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 15.2908 -67.3354)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C8" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C8 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "1" smd rect (at 1.50000 0.00000 180) (size 1.5999993 2.5999999)
- (layers B.Cu B.Mask B.Paste) (net 302 "VCC_5V0")
- )
-#1309 counter:1725 pos:356522(0x570AA) type:2 net:5
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- (pad "2" smd rect (at -1.50000 0.00000 180) (size 1.5999993 2.5999999)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl"
+ (pad 1 smd rect (at 1.5 0 180) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
+ (net 301 VCC_5V0))
+ (pad 2 smd rect (at -1.5 0 180) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#10: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8282mil|Y=4689mil|PATTERN=C_D|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=8|SOURCEDESIGNATOR=C9|SOURCEUNIQUEID=\BBDAMTBV|SOURCEHIERARCHICALPATH=rev02_1|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=rev02_1.SCHLIB|SOURCELIBREFERENCE=CP_E-035X080|SOURCEDESCRIPTION=Kemet Tantalum Capacitor|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=GEXVCJTH|JUMPERSVISIBLE=TRUE
-#$pads{10}
- (module "C_D" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_D (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 10.4648 -54.5846)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C9" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C9 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "1" smd rect (at 3.25000 0.00000 180) (size 2.4000003 2.5999999)
- (layers B.Cu B.Mask B.Paste) (net 302 "VCC_5V0")
- )
-#1309 counter:1813 pos:425318(0x67D66) type:2 net:5
-#010000000005000000047C267C300100000000AA000000200C000500FFFF0A00FFFFFFFF7835DC04107CCB02F26A0E00869E0F00F26A0E00869E0F00F26A0E00869E0F000000000002020200000000008066400100000000000000F200030004007980010079800100798001007447FFFFE54C00000000000101010102010100000000000000000000FFFF00010000
- (pad "2" smd rect (at -3.25000 0.00000 180) (size 2.4000003 2.5999999)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/5917D381-109F.wrl"
+ (pad 1 smd rect (at 3.25 0 180) (size 2.4 2.6) (layers B.Cu B.Paste B.Mask)
+ (net 301 VCC_5V0))
+ (pad 2 smd rect (at -3.25 0 180) (size 2.4 2.6) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/5917D381-109F.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#11: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8282mil|Y=4944mil|PATTERN=C_D|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=9|SOURCEDESIGNATOR=C10|SOURCEUNIQUEID=\GKXFCOSK|SOURCEHIERARCHICALPATH=rev02_1|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=rev02_1.SCHLIB|SOURCELIBREFERENCE=CP_E-035X080|SOURCEDESCRIPTION=Kemet Tantalum Capacitor|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=QUYICOWB|JUMPERSVISIBLE=TRUE
-#$pads{11}
- (module "C_D" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_D (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 10.4648 -61.0616)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C10" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C10 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "2" smd rect (at -3.25000 0.00000 180) (size 2.4000003 2.5999999)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
-#1309 counter:1811 pos:424910(0x67BCE) type:2 net:300
-#010000000005000000047C267C300100000000AA000000200C002C01FFFF0B00FFFFFFFFC74103050065F202F26A0E00869E0F00F26A0E00869E0F00F26A0E00869E0F000000000002020200000000008066400100000000000000F200030004007980010079800100798001007447FFFFE54C00000000000101010102010100000000000000000000FFFF00010000
- (pad "1" smd rect (at 3.25000 0.00000 180) (size 2.4000003 2.5999999)
- (layers B.Cu B.Mask B.Paste) (net 302 "VCC_5V0")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/5917D381-109F.wrl"
+ (pad 2 smd rect (at -3.25 0 180) (size 2.4 2.6) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 3.25 0 180) (size 2.4 2.6) (layers B.Cu B.Paste B.Mask)
+ (net 301 VCC_5V0))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/5917D381-109F.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#12: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10803.0709mil|Y=6063.622mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=10|SOURCEDESIGNATOR=C11|SOURCEUNIQUEID=\FHFALBPP|SOURCEHIERARCHICALPATH=rev02_1|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=rcl.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=UWVMBBJO|JUMPERSVISIBLE=TRUE
-#$pads{12}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 74.500001 -89.499999)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C11" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C11 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 5 15V_STABLE))
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 225 NetC11_1))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#13: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10675.1181mil|Y=6181.7323mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=11|SOURCEDESIGNATOR=C12|SOURCEUNIQUEID=\AGMQMKVQ|SOURCEHIERARCHICALPATH=rev02_1|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=rcl.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=VMJWGKJO|JUMPERSVISIBLE=TRUE
-#$pads{13}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 71.25 -92.5)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C12" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C12 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 226 NetC12_2))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#14: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10871.9685mil|Y=5994.7244mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=12|SOURCEDESIGNATOR=C13|SOURCEUNIQUEID=\DFUGYXUK|SOURCEHIERARCHICALPATH=rev02_1|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR X7R 25V|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=FJVTKVXI|JUMPERSVISIBLE=TRUE
-#$pads{14}
- (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 76.25 -87.75)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C13" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C13 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl"
+ (pad 1 smd rect (at 0 -1 270) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 5 15V_STABLE))
+ (pad 2 smd rect (at 0 1 270) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#15: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11413mil|Y=6328mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=0|SOURCEDESIGNATOR=C14|SOURCEUNIQUEID=\KEXRXNOQ|SOURCEHIERARCHICALPATH=rev02_2|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=CVWYBJDA|JUMPERSVISIBLE=TRUE
-#$pads{15}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 89.9922 -96.2152)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C14" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C14 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988)
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 275 NOISE_IN))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
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)
-#Components#16: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11393mil|Y=5756mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=1|SOURCEDESIGNATOR=C15|SOURCEUNIQUEID=\PFQHDLHY|SOURCEHIERARCHICALPATH=rev02_2|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=DVCYXRLH|JUMPERSVISIBLE=TRUE
-#$pads{16}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 89.4842 -81.6864)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C15" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C15 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (layers B.Cu B.Mask B.Paste) (net 8 "NetC15_2")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 287 RAW_NOISE))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 7 NetC15_2))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#17: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10915mil|Y=6026mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=2|SOURCEDESIGNATOR=C16|SOURCEUNIQUEID=\OEEHSEKR|SOURCEHIERARCHICALPATH=rev02_2|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=BHUPQHBF|JUMPERSVISIBLE=TRUE
-#$pads{17}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 77.343 -88.5444)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C16" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C16 (at 0 0) (layer F.SilkS) hide
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)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#18: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9008.7795mil|Y=3801.811mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=0|SOURCEDESIGNATOR=C17|SOURCEUNIQUEID=\HTCCIDNV|SOURCEHIERARCHICALPATH=rev02_3|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=rcl.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=LUYKEXKO|JUMPERSVISIBLE=TRUE
-#$pads{18}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 28.924999 -32.049999)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C17" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C17 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- )
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- (layers B.Cu B.Mask B.Paste) (net 228 "NetC17_2")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 227 NetC17_2))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#19: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8979.252mil|Y=4057.7165mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=1|SOURCEDESIGNATOR=C18|SOURCEUNIQUEID=\CIJPUSKD|SOURCEHIERARCHICALPATH=rev02_3|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=rcl.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=KWEEOKSG|JUMPERSVISIBLE=TRUE
-#$pads{19}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 28.175001 -38.549999)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C18" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C18 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (pad "1" smd rect (at 0.50000 -0.00000 180) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 279 OSC_OUT))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#20: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8386.7323mil|Y=3345.1181mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=2|SOURCEDESIGNATOR=C19|SOURCEUNIQUEID=\XVBDNHLO|SOURCEHIERARCHICALPATH=rev02_3|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=RCJVNOMG|JUMPERSVISIBLE=TRUE
-#$pads{20}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 13.125 -20.45)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C19" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C19 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:369 pos:77259(0x12DCB) type:2 net:301
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- (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
- )
-#1309 counter:370 pos:77463(0x12E97) type:2 net:5
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- (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#21: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8917.2441mil|Y=3457.3228mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=3|SOURCEDESIGNATOR=C20|SOURCEUNIQUEID=\QHTVRJCA|SOURCEHIERARCHICALPATH=rev02_3|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=LQFUJQBV|JUMPERSVISIBLE=TRUE
-#$pads{21}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 26.6 -23.299999)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C20" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C20 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:367 pos:76851(0x12C33) type:2 net:5
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- (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1309 counter:368 pos:77055(0x12CFF) type:2 net:276
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- (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 278 "NRST")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 277 NRST))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#22: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9749mil|Y=3101mil|PATTERN=C_0603|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=0|SOURCEDESIGNATOR=C21|SOURCEUNIQUEID=\OERWFUKM|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0603 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=HTXGUFMA|JUMPERSVISIBLE=TRUE
-#$pads{22}
- (module "C_0603" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0603 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 47.7266 -14.2494)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C21" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C21 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "2" smd rect (at 0.70000 0.00000) (size 0.8000009 0.8000009)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
-#1309 counter:1693 pos:349994(0x5572A) type:2 net:301
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- (pad "1" smd rect (at -0.70000 0.00000) (size 0.8000009 0.8000009)
- (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/175C1D2E-5B2D.wrl"
+ (pad 2 smd rect (at 0.7 0) (size 0.800001 0.800001) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at -0.7 0) (size 0.800001 0.800001) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/175C1D2E-5B2D.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#23: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10038mil|Y=4568mil|PATTERN=C_0603|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=1|SOURCEDESIGNATOR=C22|SOURCEUNIQUEID=\QRDVIVYO|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0603 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=FMQDRRGE|JUMPERSVISIBLE=TRUE
-#$pads{23}
- (module "C_0603" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0603 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 55.0672 -51.5112)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C22" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C22 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "1" smd rect (at 0.70000 0.00000 180) (size 0.8000009 0.8000009)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
-#1309 counter:1691 pos:349586(0x55592) type:2 net:298
-#010000000005000000047C267C300100000000AA000000200C002A01FFFF1700FFFFFFFFD978F7058005B90251CE040051CE040051CE040051CE040051CE040051CE04000000000002020200000000008066400100000000000000F20003000400798001007980010079800100BAA3FFFF087B00000000000101010102020100000000000000000000FFFF00010000
- (pad "2" smd rect (at -0.70000 0.00000 180) (size 0.8000009 0.8000009)
- (layers B.Cu B.Mask B.Paste) (net 300 "VCAP1")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/175C1D2E-5B2D.wrl"
+ (pad 1 smd rect (at 0.7 0 180) (size 0.800001 0.800001) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 2 smd rect (at -0.7 0 180) (size 0.800001 0.800001) (layers B.Cu B.Paste B.Mask)
+ (net 299 VCAP1))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/175C1D2E-5B2D.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#24: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10038mil|Y=4496mil|PATTERN=C_0603|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=2|SOURCEDESIGNATOR=C23|SOURCEUNIQUEID=\HJARIKGM|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0603 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=YNNFFGYM|JUMPERSVISIBLE=TRUE
-#$pads{24}
- (module "C_0603" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0603 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 55.0672 -49.6824)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C23" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C23 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:1688 pos:348974(0x5532E) type:2 net:298
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- (pad "2" smd rect (at -0.70000 0.00000 180) (size 0.8000009 0.8000009)
- (layers B.Cu B.Mask B.Paste) (net 300 "VCAP1")
- )
-#1309 counter:1689 pos:349178(0x553FA) type:2 net:5
-#010000000005000000047C267C300100000000AA000000200C000500FFFF1800FFFFFFFFE6E1FF050009AE0251CE040051CE040051CE040051CE040051CE040051CE04000000000002020200000000008066400100000000000000F20003000400798001007980010079800100BAA3FFFF087B00000000000101010102020100000000000000000000FFFF00010000
- (pad "1" smd rect (at 0.70000 0.00000 180) (size 0.8000009 0.8000009)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/175C1D2E-5B2D.wrl"
+ (pad 2 smd rect (at -0.7 0 180) (size 0.800001 0.800001) (layers B.Cu B.Paste B.Mask)
+ (net 299 VCAP1))
+ (pad 1 smd rect (at 0.7 0 180) (size 0.800001 0.800001) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/175C1D2E-5B2D.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#25: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10467mil|Y=3500mil|PATTERN=C_0603|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=3|SOURCEDESIGNATOR=C24|SOURCEUNIQUEID=\NFRWNSFV|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0603 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=YDBOUWJD|JUMPERSVISIBLE=TRUE
-#$pads{25}
- (module "C_0603" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0603 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 65.9638 -24.384)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C24" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C24 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "1" smd rect (at 0.00000 0.70000 90) (size 0.8000009 0.8000009)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
-#1309 counter:1687 pos:348770(0x55262) type:2 net:299
-#010000000005000000047C267C300100000000AA000000200C002B01FFFF1900FFFFFFFF30233D0647431A0251CE040051CE040051CE040051CE040051CE040051CE04000000000002020200000000008056400100000000000000F20003000400798001007980010079800100BAA3FFFF087B00000000000101010102020100000000000000000000FFFF00010000
- (pad "2" smd rect (at 0.00000 -0.70000 90) (size 0.8000009 0.8000009)
- (layers B.Cu B.Mask B.Paste) (net 301 "VCAP2")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/175C1D2E-5B2D.wrl"
+ (pad 1 smd rect (at 0 0.7 90) (size 0.800001 0.800001) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 2 smd rect (at 0 -0.7 90) (size 0.800001 0.800001) (layers B.Cu B.Paste B.Mask)
+ (net 300 VCAP2))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/175C1D2E-5B2D.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#26: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10539mil|Y=3500mil|PATTERN=C_0603|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=4|SOURCEDESIGNATOR=C25|SOURCEUNIQUEID=\JPEWGSJL|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0603 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=VJKMEVHC|JUMPERSVISIBLE=TRUE
-#$pads{26}
- (module "C_0603" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0603 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 67.7926 -24.384)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C25" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C25 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "2" smd rect (at 0.00000 -0.70000 90) (size 0.8000009 0.8000009)
- (layers B.Cu B.Mask B.Paste) (net 301 "VCAP2")
- )
-#1309 counter:1685 pos:348362(0x550CA) type:2 net:5
-#010000000005000000047C267C300100000000AA000000200C000500FFFF1A00FFFFFFFFB01F48063ADA110251CE040051CE040051CE040051CE040051CE040051CE04000000000002020200000000008056400100000000000000F20003000400798001007980010079800100BAA3FFFF087B00000000000101010102020100000000000000000000FFFF00010000
- (pad "1" smd rect (at 0.00000 0.70000 90) (size 0.8000009 0.8000009)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/175C1D2E-5B2D.wrl"
+ (pad 2 smd rect (at 0 -0.7 90) (size 0.800001 0.800001) (layers B.Cu B.Paste B.Mask)
+ (net 300 VCAP2))
+ (pad 1 smd rect (at 0 0.7 90) (size 0.800001 0.800001) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/175C1D2E-5B2D.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#27: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9040mil|Y=3586mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=5|SOURCEDESIGNATOR=C26|SOURCEUNIQUEID=\CGCPBGIP|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0805|SOURCEDESCRIPTION=0805 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=IMYGPLPE|JUMPERSVISIBLE=TRUE
-#$pads{27}
- (module "C_0805" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0805 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 29.718 -26.5684)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C26" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C26 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
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- (pad "2" smd rect (at 0.00000 1.00000 270) (size 1.0000005 1.2000001)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
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- (pad "1" smd rect (at 0.00000 -1.00000 270) (size 1.0000005 1.2000001)
- (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl"
+ (pad 2 smd rect (at 0 1 270) (size 1.000001 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 -1 270) (size 1.000001 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#28: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9669mil|Y=4561mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|NAMEAUTOPOSITION=1|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=6|SOURCEDESIGNATOR=C27|SOURCEUNIQUEID=\SFOVQEEA|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0805|SOURCEDESCRIPTION=0805 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=DYPSYBFJ|JUMPERSVISIBLE=TRUE
-#$pads{28}
- (module "C_0805" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0805 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 45.6946 -51.3334)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C27" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C27 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (pad "1" smd rect (at 1.00000 0.00000 180) (size 1.0000005 1.2000001)
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- (pad "2" smd rect (at -1.00000 0.00000 180) (size 1.0000005 1.2000001)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl"
+ (pad 1 smd rect (at 1 0 180) (size 1.000001 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at -1 0 180) (size 1.000001 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#29: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9864mil|Y=4483mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|NAMEAUTOPOSITION=1|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=7|SOURCEDESIGNATOR=C28|SOURCEUNIQUEID=\CGWPAUPR|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=VMLEHLLQ|JUMPERSVISIBLE=TRUE
-#$pads{29}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 50.6476 -49.3522)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C28" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C28 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
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- (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
- )
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- (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#30: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10446mil|Y=3944mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=8|SOURCEDESIGNATOR=C29|SOURCEUNIQUEID=\ACVRKIVN|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=YOGXTRXS|JUMPERSVISIBLE=TRUE
-#$pads{30}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 65.4304 -35.6616)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C29" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C29 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
-#1309 counter:1665 pos:344282(0x540DA) type:2 net:301
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- (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#31: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10128mil|Y=4500mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=9|SOURCEDESIGNATOR=C30|SOURCEUNIQUEID=\GFVUFRNR|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=XEGDJXDO|JUMPERSVISIBLE=TRUE
-#$pads{31}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 57.3532 -49.784)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C30" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C30 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
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- (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
- )
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- (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#32: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10285mil|Y=3168mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=10|SOURCEDESIGNATOR=C31|SOURCEUNIQUEID=\DOWCWNSY|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=FBUYFSNV|JUMPERSVISIBLE=TRUE
-#$pads{32}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 61.341 -15.9512)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C31" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C31 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
-#1309 counter:1661 pos:343466(0x53DAA) type:2 net:301
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- (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#33: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9127mil|Y=3588mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=11|SOURCEDESIGNATOR=C32|SOURCEUNIQUEID=\OLLSKMDE|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=PUEAGWAY|JUMPERSVISIBLE=TRUE
-#$pads{33}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 31.9278 -26.6192)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C32" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C32 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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)
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- (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
- )
-#1309 counter:1659 pos:343058(0x53C12) type:2 net:5
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- (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#34: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9072mil|Y=4173mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=12|SOURCEDESIGNATOR=C33|SOURCEUNIQUEID=\ICCXRKBS|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=ICLFMCIH|JUMPERSVISIBLE=TRUE
-#$pads{34}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 30.5308 -41.4782)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C33" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C33 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
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)
-
)
-#Components#35: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10269mil|Y=4500mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=13|SOURCEDESIGNATOR=C34|SOURCEUNIQUEID=\XONFBBEQ|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=KAJODKPQ|JUMPERSVISIBLE=TRUE
-#$pads{35}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 60.9346 -49.784)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C34" (at 0 0) (layer F.SilkS) hide
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#36: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9358.189mil|Y=3347.0866mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=14|SOURCEDESIGNATOR=C35|SOURCEUNIQUEID=\NXQGNKDN|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=ADJBWSBF|JUMPERSVISIBLE=TRUE
-#$pads{36}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 37.800001 -20.5)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C35" (at 0 0) (layer F.SilkS) hide
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-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
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)
-
)
-#Components#37: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10446mil|Y=3711mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=15|SOURCEDESIGNATOR=C36|SOURCEUNIQUEID=\MXYDVOBH|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=APQTATHP|JUMPERSVISIBLE=TRUE
-#$pads{37}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 65.4304 -29.7434)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C36" (at 0 0) (layer F.SilkS) hide
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#38: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9413.3071mil|Y=3339.2126mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=16|SOURCEDESIGNATOR=C37|SOURCEUNIQUEID=\GPLOOKVP|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=GNDNVXHP|JUMPERSVISIBLE=TRUE
-#$pads{38}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 39.2 -20.3)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C37" (at 0 0) (layer F.SilkS) hide
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-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#39: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9749mil|Y=3168mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=17|SOURCEDESIGNATOR=C38|SOURCEUNIQUEID=\ESGXQYJH|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=IXTOCIER|JUMPERSVISIBLE=TRUE
-#$pads{39}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 47.7266 -15.9512)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C38" (at 0 0) (layer F.SilkS) hide
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
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)
-
)
-#Components#40: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10023mil|Y=3168mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=18|SOURCEDESIGNATOR=C39|SOURCEUNIQUEID=\AXGJOSIH|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=AOUVMBTG|JUMPERSVISIBLE=TRUE
-#$pads{40}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 54.6862 -15.9512)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C39" (at 0 0) (layer F.SilkS) hide
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
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)
-
)
-#Components#41: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9127mil|Y=4317mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=19|SOURCEDESIGNATOR=C40|SOURCEUNIQUEID=\VMRMCCYQ|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=CQWIAUUB|JUMPERSVISIBLE=TRUE
-#$pads{41}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 31.9278 -45.1358)
(path /539EEC0F)
(attr smd)
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- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#42: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9127mil|Y=4173mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=20|SOURCEDESIGNATOR=C41|SOURCEUNIQUEID=\SDBDJCDV|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=YKNWTUPX|JUMPERSVISIBLE=TRUE
-#$pads{42}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 31.9278 -41.4782)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C41" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C41 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
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- (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
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- (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#43: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10480mil|Y=3405mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=21|SOURCEDESIGNATOR=C42|SOURCEUNIQUEID=\LAMJESNK|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=RCPJJDGU|JUMPERSVISIBLE=TRUE
-#$pads{43}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 66.294 -21.971)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C42" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C42 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#44: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9414mil|Y=4483mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=22|SOURCEDESIGNATOR=C43|SOURCEUNIQUEID=\IVCSOSHJ|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=MJRXYGQF|JUMPERSVISIBLE=TRUE
-#$pads{44}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 39.2176 -49.3522)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C43" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C43 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
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- (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#45: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9667mil|Y=4483mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=23|SOURCEDESIGNATOR=C44|SOURCEUNIQUEID=\HRXSFQUB|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=CBORRSNQ|JUMPERSVISIBLE=TRUE
-#$pads{45}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 45.6438 -49.3522)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C44" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C44 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988)
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- )
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- (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#46: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10446mil|Y=4139mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=24|SOURCEDESIGNATOR=C45|SOURCEUNIQUEID=\XNBLTOXB|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=IWDYTUVX|JUMPERSVISIBLE=TRUE
-#$pads{46}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 65.4304 -40.6146)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C45" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C45 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
-#1309 counter:1637 pos:338570(0x52A8A) type:2 net:301
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- (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#47: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9127mil|Y=3795mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=25|SOURCEDESIGNATOR=C46|SOURCEUNIQUEID=\XDROBBVT|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=PBPJFKUG|JUMPERSVISIBLE=TRUE
-#$pads{47}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 31.9278 -31.877)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C46" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C46 (at 0 0) (layer F.SilkS) hide
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)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#48: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11573mil|Y=4060mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=0|SOURCEDESIGNATOR=C47|SOURCEUNIQUEID=\VHYNRTHL|SOURCEHIERARCHICALPATH=rev02_6|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=NNRNWKMU|JUMPERSVISIBLE=TRUE
-#$pads{48}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 94.0562 -38.608)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C47" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C47 (at 0 0) (layer F.SilkS) hide
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)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#49: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10945mil|Y=4163.126mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=1|SOURCEDESIGNATOR=C48|SOURCEUNIQUEID=\NBGNTSHR|SOURCEHIERARCHICALPATH=rev02_6|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=QGCENLVV|JUMPERSVISIBLE=TRUE
-#$pads{49}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 78.105 -41.2274)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C48" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C48 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
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- (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988)
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- )
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- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#50: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11573mil|Y=4741mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=2|SOURCEDESIGNATOR=C49|SOURCEUNIQUEID=\XEEYECSQ|SOURCEHIERARCHICALPATH=rev02_6|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=DCKDWONV|JUMPERSVISIBLE=TRUE
-#$pads{50}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 94.0562 -55.9054)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C49" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C49 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988)
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- (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#51: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10945mil|Y=4839mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=3|SOURCEDESIGNATOR=C50|SOURCEUNIQUEID=\GIMQNIWP|SOURCEHIERARCHICALPATH=rev02_6|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=OPFESTEA|JUMPERSVISIBLE=TRUE
-#$pads{51}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 78.105 -58.3946)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C50" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C50 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988)
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- (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#52: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11573mil|Y=4348mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=4|SOURCEDESIGNATOR=C51|SOURCEUNIQUEID=\KNMEKKGN|SOURCEHIERARCHICALPATH=rev02_6|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=YSTSEIYE|JUMPERSVISIBLE=TRUE
-#$pads{52}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 94.0562 -45.9232)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C51" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C51 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
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-
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- (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
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- (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#53: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10945mil|Y=4726mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=5|SOURCEDESIGNATOR=C52|SOURCEUNIQUEID=\MTTHOQQB|SOURCEHIERARCHICALPATH=rev02_6|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=NAJFXVLX|JUMPERSVISIBLE=TRUE
-#$pads{53}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 78.105 -55.5244)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C52" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C52 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
- )
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- (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#54: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11573mil|Y=4941.3149mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=6|SOURCEDESIGNATOR=C53|SOURCEUNIQUEID=\EDCAOFVK|SOURCEHIERARCHICALPATH=rev02_6|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=SXDLQJCH|JUMPERSVISIBLE=TRUE
-#$pads{54}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 94.0562 -60.993398)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C53" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C53 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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)
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- (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1309 counter:350 pos:73383(0x11EA7) type:2 net:301
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- (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#55: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11573mil|Y=4154mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=7|SOURCEDESIGNATOR=C54|SOURCEUNIQUEID=\AURXGSDF|SOURCEHIERARCHICALPATH=rev02_6|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=GBKOFXXF|JUMPERSVISIBLE=TRUE
-#$pads{55}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 94.0562 -40.9956)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C54" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C54 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
- )
-#1309 counter:348 pos:72975(0x11D0F) type:2 net:5
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- (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#56: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11573mil|Y=4858mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=8|SOURCEDESIGNATOR=C55|SOURCEUNIQUEID=\XESIFIGW|SOURCEHIERARCHICALPATH=rev02_6|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=KPWCLFSW|JUMPERSVISIBLE=TRUE
-#$pads{56}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 94.0562 -58.8772)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C55" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C55 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
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- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
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)
-
)
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-#$pads{57}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 78.105 -45.3644)
(path /539EEC0F)
(attr smd)
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-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#58: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11573mil|Y=4623mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=10|SOURCEDESIGNATOR=C57|SOURCEUNIQUEID=\ESCEXNSJ|SOURCEHIERARCHICALPATH=rev02_6|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=KDBSBBTI|JUMPERSVISIBLE=TRUE
-#$pads{58}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 94.0562 -52.9082)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C57" (at 0 0) (layer F.SilkS) hide
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-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
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)
-
)
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-#$pads{59}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 72.822199 -40.8924)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C58" (at 0 0) (layer F.SilkS) hide
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
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)
-
)
-#Components#60: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10738mil|Y=4062.937mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=12|SOURCEDESIGNATOR=C59|SOURCEUNIQUEID=\UDBPYBES|SOURCEHIERARCHICALPATH=rev02_6|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=ENFCSAFB|JUMPERSVISIBLE=TRUE
-#$pads{60}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 72.8472 -38.6826)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C59" (at 0 0) (layer F.SilkS) hide
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-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
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)
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)
-#Components#61: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10738mil|Y=4939.874mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=13|SOURCEDESIGNATOR=C60|SOURCEUNIQUEID=\SNQKUCWG|SOURCEHIERARCHICALPATH=rev02_6|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=BWGVKUNV|JUMPERSVISIBLE=TRUE
-#$pads{61}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 72.8472 -60.9568)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C60" (at 0 0) (layer F.SilkS) hide
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
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)
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-#Components#62: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11363mil|Y=4849.685mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=14|SOURCEDESIGNATOR=C61|SOURCEUNIQUEID=\AEKMPMUW|SOURCEHIERARCHICALPATH=rev02_6|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=DIELQBTL|JUMPERSVISIBLE=TRUE
-#$pads{62}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 88.7222 -58.665999)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C61" (at 0 0) (layer F.SilkS) hide
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
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)
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)
-#Components#63: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10738mil|Y=4612mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=15|SOURCEDESIGNATOR=C62|SOURCEUNIQUEID=\YFSBXYXP|SOURCEHIERARCHICALPATH=rev02_6|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=CRYOXXNU|JUMPERSVISIBLE=TRUE
-#$pads{63}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 72.8472 -52.6288)
(path /539EEC0F)
(attr smd)
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- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#64: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11363mil|Y=4160mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=16|SOURCEDESIGNATOR=C63|SOURCEUNIQUEID=\BHIMBLHA|SOURCEHIERARCHICALPATH=rev02_6|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=JSBUODVE|JUMPERSVISIBLE=TRUE
-#$pads{64}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 88.7222 -41.148)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C63" (at 0 0) (layer F.SilkS) hide
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- (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988)
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- )
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- (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#65: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10738mil|Y=4847mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=17|SOURCEDESIGNATOR=C64|SOURCEUNIQUEID=\CQFRBQUK|SOURCEHIERARCHICALPATH=rev02_6|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=PFAKLPKD|JUMPERSVISIBLE=TRUE
-#$pads{65}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 72.8472 -58.5978)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C64" (at 0 0) (layer F.SilkS) hide
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)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#66: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11363mil|Y=4726.8425mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=18|SOURCEDESIGNATOR=C65|SOURCEUNIQUEID=\TYQTIQCH|SOURCEHIERARCHICALPATH=rev02_6|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=QUQTOHES|JUMPERSVISIBLE=TRUE
-#$pads{66}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 88.7222 -55.545799)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C65" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C65 (at 0 0) (layer F.SilkS) hide
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)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988)
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- (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#67: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10738mil|Y=4333mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=19|SOURCEDESIGNATOR=C66|SOURCEUNIQUEID=\SRYPIEKB|SOURCEHIERARCHICALPATH=rev02_6|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=XXQURNRB|JUMPERSVISIBLE=TRUE
-#$pads{67}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 72.8472 -45.5422)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C66" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C66 (at 0 0) (layer F.SilkS) hide
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)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#68: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11363mil|Y=4330.8425mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=20|SOURCEDESIGNATOR=C67|SOURCEUNIQUEID=\OOOIRYHY|SOURCEHIERARCHICALPATH=rev02_6|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=XIUYBPVE|JUMPERSVISIBLE=TRUE
-#$pads{68}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 88.7222 -45.487399)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C67" (at 0 0) (layer F.SilkS) hide
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)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
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)
-#Components#69: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10738mil|Y=4731mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=21|SOURCEDESIGNATOR=C68|SOURCEUNIQUEID=\VGKQQVHD|SOURCEHIERARCHICALPATH=rev02_6|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=NMVLCNLC|JUMPERSVISIBLE=TRUE
-#$pads{69}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 72.8472 -55.6514)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C68" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C68 (at 0 0) (layer F.SilkS) hide
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)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#70: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9409.3701mil|Y=4574.4487mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|NAMEAUTOPOSITION=1|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=0|SOURCEDESIGNATOR=C69|SOURCEUNIQUEID=\FGGYWCQD|SOURCEHIERARCHICALPATH=rev02_7|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=MWRQJJWN|JUMPERSVISIBLE=TRUE
-#$pads{70}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 39.100001 -51.674997)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C69" (at 0 0) (layer F.SilkS) hide
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)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- )
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
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-#$pads{71}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 22.099999 -47.874999)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C70" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C70 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988)
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 228 NetC70_2))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#72: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8629.8425mil|Y=4150.2362mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=1|SOURCEDESIGNATOR=C71|SOURCEUNIQUEID=\DTYANNNP|SOURCEHIERARCHICALPATH=rev02_8|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=MDBDTBKL|JUMPERSVISIBLE=TRUE
-#$pads{72}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 19.299999 -40.899999)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C71" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C71 (at 0 0) (layer F.SilkS) hide
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(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988)
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- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 229 NetC71_2))
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#73: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8648.5773mil|Y=2774.7019mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 0.00000000000000E+0000|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=0|SOURCEDESIGNATOR=C72|SOURCEUNIQUEID=\NHENNVFG|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=XBVLVYJW|JUMPERSVISIBLE=TRUE
-#$pads{73}
- (module "C_0805" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0805 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 19.775863 -5.961428)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C72" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C72 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (pad "2" smd rect (at 1.00000 -0.00000) (size 1.0000005 1.2000001)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
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- (layers B.Cu B.Mask B.Paste) (net 206 "FT_VREGIN")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl"
+ (pad 2 smd rect (at 1 0) (size 1.000001 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at -1 0) (size 1.000001 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 205 FT_VREGIN))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#74: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8357.0874mil|Y=2818.1899mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=1|SOURCEDESIGNATOR=C73|SOURCEUNIQUEID=\YGXCSMKI|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=XOQPDKVT|JUMPERSVISIBLE=TRUE
-#$pads{74}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 12.37202 -7.066023)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C73" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C73 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (pad "1" smd rect (at 0.50000 -0.00000 180) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 206 "FT_VREGIN")
- )
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- (pad "2" smd rect (at -0.50000 -0.00000 180) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 205 FT_VREGIN))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#75: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8292.0394mil|Y=2665.37mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=2|SOURCEDESIGNATOR=C74|SOURCEUNIQUEID=\GAAGDDWD|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=LSTWLFWW|JUMPERSVISIBLE=TRUE
-#$pads{75}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 10.719801 -3.184398)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C74" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C74 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (pad "2" smd rect (at -0.00000 0.50000 270) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
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- (pad "1" smd rect (at -0.00000 -0.50000 270) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 203 "FT_VCCORE")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 202 FT_VCCORE))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#76: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8653.0394mil|Y=2731.37mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=3|SOURCEDESIGNATOR=C75|SOURCEUNIQUEID=\HLLLMFEP|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=LWNLVPOY|JUMPERSVISIBLE=TRUE
-#$pads{76}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 19.889201 -4.86079799999999)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (at 19.889201 -4.860798)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C75" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C75 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (pad "1" smd rect (at -0.00000 0.50000 90) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
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- (pad "2" smd rect (at -0.00000 -0.50000 90) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 231 "NetC75_2")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 230 NetC75_2))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#77: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8236.0394mil|Y=2665.37mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=4|SOURCEDESIGNATOR=C76|SOURCEUNIQUEID=\NPMMWQOC|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=GRXBGGGN|JUMPERSVISIBLE=TRUE
-#$pads{77}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 9.29740100000001 -3.184398)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (at 9.297401 -3.184398)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C76" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C76 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (pad "2" smd rect (at -0.00000 0.50000 270) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
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- (pad "1" smd rect (at -0.00000 -0.50000 270) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 201 "FT_VCCA")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 200 FT_VCCA))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#78: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8886.0394mil|Y=2929.37mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=5|SOURCEDESIGNATOR=C77|SOURCEUNIQUEID=\JFIHUCGU|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0805|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=BTEANFTU|JUMPERSVISIBLE=TRUE
-#$pads{78}
- (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 25.807401 -9.88999799999999)
+
+ (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (at 25.807401 -9.889998)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C77" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C77 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl"
+ (pad 1 smd rect (at 0 -1 270) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 203 FT_VPHY))
+ (pad 2 smd rect (at 0 1 270) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#79: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8653.0394mil|Y=2823.37mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=6|SOURCEDESIGNATOR=C78|SOURCEUNIQUEID=\IAPESTKM|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=KGIQAMPA|JUMPERSVISIBLE=TRUE
-#$pads{79}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 19.889201 -7.197598)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C78" (at 0 0) (layer F.SilkS) hide
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 231 NetC78_2))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#80: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8748.937mil|Y=2934.685mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=7|SOURCEDESIGNATOR=C79|SOURCEUNIQUEID=\MUDTVRHY|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=AEBWXDGX|JUMPERSVISIBLE=TRUE
-#$pads{80}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 22.325 -10.024999)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C79" (at 0 0) (layer F.SilkS) hide
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 203 FT_VPHY))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#81: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8823.0394mil|Y=3165.37mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=8|SOURCEDESIGNATOR=C80|SOURCEUNIQUEID=\CFNNLKLJ|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0805|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=DMLEXVNA|JUMPERSVISIBLE=TRUE
-#$pads{81}
- (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 24.207201 -15.884398)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C80" (at 0 0) (layer F.SilkS) hide
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl"
+ (pad 2 smd rect (at 0 -1 90) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 1 90) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 204 FT_VPLL))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#82: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8653.0394mil|Y=2962.37mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=9|SOURCEDESIGNATOR=C81|SOURCEUNIQUEID=\GBWNHRIH|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=QFVUQYHK|JUMPERSVISIBLE=TRUE
-#$pads{82}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 19.889201 -10.728198)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C81" (at 0 0) (layer F.SilkS) hide
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 204 FT_VPLL))
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#83: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8176.0394mil|Y=3133.37mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=10|SOURCEDESIGNATOR=C82|SOURCEUNIQUEID=\EENGKJOX|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=OCRKMTNO|JUMPERSVISIBLE=TRUE
-#$pads{83}
- (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 7.77340100000001 -15.071598)
+
+ (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (at 7.773401 -15.071598)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C82" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C82 (at 0 0) (layer F.SilkS) hide
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl"
+ (pad 1 smd rect (at 0 1 90) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 198 FT_VCC3V3))
+ (pad 2 smd rect (at 0 -1 90) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
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)
-
)
-#Components#84: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8364.0394mil|Y=2680.37mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=11|SOURCEDESIGNATOR=C83|SOURCEUNIQUEID=\HHAKVJBB|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=DIQYDWHF|JUMPERSVISIBLE=TRUE
-#$pads{84}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 12.548601 -3.56539799999999)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (at 12.548601 -3.565398)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C83" (at 0 0) (layer F.SilkS) hide
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 198 FT_VCC3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#85: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8503.0394mil|Y=2681.37mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=12|SOURCEDESIGNATOR=C84|SOURCEUNIQUEID=\LWGXDYUC|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=OTOXKJDI|JUMPERSVISIBLE=TRUE
-#$pads{85}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 16.079201 -3.59079799999999)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (at 16.079201 -3.590798)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C84" (at 0 0) (layer F.SilkS) hide
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 198 FT_VCC3V3))
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#86: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8653.0394mil|Y=3045.37mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=13|SOURCEDESIGNATOR=C85|SOURCEUNIQUEID=\AELWEGKJ|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=IJMSEQWV|JUMPERSVISIBLE=TRUE
-#$pads{86}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 19.889201 -12.836398)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C85" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C85 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
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- (pad "2" smd rect (at -0.00000 0.50000 270) (size 0.4499991 0.5999988)
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- (pad "1" smd rect (at -0.00000 -0.50000 270) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 199 "FT_VCC3V3")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 198 FT_VCC3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#87: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8324.0394mil|Y=3161.37mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=14|SOURCEDESIGNATOR=C86|SOURCEUNIQUEID=\BVMIBMKV|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=RABQGJLH|JUMPERSVISIBLE=TRUE
-#$pads{87}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 11.532601 -15.782798)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C86" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C86 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988)
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- (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 198 FT_VCC3V3))
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#88: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10956.7641mil|Y=3212.0848mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|UNIONINDEX=0|CHANNELOFFSET=0|SOURCEDESIGNATOR=C87|SOURCEUNIQUEID=\AMRWSIKI|SOURCEHIERARCHICALPATH=rev02_10|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=NOLBCUKY|JUMPERSVISIBLE=TRUE
-#$pads{88}
- (module "C_0805" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0805 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 78.403808 -17.070954)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C87" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C87 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (pad "2" smd rect (at 0.00000 -1.00000 90) (size 1.0000005 1.2000001)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
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- (pad "1" smd rect (at 0.00000 1.00000 90) (size 1.0000005 1.2000001)
- (layers B.Cu B.Mask B.Paste) (net 189 "FT_MGMT_VREGIN")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl"
+ (pad 2 smd rect (at 0 -1 90) (size 1.000001 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 1 90) (size 1.000001 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 188 FT_MGMT_VREGIN))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#89: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11118.3614mil|Y=3261.8449mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|UNIONINDEX=0|CHANNELOFFSET=1|SOURCEDESIGNATOR=C88|SOURCEUNIQUEID=\MOXIRHEO|SOURCEHIERARCHICALPATH=rev02_10|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=UIYOIJGI|JUMPERSVISIBLE=TRUE
-#$pads{89}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 82.50838 -18.33486)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C88" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C88 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
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- (pad "2" smd rect (at -0.00000 0.50000 270) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
-#1309 counter:1609 pos:332858(0x5143A) type:2 net:187
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- (pad "1" smd rect (at -0.00000 -0.50000 270) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 189 "FT_MGMT_VREGIN")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 188 FT_MGMT_VREGIN))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#90: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11018mil|Y=3362.7401mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=2|SOURCEDESIGNATOR=C89|SOURCEUNIQUEID=\IDSVWPUG|SOURCEHIERARCHICALPATH=rev02_10|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=JQDEGRBU|JUMPERSVISIBLE=TRUE
-#$pads{90}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 79.9592 -20.897599)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C89" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C89 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 202 "FT_VCCORE1")
- )
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- (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 201 FT_VCCORE1))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#91: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11090.4724mil|Y=3005.5512mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=3|SOURCEDESIGNATOR=C90|SOURCEUNIQUEID=\EHQFITJP|SOURCEHIERARCHICALPATH=rev02_10|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=XEFBORNT|JUMPERSVISIBLE=TRUE
-#$pads{91}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 81.799999 -11.825)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C90" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C90 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (pad "2" smd rect (at 0.50000 -0.00000) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 233 "NetC90_2")
- )
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- (pad "1" smd rect (at -0.50000 -0.00000) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 232 NetC90_2))
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#92: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11016.6535mil|Y=3412.0472mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=4|SOURCEDESIGNATOR=C91|SOURCEUNIQUEID=\INHRRVJA|SOURCEHIERARCHICALPATH=rev02_10|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=QWTDBKGW|JUMPERSVISIBLE=TRUE
-#$pads{92}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 79.924999 -22.149999)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C91" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C91 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
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- (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 200 "FT_VCCA1")
- )
-#1309 counter:310 pos:65223(0xFEC7) type:2 net:5
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- (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 199 FT_VCCA1))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#93: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11272.3228mil|Y=2818.2205mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=5|SOURCEDESIGNATOR=C92|SOURCEUNIQUEID=\HGTMHPIV|SOURCEHIERARCHICALPATH=rev02_10|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0805|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=GEBQGPOW|JUMPERSVISIBLE=TRUE
-#$pads{93}
- (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 86.418999 -7.066801)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C92" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C92 (at 0 0) (layer F.SilkS) hide
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+ (pad 1 smd rect (at 0 -1 270) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 186 FT_MGMT_VPHY))
+ (pad 2 smd rect (at 0 1 270) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
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)
-
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-#$pads{94}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 84.0994 -11.829799)
(path /539EEC0F)
(attr smd)
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+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 233 NetC93_2))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
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)
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)
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-#$pads{95}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 86.1314 -11.423399)
(path /539EEC0F)
(attr smd)
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+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 186 FT_MGMT_VPHY))
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
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)
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-#$pads{96}
- (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 91.186 -7.206999)
(path /539EEC0F)
(attr smd)
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-#1365
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+ (pad 2 smd rect (at 0 1 270) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 -1 270) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 187 FT_MGMT_VPLL))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
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-
)
-#Components#97: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11326mil|Y=2989.7401mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=9|SOURCEDESIGNATOR=C96|SOURCEUNIQUEID=\PUARNBRY|SOURCEHIERARCHICALPATH=rev02_10|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=SQVUVUDV|JUMPERSVISIBLE=TRUE
-#$pads{97}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 87.7824 -11.423399)
(path /539EEC0F)
(attr smd)
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-#1365
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+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 187 FT_MGMT_VPLL))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
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)
-
)
-#Components#98: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11413.3071mil|Y=3524.252mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=10|SOURCEDESIGNATOR=C97|SOURCEUNIQUEID=\EOFTDDJU|SOURCEHIERARCHICALPATH=rev02_10|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=YESUINAL|JUMPERSVISIBLE=TRUE
-#$pads{98}
- (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 90 -25.000001)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C97" (at 0 0) (layer F.SilkS) hide
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-#1365
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+ (pad 1 smd rect (at 1 0 180) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 185 FT_MGMT_VCC3V3))
+ (pad 2 smd rect (at -1 0 180) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
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)
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-#$pads{99}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 80.391 -16.096999)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C98" (at 0 0) (layer F.SilkS) hide
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 185 FT_MGMT_VCC3V3))
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
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)
-
)
-#Components#100: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11383mil|Y=2989.7401mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=12|SOURCEDESIGNATOR=C99|SOURCEUNIQUEID=\UOMCBXOT|SOURCEHIERARCHICALPATH=rev02_10|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=WFOUCNWH|JUMPERSVISIBLE=TRUE
-#$pads{100}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 89.2302 -11.423399)
(path /539EEC0F)
(attr smd)
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 185 FT_MGMT_VCC3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#101: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11500mil|Y=3339.7401mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=13|SOURCEDESIGNATOR=C100|SOURCEUNIQUEID=\XDQMGALF|SOURCEHIERARCHICALPATH=rev02_10|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=FOAYUWIW|JUMPERSVISIBLE=TRUE
-#$pads{101}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 92.202 -20.313399)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C100" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C100 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 186 "FT_MGMT_VCC3V3")
- )
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- (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 185 FT_MGMT_VCC3V3))
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#102: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11035mil|Y=3292.7401mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=14|SOURCEDESIGNATOR=C101|SOURCEUNIQUEID=\CMSOCTWW|SOURCEHIERARCHICALPATH=rev02_10|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=AHIIGDES|JUMPERSVISIBLE=TRUE
-#$pads{102}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 80.391 -19.119599)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C101" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C101 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1309 counter:296 pos:62367(0xF39F) type:2 net:184
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- (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 186 "FT_MGMT_VCC3V3")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 185 FT_MGMT_VCC3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#103: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9962.622mil|Y=3726.9212mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=0|SOURCEDESIGNATOR=C102|SOURCEUNIQUEID=\WYOSFXRW|SOURCEHIERARCHICALPATH=rev02_11|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0805|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=HHBNYIVJ|JUMPERSVISIBLE=TRUE
-#$pads{103}
- (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 53.152599 -30.147798)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C102" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C102 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "2" smd rect (at 1.00000 -0.00000) (size 1.0000005 1.2000001)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1309 counter:430 pos:89703(0x15E67) type:2 net:2
-#010000000005000000047C267C300100000000AA000000010C000200FFFF6700FFFFFFFF072BEA05DCAE3802E501060079350700E501060079350700E5010600793507000000000002020200000000000000000100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000
- (pad "1" smd rect (at -1.00000 -0.00000) (size 1.0000005 1.2000001)
- (layers F.Cu F.Mask F.Paste) (net 4 "3V3_BATT")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl"
+ (pad 2 smd rect (at 1 0) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at -1 0) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 3 3V3_BATT))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#104: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10011.8897mil|Y=4309.7165mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|NAMEAUTOPOSITION=1|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=1|SOURCEDESIGNATOR=C103|SOURCEUNIQUEID=\QFKVCEMG|SOURCEHIERARCHICALPATH=rev02_11|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=UIJYCWJJ|JUMPERSVISIBLE=TRUE
-#$pads{104}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 54.403998 -44.950799)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C103" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C103 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:293 pos:61755(0xF13B) type:2 net:2
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- (pad "1" smd rect (at 0.50000 -0.00000 180) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 4 "3V3_BATT")
- )
-#1309 counter:294 pos:61959(0xF207) type:2 net:5
-#010000000005000000047C267C300100000000AA000000010C000500FFFF6800FFFFFFFF7EB0F4054D9C91020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000
- (pad "2" smd rect (at -0.50000 -0.00000 180) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 3 3V3_BATT))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#105: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9959.8897mil|Y=3816.7165mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=2|SOURCEDESIGNATOR=C104|SOURCEUNIQUEID=\UBSPTQSV|SOURCEHIERARCHICALPATH=rev02_11|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=YWTHRTYU|JUMPERSVISIBLE=TRUE
-#$pads{105}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 53.083198 -32.428599)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C104" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C104 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "2" smd rect (at 0.50000 -0.00000) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1309 counter:292 pos:61551(0xF06F) type:2 net:2
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- (pad "1" smd rect (at -0.50000 -0.00000) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 4 "3V3_BATT")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 3 3V3_BATT))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#106: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9110.1575mil|Y=2205.3543mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=3|SOURCEDESIGNATOR=C105|SOURCEUNIQUEID=\QWPWWFBJ|SOURCEHIERARCHICALPATH=rev02_11|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=MGDBNRJX|JUMPERSVISIBLE=TRUE
-#$pads{106}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 31.5 8.500001)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C105" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C105 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
- )
-#1309 counter:874 pos:180499(0x2C113) type:2 net:5
-#010000000005000000047C267C300100000000AA000000200C000500FFFF6A00FFFFFFFF87196E05B4814D010DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000
- (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#107: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10441.8504mil|Y=3903.189mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=0|SOURCEDESIGNATOR=C106|SOURCEUNIQUEID=\MEYYVMVX|SOURCEHIERARCHICALPATH=rev02_12|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=GGFYPHNG|JUMPERSVISIBLE=TRUE
-#$pads{107}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 65.325 -34.625001)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C106" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C106 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1309 counter:290 pos:61143(0xEED7) type:2 net:2
-#010000000005000000047C267C300100000000AA000000010C000200FFFF6B00FFFFFFFFC84C3906609350020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000
- (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 4 "3V3_BATT")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 3 3V3_BATT))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#108: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10889mil|Y=3641.37mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=1|SOURCEDESIGNATOR=C107|SOURCEUNIQUEID=\PAWKAJCY|SOURCEHIERARCHICALPATH=rev02_12|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=AAEFXSWW|JUMPERSVISIBLE=TRUE
-#$pads{108}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 76.6826 -27.974798)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C107" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C107 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 4 "3V3_BATT")
- )
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- (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 3 3V3_BATT))
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#109: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9109.5354mil|Y=2500.6299mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=0|SOURCEDESIGNATOR=C108|SOURCEUNIQUEID=\VHOQJSCE|SOURCEHIERARCHICALPATH=rev02_13|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=PYEAGLIG|JUMPERSVISIBLE=TRUE
-#$pads{109}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 31.484199 1.000001)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C108" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C108 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
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- (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#110: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10073mil|Y=5213mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=0|SOURCEDESIGNATOR=C109|SOURCEUNIQUEID=\NLDTESMB|SOURCEHIERARCHICALPATH=rev02_14|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=QPTWYOOY|JUMPERSVISIBLE=TRUE
-#$pads{110}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 55.9562 -67.8942)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C109" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C109 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
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- (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 175 "FPGA_VCCAUX_1V8")
- )
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- (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 174 FPGA_VCCAUX_1V8))
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#111: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9222.4487mil|Y=3726.937mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=0|SOURCEDESIGNATOR=C110|SOURCEUNIQUEID=\UPMERWCR|SOURCEHIERARCHICALPATH=rev02_15|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=VCTVWFHJ|JUMPERSVISIBLE=TRUE
-#$pads{111}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 34.352197 -30.1482)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C110" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C110 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
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- (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
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- (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#112: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10476.315mil|Y=6022mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=1|SOURCEDESIGNATOR=C111|SOURCEUNIQUEID=\DUNKGNEL|SOURCEHIERARCHICALPATH=rev02_15|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=WJXAJJNT|JUMPERSVISIBLE=TRUE
-#$pads{112}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 66.200401 -88.4428)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C111" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C111 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
- )
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- (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#113: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9781.4173mil|Y=3700.4331mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 0.00000000000000E+0000|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=2|SOURCEDESIGNATOR=C112|SOURCEUNIQUEID=\HLIPXGCY|SOURCEHIERARCHICALPATH=rev02_15|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=WNRREBYU|JUMPERSVISIBLE=TRUE
-#$pads{113}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 48.549999 -29.475001)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C112" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C112 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
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-
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- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
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- (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#114: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9447mil|Y=5399mil|PATTERN=C_1210|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=0|SOURCEDESIGNATOR=C113|SOURCEUNIQUEID=\QTTUGYEO|SOURCEHIERARCHICALPATH=rev02_18|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC1210|SOURCEDESCRIPTION=1210 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=JRBMTRMH|JUMPERSVISIBLE=TRUE
-#$pads{114}
- (module "C_1210" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_1210 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 40.0558 -72.6186)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C113" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C113 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
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- (pad "2" smd rect (at 0.00000 -1.50000 90) (size 1.5999993 2.5999999)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
-#1309 counter:1723 pos:356114(0x56F12) type:2 net:300
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- (pad "1" smd rect (at 0.00000 1.50000 90) (size 1.5999993 2.5999999)
- (layers B.Cu B.Mask B.Paste) (net 302 "VCC_5V0")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl"
+ (pad 2 smd rect (at 0 -1.5 90) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 1.5 90) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
+ (net 301 VCC_5V0))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#115: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8122mil|Y=4309mil|PATTERN=C_1210|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=1|SOURCEDESIGNATOR=C114|SOURCEUNIQUEID=\PWEUUEUQ|SOURCEHIERARCHICALPATH=rev02_18|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC1210|SOURCEDESCRIPTION=1210 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=RVKYFYQA|JUMPERSVISIBLE=TRUE
-#$pads{115}
- (module "C_1210" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_1210 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 6.4008 -44.9326)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C114" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C114 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
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- (layers B.Cu B.Mask B.Paste) (net 302 "VCC_5V0")
- )
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- (pad "2" smd rect (at 0.00000 1.50000 270) (size 1.5999993 2.5999999)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl"
+ (pad 1 smd rect (at 0 -1.5 270) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
+ (net 301 VCC_5V0))
+ (pad 2 smd rect (at 0 1.5 270) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#116: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9137mil|Y=5526mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=2|SOURCEDESIGNATOR=C115|SOURCEUNIQUEID=\OLWAEWGX|SOURCEHIERARCHICALPATH=rev02_18|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=MKUQPUFL|JUMPERSVISIBLE=TRUE
-#$pads{116}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 32.1818 -75.8444)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C115" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C115 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 235 "NetC115_1")
- )
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- (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 234 NetC115_1))
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#117: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8419.2126mil|Y=4178.7795mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=3|SOURCEDESIGNATOR=C116|SOURCEUNIQUEID=\FYUTDSDO|SOURCEHIERARCHICALPATH=rev02_18|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=XOPAERVC|JUMPERSVISIBLE=TRUE
-#$pads{117}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 13.95 -41.624999)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C116" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C116 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
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- (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 236 "NetC116_1")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 235 NetC116_1))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#118: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9137mil|Y=5705mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=4|SOURCEDESIGNATOR=C117|SOURCEUNIQUEID=\YFILBMRJ|SOURCEHIERARCHICALPATH=rev02_18|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=JPWDSOTS|JUMPERSVISIBLE=TRUE
-#$pads{118}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 32.1818 -80.391)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C117" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C117 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:1596 pos:330206(0x509DE) type:2 net:235
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- (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 237 "NetC117_1")
- )
-#1309 counter:1597 pos:330410(0x50AAA) type:2 net:236
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- (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 238 "NetC117_2")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 236 NetC117_1))
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 237 NetC117_2))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#119: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8420.1969mil|Y=4010.4724mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=5|SOURCEDESIGNATOR=C118|SOURCEUNIQUEID=\CPFDPYEB|SOURCEHIERARCHICALPATH=rev02_18|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=UYKLCONM|JUMPERSVISIBLE=TRUE
-#$pads{119}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 13.975001 -37.349999)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C118" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C118 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 240 "NetC118_2")
- )
-#1309 counter:1595 pos:330002(0x50912) type:2 net:237
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- (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 239 "NetC118_1")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 239 NetC118_2))
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 238 NetC118_1))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#120: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9447mil|Y=5666mil|PATTERN=C_1210|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=6|SOURCEDESIGNATOR=C119|SOURCEUNIQUEID=\APYGNXOL|SOURCEHIERARCHICALPATH=rev02_18|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC1210|SOURCEDESCRIPTION=1210 CAPACITOR X5R 6.3V|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=PXBBLPVS|JUMPERSVISIBLE=TRUE
-#$pads{120}
- (module "C_1210" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_1210 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 40.0558 -79.4004)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C119" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C119 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "2" smd rect (at 0.00000 1.50000 270) (size 1.5999993 2.5999999)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
-#1309 counter:1719 pos:355298(0x56BE2) type:2 net:235
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- (layers B.Cu B.Mask B.Paste) (net 237 "NetC117_1")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl"
+ (pad 2 smd rect (at 0 1.5 270) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 -1.5 270) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
+ (net 236 NetC117_1))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#121: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8122mil|Y=4059mil|PATTERN=C_1210|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=7|SOURCEDESIGNATOR=C120|SOURCEUNIQUEID=\RVLXWYJA|SOURCEHIERARCHICALPATH=rev02_18|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC1210|SOURCEDESCRIPTION=1210 CAPACITOR X5R 6.3V|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=BKTXXRKO|JUMPERSVISIBLE=TRUE
-#$pads{121}
- (module "C_1210" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_1210 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 6.4008 -38.5826)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C120" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C120 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "1" smd rect (at 0.00000 1.50000 90) (size 1.5999993 2.5999999)
- (layers B.Cu B.Mask B.Paste) (net 239 "NetC118_1")
- )
-#1309 counter:1717 pos:354890(0x56A4A) type:2 net:5
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- (pad "2" smd rect (at 0.00000 -1.50000 90) (size 1.5999993 2.5999999)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl"
+ (pad 1 smd rect (at 0 1.5 90) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
+ (net 238 NetC118_1))
+ (pad 2 smd rect (at 0 -1.5 90) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#122: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10668.2283mil|Y=6386.4567mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=0|SOURCEDESIGNATOR=C121|SOURCEUNIQUEID=\ICNOAPWR|SOURCEHIERARCHICALPATH=rev02_19|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=CKKWEHYQ|JUMPERSVISIBLE=TRUE
-#$pads{122}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 71.074999 -97.7)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C121" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C121 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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)
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- (pad "1" smd rect (at -0.00000 0.50000 90) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
- )
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- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#123: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9523.5433mil|Y=6221.1024mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=1|SOURCEDESIGNATOR=C122|SOURCEUNIQUEID=\FFYTTMBO|SOURCEHIERARCHICALPATH=rev02_19|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=KGSOAAHC|JUMPERSVISIBLE=TRUE
-#$pads{123}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 42 -93.500001)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C122" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C122 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:281 pos:59307(0xE7AB) type:2 net:5
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- (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1309 counter:282 pos:59511(0xE877) type:2 net:301
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- (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#124: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11008mil|Y=5355mil|PATTERN=C_D|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=0|SOURCEDESIGNATOR=C123|SOURCEUNIQUEID=\JXXIWEOF|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=rev02_1.SCHLIB|SOURCELIBREFERENCE=CP_E-035X080|SOURCEDESCRIPTION=Kemet Tantalum Capacitor|UNIQUEID=WQAVGVCY|JUMPERSVISIBLE=TRUE
-#$pads{124}
- (module "C_D" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_D (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 79.7052 -71.501)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C123" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C123 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "1" smd rect (at 0.00000 3.25000 90) (size 2.4000003 2.5999999)
- (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0")
- )
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- (pad "2" smd rect (at 0.00000 -3.25000 90) (size 2.4000003 2.5999999)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/5917D381-109F.wrl"
+ (pad 1 smd rect (at 0 3.25 90) (size 2.4 2.6) (layers F.Cu F.Paste F.Mask)
+ (net 175 FPGA_VCCINT_1V0))
+ (pad 2 smd rect (at 0 -3.25 90) (size 2.4 2.6) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/5917D381-109F.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#125: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10269mil|Y=5291mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=1|SOURCEDESIGNATOR=C124|SOURCEUNIQUEID=\CADCJONU|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=VUROFJJU|JUMPERSVISIBLE=TRUE
-#$pads{125}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 60.9346 -69.8754)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C124" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C124 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:279 pos:58899(0xE613) type:2 net:174
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- (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0")
- )
-#1309 counter:280 pos:59103(0xE6DF) type:2 net:5
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- (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 175 FPGA_VCCINT_1V0))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#126: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10151mil|Y=5410mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=2|SOURCEDESIGNATOR=C125|SOURCEUNIQUEID=\JEGDCVHC|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=VWVMVLNV|JUMPERSVISIBLE=TRUE
-#$pads{126}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 57.9374 -72.898)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C125" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C125 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:277 pos:58491(0xE47B) type:2 net:5
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- (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1309 counter:278 pos:58695(0xE547) type:2 net:174
-#010000000005000000047C267C300100000000AA000000010C00AE00FFFF7E00FFFFFFFF62EC0F06208039030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000
- (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 175 FPGA_VCCINT_1V0))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#127: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9757mil|Y=5869mil|PATTERN=C_1210|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=3|SOURCEDESIGNATOR=C126|SOURCEUNIQUEID=\SSOLGDTG|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC1210|SOURCEDESCRIPTION=1210 CAPACITOR X5R 6.3V|UNIQUEID=ARVTLLPA|JUMPERSVISIBLE=TRUE
-#$pads{127}
- (module "C_1210" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_1210 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 47.9298 -84.5566)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C126" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C126 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:463 pos:96435(0x178B3) type:2 net:5
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- (pad "2" smd rect (at 0.00000 -1.50000 90) (size 1.5999993 2.5999999)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1309 counter:464 pos:96639(0x1797F) type:2 net:173
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- (pad "1" smd rect (at 0.00000 1.50000 90) (size 1.5999993 2.5999999)
- (layers F.Cu F.Mask F.Paste) (net 175 "FPGA_VCCAUX_1V8")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl"
+ (pad 2 smd rect (at 0 -1.5 90) (size 1.599999 2.6) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 1.5 90) (size 1.599999 2.6) (layers F.Cu F.Paste F.Mask)
+ (net 174 FPGA_VCCAUX_1V8))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#128: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10030.4489mil|Y=6122.5591mil|PATTERN=C_D|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=4|SOURCEDESIGNATOR=C127|SOURCEUNIQUEID=\RMLSTVRA|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=rev02_1.SCHLIB|SOURCELIBREFERENCE=CP_E-035X080|SOURCEDESCRIPTION=Kemet Tantalum Capacitor|UNIQUEID=RAHJTGPV|JUMPERSVISIBLE=TRUE
-#$pads{128}
- (module "C_D" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_D (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 54.875402 -90.997001)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C127" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C127 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:465 pos:96843(0x17A4B) type:2 net:5
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- (pad "2" smd rect (at -3.25000 -0.00000 180) (size 2.4000003 2.5999999)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1309 counter:466 pos:97047(0x17B17) type:2 net:174
-#010000000005000000047C267C300100000000AA000000010C00AE00FFFF8000FFFFFFFF900C0E06773AA603F26A0E00869E0F00F26A0E00869E0F00F26A0E00869E0F000000000002020200000000008066400100000000000000F200030004007980010079800100798001007447FFFFE54C00000000000101010102010100000000000000000000010000010000
- (pad "1" smd rect (at 3.25000 -0.00000 180) (size 2.4000003 2.5999999)
- (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/5917D381-109F.wrl"
+ (pad 2 smd rect (at -3.25 0 180) (size 2.4 2.6) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 3.25 0 180) (size 2.4 2.6) (layers F.Cu F.Paste F.Mask)
+ (net 175 FPGA_VCCINT_1V0))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/5917D381-109F.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#129: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10269mil|Y=5332mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=5|SOURCEDESIGNATOR=C128|SOURCEUNIQUEID=\KTAOJGJL|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=FRMFTCXF|JUMPERSVISIBLE=TRUE
-#$pads{129}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 60.9346 -70.9168)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C128" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C128 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:275 pos:58083(0xE2E3) type:2 net:174
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- (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0")
- )
-#1309 counter:276 pos:58287(0xE3AF) type:2 net:5
-#010000000005000000047C267C300100000000AA000000010C000500FFFF8100FFFFFFFFC3ED210640992D030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000
- (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 175 FPGA_VCCINT_1V0))
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#130: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10270mil|Y=5054mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=6|SOURCEDESIGNATOR=C129|SOURCEUNIQUEID=\BTQWICWO|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=PRMKDJTM|JUMPERSVISIBLE=TRUE
-#$pads{130}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 60.96 -63.8556)
(path /539EEC0F)
(attr smd)
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+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 175 FPGA_VCCINT_1V0))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
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-#$pads{131}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 57.9374 -71.9074)
(path /539EEC0F)
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+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 175 FPGA_VCCINT_1V0))
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
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)
-#Components#132: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10152mil|Y=5174mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=8|SOURCEDESIGNATOR=C131|SOURCEUNIQUEID=\WBWUMPIJ|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=EJOQICXQ|JUMPERSVISIBLE=TRUE
-#$pads{132}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 57.9628 -66.9036)
(path /539EEC0F)
(attr smd)
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+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 175 FPGA_VCCINT_1V0))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
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(scale (xyz 1 1 1))
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-#$pads{133}
- (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 52.07 -83.0072)
(path /539EEC0F)
(attr smd)
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+ (pad 1 smd rect (at -1 0) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 174 FPGA_VCCAUX_1V8))
+ (pad 2 smd rect (at 1 0) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
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)
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-#$pads{134}
- (module "C_1210" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_1210 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 42.8498 -56.091351)
(path /539EEC0F)
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+ (pad 1 smd rect (at 0 -1.5 270) (size 1.599999 2.6) (layers F.Cu F.Paste F.Mask)
+ (net 175 FPGA_VCCINT_1V0))
+ (pad 2 smd rect (at 0 1.5 270) (size 1.599999 2.6) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
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)
-#Components#135: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10132mil|Y=5312mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=11|SOURCEDESIGNATOR=C134|SOURCEUNIQUEID=\KAWSLHEU|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=JIFIADUK|JUMPERSVISIBLE=TRUE
-#$pads{135}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 57.4548 -70.4088)
(path /539EEC0F)
(attr smd)
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-#1365
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+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 175 FPGA_VCCINT_1V0))
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
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)
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)
-#Components#136: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10270mil|Y=5213mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=12|SOURCEDESIGNATOR=C135|SOURCEUNIQUEID=\KKOUMAMA|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=GTQLUGLB|JUMPERSVISIBLE=TRUE
-#$pads{136}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 60.96 -67.8942)
(path /539EEC0F)
(attr smd)
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-#1365
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+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 175 FPGA_VCCINT_1V0))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
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(scale (xyz 1 1 1))
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)
-#Components#137: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9602mil|Y=5362mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=13|SOURCEDESIGNATOR=C136|SOURCEUNIQUEID=\GJCWIVDT|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=MRLXWTKW|JUMPERSVISIBLE=TRUE
-#$pads{137}
- (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 43.9928 -71.6788)
(path /539EEC0F)
(attr smd)
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-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl"
+ (pad 2 smd rect (at 0 1 270) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 -1 270) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 174 FPGA_VCCAUX_1V8))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#138: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10804mil|Y=5131mil|PATTERN=C_1210|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=14|SOURCEDESIGNATOR=C137|SOURCEUNIQUEID=\VFFGYKSA|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC1210|SOURCEDESCRIPTION=1210 CAPACITOR X5R 6.3V|UNIQUEID=YASIHFYM|JUMPERSVISIBLE=TRUE
-#$pads{138}
- (module "C_1210" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_1210 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 74.5236 -65.8114)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C137" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C137 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "2" smd rect (at 0.00000 1.50000 270) (size 1.5999993 2.5999999)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
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- (pad "1" smd rect (at 0.00000 -1.50000 270) (size 1.5999993 2.5999999)
- (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl"
+ (pad 2 smd rect (at 0 1.5 270) (size 1.599999 2.6) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 -1.5 270) (size 1.599999 2.6) (layers F.Cu F.Paste F.Mask)
+ (net 175 FPGA_VCCINT_1V0))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#139: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10309mil|Y=5173mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=15|SOURCEDESIGNATOR=C138|SOURCEUNIQUEID=\YWNAQUNK|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=MGSREACB|JUMPERSVISIBLE=TRUE
-#$pads{139}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 61.9506 -66.8782)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C138" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C138 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
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- (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0")
- )
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- (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 175 FPGA_VCCINT_1V0))
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#140: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9920mil|Y=5915mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=16|SOURCEDESIGNATOR=C139|SOURCEUNIQUEID=\JLPOIAJS|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=NHMEPCLC|JUMPERSVISIBLE=TRUE
-#$pads{140}
- (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 52.07 -85.725)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C139" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C139 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "1" smd rect (at -1.00000 0.00000) (size 1.0000005 1.2000001)
- (layers F.Cu F.Mask F.Paste) (net 175 "FPGA_VCCAUX_1V8")
- )
-#1309 counter:424 pos:88479(0x1599F) type:2 net:5
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- (pad "2" smd rect (at 1.00000 0.00000) (size 1.0000005 1.2000001)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl"
+ (pad 1 smd rect (at -1 0) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 174 FPGA_VCCAUX_1V8))
+ (pad 2 smd rect (at 1 0) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#141: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10305mil|Y=5751mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=17|SOURCEDESIGNATOR=C140|SOURCEUNIQUEID=\QEFSTWGR|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=MKDQAXOV|JUMPERSVISIBLE=TRUE
-#$pads{141}
- (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 61.849 -81.5594)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C140" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C140 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:421 pos:87867(0x1573B) type:2 net:5
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- (pad "2" smd rect (at 1.00000 0.00000) (size 1.0000005 1.2000001)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1309 counter:422 pos:88071(0x15807) type:2 net:174
-#010000000005000000047C267C300100000000AA000000010C00AE00FFFF8D00FFFFFFFF2B691E0670886D03E501060079350700E501060079350700E5010600793507000000000002020200000000000000000100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000
- (pad "1" smd rect (at -1.00000 0.00000) (size 1.0000005 1.2000001)
- (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl"
+ (pad 2 smd rect (at 1 0) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at -1 0) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 175 FPGA_VCCINT_1V0))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#142: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10237mil|Y=4710mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=18|SOURCEDESIGNATOR=C141|SOURCEUNIQUEID=\DKSBIRNJ|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=KYSSKNAN|JUMPERSVISIBLE=TRUE
-#$pads{142}
- (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 60.1218 -55.118)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C141" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C141 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "1" smd rect (at 0.00000 -1.00000 270) (size 1.0000005 1.2000001)
- (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0")
- )
-#1309 counter:420 pos:87663(0x1566F) type:2 net:5
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- (pad "2" smd rect (at 0.00000 1.00000 270) (size 1.0000005 1.2000001)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl"
+ (pad 1 smd rect (at 0 -1 270) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 175 FPGA_VCCINT_1V0))
+ (pad 2 smd rect (at 0 1 270) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#143: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10269mil|Y=5134mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=19|SOURCEDESIGNATOR=C142|SOURCEUNIQUEID=\BHBGUDON|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=EBUBBCRJ|JUMPERSVISIBLE=TRUE
-#$pads{143}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 60.9346 -65.8876)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C142" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C142 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
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- (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 175 FPGA_VCCINT_1V0))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#144: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10054mil|Y=5351mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=20|SOURCEDESIGNATOR=C143|SOURCEUNIQUEID=\EETDNOWB|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=MQFBMSDJ|JUMPERSVISIBLE=TRUE
-#$pads{144}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 55.4736 -71.3994)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C143" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C143 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 175 "FPGA_VCCAUX_1V8")
- )
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- (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 174 FPGA_VCCAUX_1V8))
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#145: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10692mil|Y=5336mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=21|SOURCEDESIGNATOR=C144|SOURCEUNIQUEID=\SOMXTCQD|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=FXQTOOWG|JUMPERSVISIBLE=TRUE
-#$pads{145}
- (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 71.6788 -71.0184)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C144" (at 0 0) (layer F.SilkS) hide
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+ (net 6 GND))
+ (pad 1 smd rect (at 0 1 90) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 175 FPGA_VCCINT_1V0))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
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-#$pads{146}
- (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 43.9166 -67.1068)
(path /539EEC0F)
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+ (net 175 FPGA_VCCINT_1V0))
+ (pad 2 smd rect (at 0 1 270) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
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-#$pads{147}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 58.9788 -65.8876)
(path /539EEC0F)
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+ (net 6 GND))
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 175 FPGA_VCCINT_1V0))
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-#$pads{148}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 55.4736 -73.406)
(path /539EEC0F)
(attr smd)
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+ (net 174 FPGA_VCCAUX_1V8))
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
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-#$pads{149}
- (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 41.4274 -67.1068)
(path /539EEC0F)
(attr smd)
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+ (pad 2 smd rect (at 0 1 270) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 -1 270) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 175 FPGA_VCCINT_1V0))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
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)
-#Components#150: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10597mil|Y=5334mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=26|SOURCEDESIGNATOR=C149|SOURCEUNIQUEID=\RDEWHOQS|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=EHDSQRNA|JUMPERSVISIBLE=TRUE
-#$pads{150}
- (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 69.2658 -70.9676)
(path /539EEC0F)
(attr smd)
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+ (net 175 FPGA_VCCINT_1V0))
+ (pad 2 smd rect (at 0 -1 90) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
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)
-#Components#151: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10191mil|Y=5093mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=27|SOURCEDESIGNATOR=C150|SOURCEUNIQUEID=\QFILAUKW|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=XMIBDCBW|JUMPERSVISIBLE=TRUE
-#$pads{151}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 58.9534 -64.8462)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C150" (at 0 0) (layer F.SilkS) hide
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-#1365
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+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 175 FPGA_VCCINT_1V0))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
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-#Components#152: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10191mil|Y=5331mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=28|SOURCEDESIGNATOR=C151|SOURCEUNIQUEID=\FABFVOSD|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=YIKFVDUH|JUMPERSVISIBLE=TRUE
-#$pads{152}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 58.9534 -70.8914)
(path /539EEC0F)
(attr smd)
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-#1365
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+ (net 174 FPGA_VCCAUX_1V8))
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#153: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10126mil|Y=5848mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=29|SOURCEDESIGNATOR=C152|SOURCEUNIQUEID=\EAMPINXP|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=XHGQMNTA|JUMPERSVISIBLE=TRUE
-#$pads{153}
- (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 57.3024 -84.0232)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C152" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C152 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl"
+ (pad 2 smd rect (at -1 0 180) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 1 0 180) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 175 FPGA_VCCINT_1V0))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#154: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10645mil|Y=5164mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=30|SOURCEDESIGNATOR=C153|SOURCEUNIQUEID=\PRTQAUVE|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=WBTYCKKW|JUMPERSVISIBLE=TRUE
-#$pads{154}
- (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 70.485 -66.6496)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C153" (at 0 0) (layer F.SilkS) hide
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)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl"
+ (pad 1 smd rect (at 0 -1 270) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 175 FPGA_VCCINT_1V0))
+ (pad 2 smd rect (at 0 1 270) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#155: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10269mil|Y=5093mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=31|SOURCEDESIGNATOR=C154|SOURCEUNIQUEID=\JMCSNJMV|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=LNGGNGIW|JUMPERSVISIBLE=TRUE
-#$pads{155}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 60.9346 -64.8462)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C154" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C154 (at 0 0) (layer F.SilkS) hide
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)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988)
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 175 FPGA_VCCINT_1V0))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#156: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10132mil|Y=5114mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=32|SOURCEDESIGNATOR=C155|SOURCEUNIQUEID=\HWWACYXY|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=FJUJQUOH|JUMPERSVISIBLE=TRUE
-#$pads{156}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 57.4548 -65.3796)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C155" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C155 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 174 FPGA_VCCAUX_1V8))
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#157: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10104mil|Y=4658mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=33|SOURCEDESIGNATOR=C156|SOURCEUNIQUEID=\FQVNOWBG|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=DKXSNRTQ|JUMPERSVISIBLE=TRUE
-#$pads{157}
- (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 56.7436 -53.7972)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C156" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C156 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl"
+ (pad 2 smd rect (at -1 0 180) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 1 0 180) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 175 FPGA_VCCINT_1V0))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#158: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10126mil|Y=5751mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=34|SOURCEDESIGNATOR=C157|SOURCEUNIQUEID=\YFQYDSSK|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=CVEFTQDP|JUMPERSVISIBLE=TRUE
-#$pads{158}
- (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 57.3024 -81.5594)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C157" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C157 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl"
+ (pad 1 smd rect (at 1 0 180) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 175 FPGA_VCCINT_1V0))
+ (pad 2 smd rect (at -1 0 180) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#159: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10151mil|Y=5055mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=35|SOURCEDESIGNATOR=C158|SOURCEUNIQUEID=\QVQXPMMW|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=KIQPBDXE|JUMPERSVISIBLE=TRUE
-#$pads{159}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 57.9374 -63.881)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C158" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C158 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
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- (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 175 FPGA_VCCINT_1V0))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#160: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10052mil|Y=5114mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=36|SOURCEDESIGNATOR=C159|SOURCEUNIQUEID=\NYFULQXY|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=MSXFGCSJ|JUMPERSVISIBLE=TRUE
-#$pads{160}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 55.4228 -65.3796)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C159" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C159 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988)
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- )
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- (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 174 FPGA_VCCAUX_1V8))
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#161: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9500mil|Y=5362mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=37|SOURCEDESIGNATOR=C160|SOURCEUNIQUEID=\GOKWKMFS|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=LWRSMYRG|JUMPERSVISIBLE=TRUE
-#$pads{161}
- (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 41.402 -71.6788)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C160" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C160 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
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-
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- (pad "2" smd rect (at 0.00000 -1.00000 90) (size 1.0000005 1.2000001)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1309 counter:402 pos:83991(0x14817) type:2 net:174
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- (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl"
+ (pad 2 smd rect (at 0 -1 90) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 1 90) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 175 FPGA_VCCINT_1V0))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#162: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10105mil|Y=4752mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=38|SOURCEDESIGNATOR=C161|SOURCEUNIQUEID=\DJHIEKAD|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=WYTOGKEY|JUMPERSVISIBLE=TRUE
-#$pads{162}
- (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 56.769 -56.1848)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C161" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C161 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
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- (pad "1" smd rect (at 1.00000 0.00000 180) (size 1.0000005 1.2000001)
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- )
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- (pad "2" smd rect (at -1.00000 0.00000 180) (size 1.0000005 1.2000001)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl"
+ (pad 1 smd rect (at 1 0 180) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 175 FPGA_VCCINT_1V0))
+ (pad 2 smd rect (at -1 0 180) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#163: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10269mil|Y=5371mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=39|SOURCEDESIGNATOR=C162|SOURCEUNIQUEID=\LDLOOKIM|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=TXVNGPEM|JUMPERSVISIBLE=TRUE
-#$pads{163}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 60.9346 -71.9074)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C162" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C162 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
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- (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
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- (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 175 FPGA_VCCINT_1V0))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#164: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10210mil|Y=5390mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=40|SOURCEDESIGNATOR=C163|SOURCEUNIQUEID=\YAHPSBMQ|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=DINMDVVI|JUMPERSVISIBLE=TRUE
-#$pads{164}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 59.436 -72.39)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C163" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C163 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
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- (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0")
- )
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- (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 175 FPGA_VCCINT_1V0))
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#165: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10270mil|Y=5410mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=41|SOURCEDESIGNATOR=C164|SOURCEUNIQUEID=\LHKJBFNV|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=EQLVGNFT|JUMPERSVISIBLE=TRUE
-#$pads{165}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 60.96 -72.898)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C164" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C164 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
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- (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
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- (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 175 FPGA_VCCINT_1V0))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#166: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10381mil|Y=5889mil|PATTERN=C_1210|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=0|SOURCEDESIGNATOR=C165|SOURCEUNIQUEID=\VICSFWJH|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC1210|SOURCEDESCRIPTION=1210 CAPACITOR X5R 6.3V|UNIQUEID=FMFVJAVI|JUMPERSVISIBLE=TRUE
-#$pads{166}
- (module "C_1210" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_1210 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 63.7794 -85.0646)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C165" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C165 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
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- (pad "1" smd rect (at 1.50000 0.00000 180) (size 1.5999993 2.5999999)
- (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
- )
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- (pad "2" smd rect (at -1.50000 0.00000 180) (size 1.5999993 2.5999999)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl"
+ (pad 1 smd rect (at 1.5 0 180) (size 1.599999 2.6) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at -1.5 0 180) (size 1.599999 2.6) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#167: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9535mil|Y=5914mil|PATTERN=C_1210|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=1|SOURCEDESIGNATOR=C166|SOURCEUNIQUEID=\FHBIJDGF|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC1210|SOURCEDESCRIPTION=1210 CAPACITOR X5R 6.3V|UNIQUEID=PRULVNPQ|JUMPERSVISIBLE=TRUE
-#$pads{167}
- (module "C_1210" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_1210 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 42.291 -85.6996)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C166" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C166 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
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- (pad "2" smd rect (at -1.50000 0.00000 180) (size 1.5999993 2.5999999)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1309 counter:456 pos:95007(0x1731F) type:2 net:301
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- (pad "1" smd rect (at 1.50000 0.00000 180) (size 1.5999993 2.5999999)
- (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl"
+ (pad 2 smd rect (at -1.5 0 180) (size 1.599999 2.6) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 1.5 0 180) (size 1.599999 2.6) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#168: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10580mil|Y=4681.063mil|PATTERN=C_1210|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=2|SOURCEDESIGNATOR=C167|SOURCEUNIQUEID=\DXFWSDGW|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC1210|SOURCEDESCRIPTION=1210 CAPACITOR X5R 6.3V|UNIQUEID=DAPOGPMM|JUMPERSVISIBLE=TRUE
-#$pads{168}
- (module "C_1210" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_1210 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 68.834 -54.383)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C167" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C167 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:453 pos:94395(0x170BB) type:2 net:301
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- (pad "1" smd rect (at 0.00000 -1.50000 270) (size 1.5999993 2.5999999)
- (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
- )
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- (pad "2" smd rect (at 0.00000 1.50000 270) (size 1.5999993 2.5999999)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl"
+ (pad 1 smd rect (at 0 -1.5 270) (size 1.599999 2.6) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at 0 1.5 270) (size 1.599999 2.6) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#169: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10747mil|Y=5531mil|PATTERN=C_1210|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=3|SOURCEDESIGNATOR=C168|SOURCEUNIQUEID=\WJSOPFKW|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC1210|SOURCEDESCRIPTION=1210 CAPACITOR X5R 6.3V|UNIQUEID=VARLRNLF|JUMPERSVISIBLE=TRUE
-#$pads{169}
- (module "C_1210" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_1210 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 73.0758 -75.9714)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C168" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C168 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:451 pos:93987(0x16F23) type:2 net:5
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- (pad "2" smd rect (at 0.00000 1.50000 270) (size 1.5999993 2.5999999)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1309 counter:452 pos:94191(0x16FEF) type:2 net:301
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- (pad "1" smd rect (at 0.00000 -1.50000 270) (size 1.5999993 2.5999999)
- (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl"
+ (pad 2 smd rect (at 0 1.5 270) (size 1.599999 2.6) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 -1.5 270) (size 1.599999 2.6) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#170: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10360mil|Y=4695.2355mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=4|SOURCEDESIGNATOR=C169|SOURCEUNIQUEID=\BPYFJABG|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=QKHLROKL|JUMPERSVISIBLE=TRUE
-#$pads{170}
- (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 63.246 -54.742982)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C169" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C169 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:397 pos:82971(0x1441B) type:2 net:5
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- (pad "2" smd rect (at 0.00000 1.00000 270) (size 1.0000005 1.2000001)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1309 counter:398 pos:83175(0x144E7) type:2 net:301
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- (pad "1" smd rect (at 0.00000 -1.00000 270) (size 1.0000005 1.2000001)
- (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl"
+ (pad 2 smd rect (at 0 1 270) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 -1 270) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#171: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9554mil|Y=5771mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=5|SOURCEDESIGNATOR=C170|SOURCEUNIQUEID=\RRHSPQFC|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=JHFCMWII|JUMPERSVISIBLE=TRUE
-#$pads{171}
- (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 42.7736 -82.0674)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C170" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C170 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:395 pos:82563(0x14283) type:2 net:301
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- (pad "1" smd rect (at 1.00000 0.00000 180) (size 1.0000005 1.2000001)
- (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
- )
-#1309 counter:396 pos:82767(0x1434F) type:2 net:5
-#010000000005000000047C267C300100000000AA000000010C000500FFFFAB00FFFFFFFF3BD1AB05B0957003E501060079350700E501060079350700E5010600793507000000000002020200000000008066400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000
- (pad "2" smd rect (at -1.00000 0.00000 180) (size 1.0000005 1.2000001)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl"
+ (pad 1 smd rect (at 1 0 180) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at -1 0 180) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#172: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9556mil|Y=5661mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=6|SOURCEDESIGNATOR=C171|SOURCEUNIQUEID=\TRJXUBPT|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=GHFMCICO|JUMPERSVISIBLE=TRUE
-#$pads{172}
- (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 42.8244 -79.2734)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C171" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C171 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:393 pos:82155(0x140EB) type:2 net:5
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- (pad "2" smd rect (at -1.00000 0.00000 180) (size 1.0000005 1.2000001)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1309 counter:394 pos:82359(0x141B7) type:2 net:301
-#010000000005000000047C267C300100000000AA000000010C002D01FFFFAC00FFFFFFFF2523B805D0CC5F03E501060079350700E501060079350700E5010600793507000000000002020200000000008066400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000
- (pad "1" smd rect (at 1.00000 0.00000 180) (size 1.0000005 1.2000001)
- (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl"
+ (pad 2 smd rect (at -1 0 180) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 1 0 180) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#173: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9451mil|Y=5022mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=7|SOURCEDESIGNATOR=C172|SOURCEUNIQUEID=\TOKCMBPI|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=FOPCTFUL|JUMPERSVISIBLE=TRUE
-#$pads{173}
- (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 40.1574 -63.0428)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C172" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C172 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:391 pos:81747(0x13F53) type:2 net:301
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- (pad "1" smd rect (at 0.00000 -1.00000 270) (size 1.0000005 1.2000001)
- (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
- )
-#1309 counter:392 pos:81951(0x1401F) type:2 net:5
-#010000000005000000047C267C300100000000AA000000010C000500FFFFAD00FFFFFFFFB01BA205FB49F802E501060079350700E501060079350700E501060079350700000000000202020000000000E070400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000
- (pad "2" smd rect (at 0.00000 1.00000 270) (size 1.0000005 1.2000001)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl"
+ (pad 1 smd rect (at 0 -1 270) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at 0 1 270) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#174: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9547mil|Y=5022mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=8|SOURCEDESIGNATOR=C173|SOURCEUNIQUEID=\PDKYTIFQ|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=RKWOEQYN|JUMPERSVISIBLE=TRUE
-#$pads{174}
- (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 42.5958 -63.0428)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C173" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C173 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:389 pos:81339(0x13DBB) type:2 net:5
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- (pad "2" smd rect (at 0.00000 1.00000 270) (size 1.0000005 1.2000001)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1309 counter:390 pos:81543(0x13E87) type:2 net:301
-#010000000005000000047C267C300100000000AA000000010C002D01FFFFAE00FFFFFFFFB0C1B005C54D0403E501060079350700E501060079350700E501060079350700000000000202020000000000E070400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000
- (pad "1" smd rect (at 0.00000 -1.00000 270) (size 1.0000005 1.2000001)
- (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl"
+ (pad 2 smd rect (at 0 1 270) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 -1 270) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#175: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9929mil|Y=4702mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=9|SOURCEDESIGNATOR=C174|SOURCEUNIQUEID=\NPJRLWXU|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=TTHIVSQD|JUMPERSVISIBLE=TRUE
-#$pads{175}
- (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 52.2986 -54.9148)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C174" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C174 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:387 pos:80931(0x13C23) type:2 net:301
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- (pad "1" smd rect (at 1.00000 0.00000 180) (size 1.0000005 1.2000001)
- (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
- )
-#1309 counter:388 pos:81135(0x13CEF) type:2 net:5
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- (pad "2" smd rect (at -1.00000 0.00000 180) (size 1.0000005 1.2000001)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl"
+ (pad 1 smd rect (at 1 0 180) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at -1 0 180) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#176: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10597mil|Y=5648mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=10|SOURCEDESIGNATOR=C175|SOURCEUNIQUEID=\CVNRVQUN|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=CQQARSXU|JUMPERSVISIBLE=TRUE
-#$pads{176}
- (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 69.2658 -78.9432)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C175" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C175 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:385 pos:80523(0x13A8B) type:2 net:5
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- (pad "2" smd rect (at 0.00000 -1.00000 90) (size 1.0000005 1.2000001)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1309 counter:386 pos:80727(0x13B57) type:2 net:301
-#010000000005000000047C267C300100000000AA000000010C002D01FFFFB000FFFFFFFF50F950061BCF5703E501060079350700E501060079350700E5010600793507000000000002020200000000008056400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000
- (pad "1" smd rect (at 0.00000 1.00000 90) (size 1.0000005 1.2000001)
- (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl"
+ (pad 2 smd rect (at 0 -1 90) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 1 90) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#177: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10447mil|Y=4710mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=11|SOURCEDESIGNATOR=C176|SOURCEUNIQUEID=\KQWQJHJL|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=KHDMLYEK|JUMPERSVISIBLE=TRUE
-#$pads{177}
- (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 65.4558 -55.118)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C176" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C176 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:383 pos:80115(0x138F3) type:2 net:301
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- (pad "1" smd rect (at 0.00000 -1.00000 270) (size 1.0000005 1.2000001)
- (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
- )
-#1309 counter:384 pos:80319(0x139BF) type:2 net:5
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- (pad "2" smd rect (at 0.00000 1.00000 270) (size 1.0000005 1.2000001)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl"
+ (pad 1 smd rect (at 0 -1 270) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at 0 1 270) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#178: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10473mil|Y=5751mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=12|SOURCEDESIGNATOR=C177|SOURCEUNIQUEID=\AHICTQWD|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=NDBCIKMG|JUMPERSVISIBLE=TRUE
-#$pads{178}
- (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 66.1162 -81.5594)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C177" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C177 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:381 pos:79707(0x1375B) type:2 net:5
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- (pad "2" smd rect (at 1.00000 0.00000) (size 1.0000005 1.2000001)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1309 counter:382 pos:79911(0x13827) type:2 net:301
-#010000000005000000047C267C300100000000AA000000010C002D01FFFFB200FFFFFFFFAB0B380670886D03E501060079350700E501060079350700E5010600793507000000000002020200000000000000000100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000
- (pad "1" smd rect (at -1.00000 0.00000) (size 1.0000005 1.2000001)
- (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl"
+ (pad 2 smd rect (at 1 0) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at -1 0) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#179: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9548mil|Y=5529mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=13|SOURCEDESIGNATOR=C178|SOURCEUNIQUEID=\BQIQWSAS|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=RLWJQEKQ|JUMPERSVISIBLE=TRUE
-#$pads{179}
- (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 42.6212 -75.9206)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C178" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C178 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:379 pos:79299(0x135C3) type:2 net:301
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- (pad "1" smd rect (at 0.00000 1.00000 90) (size 1.0000005 1.2000001)
- (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
- )
-#1309 counter:380 pos:79503(0x1368F) type:2 net:5
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- (pad "2" smd rect (at 0.00000 -1.00000 90) (size 1.0000005 1.2000001)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl"
+ (pad 1 smd rect (at 0 1 90) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at 0 -1 90) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#180: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10597mil|Y=5486mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=14|SOURCEDESIGNATOR=C179|SOURCEUNIQUEID=\IXONPSQS|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=YHFQMAGU|JUMPERSVISIBLE=TRUE
-#$pads{180}
- (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 69.2658 -74.8284)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C179" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C179 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:377 pos:78891(0x1342B) type:2 net:5
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- (pad "2" smd rect (at 0.00000 1.00000 270) (size 1.0000005 1.2000001)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1309 counter:378 pos:79095(0x134F7) type:2 net:301
-#010000000005000000047C267C300100000000AA000000010C002D01FFFFB400FFFFFFFF50F95006C51A4B03E501060079350700E501060079350700E501060079350700000000000202020000000000E070400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000
- (pad "1" smd rect (at 0.00000 -1.00000 270) (size 1.0000005 1.2000001)
- (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl"
+ (pad 2 smd rect (at 0 1 270) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 -1 270) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#181: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9738mil|Y=4748mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=15|SOURCEDESIGNATOR=C180|SOURCEUNIQUEID=\VWDPFPIU|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=SKPQQESW|JUMPERSVISIBLE=TRUE
-#$pads{181}
- (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 47.4472 -56.0832)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C180" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C180 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:375 pos:78483(0x13293) type:2 net:301
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- (pad "1" smd rect (at -1.00000 0.00000) (size 1.0000005 1.2000001)
- (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
- )
-#1309 counter:376 pos:78687(0x1335F) type:2 net:5
-#010000000005000000047C267C300100000000AA000000010C000500FFFFB500FFFFFFFF85E8D305C07CD402E501060079350700E501060079350700E5010600793507000000000002020200000000000000000100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000
- (pad "2" smd rect (at 1.00000 0.00000) (size 1.0000005 1.2000001)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl"
+ (pad 1 smd rect (at -1 0) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at 1 0) (size 1.000001 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#182: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9777mil|Y=4996mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=16|SOURCEDESIGNATOR=C181|SOURCEUNIQUEID=\EBHSJXUT|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=BXYPEPYT|JUMPERSVISIBLE=TRUE
-#$pads{182}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 48.4378 -62.3824)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C181" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C181 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:235 pos:49923(0xC303) type:2 net:301
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- (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
- )
-#1309 counter:236 pos:50127(0xC3CF) type:2 net:5
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- (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#183: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9758mil|Y=4897mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=17|SOURCEDESIGNATOR=C182|SOURCEUNIQUEID=\YBSKKCWN|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=JCPLPMUM|JUMPERSVISIBLE=TRUE
-#$pads{183}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 47.9552 -59.8678)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C182" (at 0 0) (layer F.SilkS) hide
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)
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#184: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9975mil|Y=5667mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=18|SOURCEDESIGNATOR=C183|SOURCEUNIQUEID=\UOHMCBNI|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=XHKPPYCQ|JUMPERSVISIBLE=TRUE
-#$pads{184}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 53.467 -79.4258)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C183" (at 0 0) (layer F.SilkS) hide
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#185: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10309mil|Y=4977.9686mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=19|SOURCEDESIGNATOR=C184|SOURCEUNIQUEID=\LQFTMAFO|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=TNFSJJFR|JUMPERSVISIBLE=TRUE
-#$pads{185}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 61.9506 -61.924402)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C184" (at 0 0) (layer F.SilkS) hide
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-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#186: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9836mil|Y=5291mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=20|SOURCEDESIGNATOR=C185|SOURCEUNIQUEID=\DIGJUALN|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=BCAKHPCP|JUMPERSVISIBLE=TRUE
-#$pads{186}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 49.9364 -69.8754)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C185" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C185 (at 0 0) (layer F.SilkS) hide
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-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#187: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10054mil|Y=5509mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=21|SOURCEDESIGNATOR=C186|SOURCEUNIQUEID=\VJPQUPBQ|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=HQPCLXKD|JUMPERSVISIBLE=TRUE
-#$pads{187}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 55.4736 -75.4126)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C186" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C186 (at 0 0) (layer F.SilkS) hide
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-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#188: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9629mil|Y=5036mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=22|SOURCEDESIGNATOR=C187|SOURCEUNIQUEID=\SHWJNLFP|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=XOYROXNY|JUMPERSVISIBLE=TRUE
-#$pads{188}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 44.6786 -63.3984)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C187" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C187 (at 0 0) (layer F.SilkS) hide
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#189: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9957mil|Y=4784mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=23|SOURCEDESIGNATOR=C188|SOURCEUNIQUEID=\KCPQYFTT|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=JOQDPDNN|JUMPERSVISIBLE=TRUE
-#$pads{189}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 53.0098 -56.9976)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C188" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C188 (at 0 0) (layer F.SilkS) hide
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)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#190: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9935mil|Y=5508mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=24|SOURCEDESIGNATOR=C189|SOURCEUNIQUEID=\XTYNWOFN|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=AQPLRHPV|JUMPERSVISIBLE=TRUE
-#$pads{190}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 52.451 -75.3872)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C189" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C189 (at 0 0) (layer F.SilkS) hide
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)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#191: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10540mil|Y=5089mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=25|SOURCEDESIGNATOR=C190|SOURCEUNIQUEID=\WOAUHVJP|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=FMSCWVFB|JUMPERSVISIBLE=TRUE
-#$pads{191}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 67.818 -64.7446)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C190" (at 0 0) (layer F.SilkS) hide
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#192: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9955mil|Y=5214mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=26|SOURCEDESIGNATOR=C191|SOURCEUNIQUEID=\WCUBAQWJ|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=MVPOKXJS|JUMPERSVISIBLE=TRUE
-#$pads{192}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 52.959 -67.9196)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C191" (at 0 0) (layer F.SilkS) hide
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#193: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9698mil|Y=5627mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=27|SOURCEDESIGNATOR=C192|SOURCEUNIQUEID=\RJIQRQBO|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=RUJKICEB|JUMPERSVISIBLE=TRUE
-#$pads{193}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 46.4312 -78.4098)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C192" (at 0 0) (layer F.SilkS) hide
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#194: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9817mil|Y=5154mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=28|SOURCEDESIGNATOR=C193|SOURCEUNIQUEID=\NIXILDTT|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=DNJLYEBX|JUMPERSVISIBLE=TRUE
-#$pads{194}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 49.4538 -66.3956)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C193" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C193 (at 0 0) (layer F.SilkS) hide
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)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#195: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9836mil|Y=4859mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=29|SOURCEDESIGNATOR=C194|SOURCEUNIQUEID=\WHSTJRJK|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=DGJITSMO|JUMPERSVISIBLE=TRUE
-#$pads{195}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 49.9364 -58.9026)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C194" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C194 (at 0 0) (layer F.SilkS) hide
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(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#196: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9797mil|Y=5568mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=30|SOURCEDESIGNATOR=C195|SOURCEUNIQUEID=\BKMYTVCA|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=BSHMTKKJ|JUMPERSVISIBLE=TRUE
-#$pads{196}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 48.9458 -76.9112)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C195" (at 0 0) (layer F.SilkS) hide
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)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#197: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10250mil|Y=4997mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=31|SOURCEDESIGNATOR=C196|SOURCEUNIQUEID=\VAKQCYSR|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=CUIIPYWX|JUMPERSVISIBLE=TRUE
-#$pads{197}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 60.452 -62.4078)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C196" (at 0 0) (layer F.SilkS) hide
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)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#198: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9758mil|Y=5213mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=32|SOURCEDESIGNATOR=C197|SOURCEUNIQUEID=\PFHTBAEO|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=MLCSFHXV|JUMPERSVISIBLE=TRUE
-#$pads{198}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 47.9552 -67.8942)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C197" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C197 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
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- (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
- )
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- (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#199: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9875mil|Y=5721mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=33|SOURCEDESIGNATOR=C198|SOURCEUNIQUEID=\HCFPRRPT|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=HXRWUCBE|JUMPERSVISIBLE=TRUE
-#$pads{199}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 50.927 -80.7974)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C198" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C198 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
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- (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
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- (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#200: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10387mil|Y=5213mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=34|SOURCEDESIGNATOR=C199|SOURCEUNIQUEID=\NMQGBMIF|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=TOCLQNHU|JUMPERSVISIBLE=TRUE
-#$pads{200}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 63.9318 -67.8942)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C199" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C199 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
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-
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- (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
- )
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- (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#201: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9876mil|Y=4977mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=35|SOURCEDESIGNATOR=C200|SOURCEUNIQUEID=\KPMJDSCF|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=GMHWLPXT|JUMPERSVISIBLE=TRUE
-#$pads{201}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 50.9524 -61.8998)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C200" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C200 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1309 counter:198 pos:42375(0xA587) type:2 net:301
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- (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#202: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9896mil|Y=5390mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=36|SOURCEDESIGNATOR=C201|SOURCEUNIQUEID=\QXAMUAIX|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=VYQMBHNX|JUMPERSVISIBLE=TRUE
-#$pads{202}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 51.4604 -72.39)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C201" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C201 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
- )
-#1309 counter:196 pos:41967(0xA3EF) type:2 net:5
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- (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#203: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10526mil|Y=5193mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=37|SOURCEDESIGNATOR=C202|SOURCEUNIQUEID=\PQACHMAS|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=HWLFUMAC|JUMPERSVISIBLE=TRUE
-#$pads{203}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 67.4624 -67.3862)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C202" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C202 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1309 counter:194 pos:41559(0xA257) type:2 net:301
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- (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#204: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9679mil|Y=5173mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=38|SOURCEDESIGNATOR=C203|SOURCEUNIQUEID=\SHFJOOVK|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=NPGDTYOL|JUMPERSVISIBLE=TRUE
-#$pads{204}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 45.9486 -66.8782)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C203" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C203 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
- )
-#1309 counter:192 pos:41151(0xA0BF) type:2 net:5
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- (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#205: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9625.7268mil|Y=5503.4624mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=39|SOURCEDESIGNATOR=C204|SOURCEUNIQUEID=\OVKILSFG|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=CCMHXXUC|JUMPERSVISIBLE=TRUE
-#$pads{205}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 44.595461 -75.271945)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C204" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C204 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
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-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
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)
-
)
-#Components#206: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8738mil|Y=4534mil|PATTERN=C_1210|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=0|SOURCEDESIGNATOR=C205|SOURCEUNIQUEID=\QIBADEYD|SOURCEHIERARCHICALPATH=rev02_24|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC1210|SOURCEDESCRIPTION=1210 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=UMBMNKEB|JUMPERSVISIBLE=TRUE
-#$pads{206}
- (module "C_1210" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_1210 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 22.0472 -50.6476)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C205" (at 0 0) (layer F.SilkS) hide
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-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl"
+ (pad 1 smd rect (at -1.5 0) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
+ (net 301 VCC_5V0))
+ (pad 2 smd rect (at 1.5 0) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
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)
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)
-#Components#207: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8738mil|Y=4362mil|PATTERN=C_1210|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=1|SOURCEDESIGNATOR=C206|SOURCEUNIQUEID=\RSYPXHWM|SOURCEHIERARCHICALPATH=rev02_24|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC1210|SOURCEDESCRIPTION=1210 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=VSXSPQXQ|JUMPERSVISIBLE=TRUE
-#$pads{207}
- (module "C_1210" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_1210 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 22.0472 -46.2788)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C206" (at 0 0) (layer F.SilkS) hide
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-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl"
+ (pad 2 smd rect (at 1.5 0) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at -1.5 0) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
+ (net 301 VCC_5V0))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
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)
-
)
-#Components#208: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8834mil|Y=5016mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=2|SOURCEDESIGNATOR=C207|SOURCEUNIQUEID=\FPWGEFOJ|SOURCEHIERARCHICALPATH=rev02_24|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=AVBAEYQC|JUMPERSVISIBLE=TRUE
-#$pads{208}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 24.4856 -62.8904)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C207" (at 0 0) (layer F.SilkS) hide
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 240 NetC207_1))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
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)
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)
-#Components#209: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8930mil|Y=5016mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=3|SOURCEDESIGNATOR=C208|SOURCEUNIQUEID=\VMNULFUV|SOURCEHIERARCHICALPATH=rev02_24|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=UEWWCVOJ|JUMPERSVISIBLE=TRUE
-#$pads{209}
- (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 26.924 -62.8904)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C208" (at 0 0) (layer F.SilkS) hide
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)
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-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 242 NetC208_2))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 241 NetC208_1))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
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(scale (xyz 1 1 1))
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)
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)
-#Components#210: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9236mil|Y=4719mil|PATTERN=C_1210|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=4|SOURCEDESIGNATOR=C209|SOURCEUNIQUEID=\QBVCBBBK|SOURCEHIERARCHICALPATH=rev02_24|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC1210|SOURCEDESCRIPTION=1210 CAPACITOR X5R 6.3V|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=OEMEJMXM|JUMPERSVISIBLE=TRUE
-#$pads{210}
- (module "C_1210" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_1210 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 34.6964 -55.3466)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C209" (at 0 0) (layer F.SilkS) hide
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-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl"
+ (pad 1 smd rect (at 0 -1.5 270) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
+ (net 241 NetC208_1))
+ (pad 2 smd rect (at 0 1.5 270) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
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)
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-#Components#211: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9238mil|Y=4997mil|PATTERN=C_1210|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=5|SOURCEDESIGNATOR=C210|SOURCEUNIQUEID=\XSETEXNR|SOURCEHIERARCHICALPATH=rev02_24|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC1210|SOURCEDESCRIPTION=1210 CAPACITOR X5R 6.3V|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=DLGHAIRB|JUMPERSVISIBLE=TRUE
-#$pads{211}
- (module "C_1210" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_1210 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 34.7472 -62.4078)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C210" (at 0 0) (layer F.SilkS) hide
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-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl"
+ (pad 2 smd rect (at 0 -1.5 90) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 1.5 90) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
+ (net 241 NetC208_1))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
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)
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-#Components#212: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8815mil|Y=5024mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|NAMEAUTOPOSITION=1|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=0|SOURCEDESIGNATOR=C211|SOURCEUNIQUEID=\XSTFNHBJ|SOURCEHIERARCHICALPATH=rev02_25|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=SFBCNKXA|JUMPERSVISIBLE=TRUE
-#$pads{212}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 24.003 -63.0936)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C211" (at 0 0) (layer F.SilkS) hide
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 285 PWR_ENA_VCCINT))
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#213: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8454mil|Y=4401mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=1|SOURCEDESIGNATOR=C212|SOURCEUNIQUEID=\PWJUPSML|SOURCEHIERARCHICALPATH=rev02_25|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=UPDHBLND|JUMPERSVISIBLE=TRUE
-#$pads{213}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 14.8336 -47.2694)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C212" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C212 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
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- (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 287 "PWR_ENA_VCCO")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 286 PWR_ENA_VCCO))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#214: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9087mil|Y=5545mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=2|SOURCEDESIGNATOR=C213|SOURCEUNIQUEID=\TCKLRTOF|SOURCEHIERARCHICALPATH=rev02_25|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=ICHVQVVB|JUMPERSVISIBLE=TRUE
-#$pads{214}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 30.9118 -76.327)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C213" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C213 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 285 "PWR_ENA_VCCAUX")
- )
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- (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 284 PWR_ENA_VCCAUX))
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#215: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9287.3228mil|Y=3110.8661mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=15|SOURCEDESIGNATOR=C214|SOURCEUNIQUEID=\DKAAIRPP|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=KJBSVIQK|JUMPERSVISIBLE=TRUE
-#$pads{215}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 35.999999 -14.499999)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C214" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C214 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1309 counter:182 pos:39111(0x98C7) type:2 net:204
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- (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 206 "FT_VREGIN")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 205 FT_VREGIN))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#216: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10740.0787mil|Y=3197.4803mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=15|SOURCEDESIGNATOR=C215|SOURCEUNIQUEID=\OQNJAXSG|SOURCEHIERARCHICALPATH=rev02_10|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=VJWGBQPX|JUMPERSVISIBLE=TRUE
-#$pads{216}
- (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 72.899999 -16.7)
(path /539EEC0F)
(attr smd)
- (fp_text reference "C215" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C215 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:179 pos:38499(0x9663) type:2 net:187
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- (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 189 "FT_MGMT_VREGIN")
- )
-#1309 counter:180 pos:38703(0x972F) type:2 net:5
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- (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl"
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 188 FT_MGMT_VREGIN))
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#217: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10429.0551mil|Y=1953.3858mil|PATTERN=USB-MINIB|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 0.00000000000000E+0000|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=16|SOURCEDESIGNATOR=CN1|SOURCEUNIQUEID=\IPXDWWNJ|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=rev02.PcbLib|SOURCECOMPONENTLIBRARY=adafruit.IntLib|SOURCELIBREFERENCE=USBMINIB|SOURCEDESCRIPTION=mini USB type B Connector|FOOTPRINTDESCRIPTION=USB-MINIB|UNIQUEID=WPKHVVLR|JUMPERSVISIBLE=TRUE
-#$pads{217}
- (module "USB-MINIB" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module USB-MINIB (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 65 14.900001)
(path /539EEC0F)
(attr smd)
- (fp_text reference "CN1" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference CN1 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
- (fp_text value "USB-MINIB" (at 0 0) (layer F.SilkS) hide
+ (fp_text value USB-MINIB (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "" np_thru_hole circle (at 2.20980 -1.01600) (size 1.0160000 1.0160000) (drill 1.1000003)
- (layers F.Cu B.Cu F.Mask F.Paste B.Mask B.Paste)
- )
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- (pad "" np_thru_hole circle (at -2.20000 -1.01600) (size 1.0160000 1.0160000) (drill 1.1000003)
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- )
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- (pad "D+" smd rect (at -0.00000 -3.70000 180) (size 0.5999988 1.5999993)
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- (pad "D-" smd rect (at -0.80000 -3.70000 180) (size 0.5999988 1.5999993)
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- (pad "VBUS" smd rect (at -1.60000 -3.70000 180) (size 0.5999988 1.5999993)
- (layers F.Cu F.Mask F.Paste) (net 206 "FT_VREGIN")
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- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/23D50C2B-5C98.wrl"
+ (pad "" np_thru_hole circle (at 2.2098 -1.016) (size 1.016 1.016) (drill 1.1) (layers F&B.Cu *.Paste *.Mask))
+ (pad "" np_thru_hole circle (at -2.2 -1.016) (size 1.016 1.016) (drill 1.1) (layers F&B.Cu *.Paste *.Mask))
+ (pad GND smd rect (at 4.36 2) (size 1.599999 2.000001) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad GND smd rect (at 4.36 -3.5052) (size 1.599999 2.000001) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad GND smd rect (at -4.34 2) (size 1.599999 2.000001) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad GND smd rect (at 1.6002 -3.7 180) (size 0.599999 1.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad ID smd rect (at 0.8 -3.7 180) (size 0.599999 1.599999) (layers F.Cu F.Paste F.Mask))
+ (pad D+ smd rect (at 0 -3.7 180) (size 0.599999 1.599999) (layers F.Cu F.Paste F.Mask)
+ (net 41 D1_P))
+ (pad D- smd rect (at -0.8 -3.7 180) (size 0.599999 1.599999) (layers F.Cu F.Paste F.Mask)
+ (net 40 D1_N))
+ (pad VBUS smd rect (at -1.6 -3.7 180) (size 0.599999 1.599999) (layers F.Cu F.Paste F.Mask)
+ (net 205 FT_VREGIN))
+ (pad GND smd rect (at -4.34 -3.5052) (size 1.599999 2.000001) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/23D50C2B-5C98.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#218: |SELECTION=FALSE|LAYER=TOP|LOCKED=TRUE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11216.4567mil|Y=1953.3858mil|PATTERN=USB-MINIB|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 0.00000000000000E+0000|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=16|SOURCEDESIGNATOR=CN2|SOURCEUNIQUEID=\OWSRHMSG|SOURCEHIERARCHICALPATH=rev02_10|SOURCEFOOTPRINTLIBRARY=rev02.PcbLib|SOURCECOMPONENTLIBRARY=adafruit.IntLib|SOURCELIBREFERENCE=USBMINIB|SOURCEDESCRIPTION=mini USB type B Connector|FOOTPRINTDESCRIPTION=USB-MINIB|UNIQUEID=BEWWMGTC|JUMPERSVISIBLE=TRUE
-#$pads{218}
- (module "USB-MINIB" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
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+ (module USB-MINIB (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
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+ (pad "" np_thru_hole circle (at -2.2 -1.016) (size 1.016 1.016) (drill 1.1) (layers F&B.Cu *.Paste *.Mask))
+ (pad "" np_thru_hole circle (at 2.2098 -1.016) (size 1.016 1.016) (drill 1.1) (layers F&B.Cu *.Paste *.Mask))
+ (pad GND smd rect (at -4.34 -3.5052) (size 1.599999 2.000001) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad VBUS smd rect (at -1.6 -3.7 180) (size 0.599999 1.599999) (layers F.Cu F.Paste F.Mask)
+ (net 188 FT_MGMT_VREGIN))
+ (pad D- smd rect (at -0.8 -3.7 180) (size 0.599999 1.599999) (layers F.Cu F.Paste F.Mask)
+ (net 2 DM_N))
+ (pad D+ smd rect (at 0 -3.7 180) (size 0.599999 1.599999) (layers F.Cu F.Paste F.Mask)
+ (net 1 DM_P))
+ (pad ID smd rect (at 0.8 -3.7 180) (size 0.599999 1.599999) (layers F.Cu F.Paste F.Mask))
+ (pad GND smd rect (at 1.6002 -3.7 180) (size 0.599999 1.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad GND smd rect (at -4.34 2) (size 1.599999 2.000001) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad GND smd rect (at 4.36 -3.5052) (size 1.599999 2.000001) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad GND smd rect (at 4.36 2) (size 1.599999 2.000001) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/23D50C2B-5C98.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
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)
-#Components#219: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=FALSE|X=11132mil|Y=6051mil|PATTERN=SOT-23|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=3|SOURCEDESIGNATOR=D1|SOURCEUNIQUEID=\YUKPGGYN|SOURCEHIERARCHICALPATH=rev02_2|SOURCEFOOTPRINTLIBRARY=CHIPS.PcbLib|SOURCECOMPONENTLIBRARY=diode.IntLib|SOURCELIBREFERENCE=BAT54|SOURCEDESCRIPTION=OnSemi Schottky Diode|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=VWXLQUUN|JUMPERSVISIBLE=TRUE
-#$pads{219}
- (module "SOT-23" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module SOT-23 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 82.8548 -89.1794)
(path /539EEC0F)
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-#1365
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+ (pad 3 smd rect (at -1.1 0 180) (size 1.2 0.800001) (layers B.Cu B.Paste B.Mask)
+ (net 8 AMPLIFIED))
+ (pad 2 smd rect (at 1.1 0.95 180) (size 1.2 0.800001) (layers B.Cu B.Paste B.Mask))
+ (pad 1 smd rect (at 1.1 -0.95 180) (size 1.2 0.800001) (layers B.Cu B.Paste B.Mask)
+ (net 7 NetC15_2))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/04B9CA18-3B1B.wrl
(at (xyz 0 0 0))
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)
-#Components#220: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8696mil|Y=5042mil|PATTERN=SOT-23|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=3|SOURCEDESIGNATOR=D2|SOURCEUNIQUEID=\TCFDOMLL|SOURCEHIERARCHICALPATH=rev02_25|SOURCEFOOTPRINTLIBRARY=CHIPS.PcbLib|SOURCECOMPONENTLIBRARY=diode.IntLib|SOURCELIBREFERENCE=BAT54|SOURCEDESCRIPTION=OnSemi Schottky Diode|UNIQUEID=WCXIDLWV|JUMPERSVISIBLE=TRUE
-#$pads{220}
- (module "SOT-23" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module SOT-23 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 20.9804 -63.5508)
(path /539EEC0F)
(attr smd)
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+ (pad 1 smd rect (at 1.1 0.95 180) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask)
+ (net 285 PWR_ENA_VCCINT))
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+ (pad 3 smd rect (at -1.1 0 180) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask)
+ (net 301 VCC_5V0))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/04B9CA18-3B1B.wrl
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)
-#Components#221: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8327mil|Y=4401mil|PATTERN=SOT-23|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=4|SOURCEDESIGNATOR=D3|SOURCEUNIQUEID=\PEANKJCK|SOURCEHIERARCHICALPATH=rev02_25|SOURCEFOOTPRINTLIBRARY=CHIPS.PcbLib|SOURCECOMPONENTLIBRARY=diode.IntLib|SOURCELIBREFERENCE=BAT54|SOURCEDESCRIPTION=OnSemi Schottky Diode|UNIQUEID=XXOEORIE|JUMPERSVISIBLE=TRUE
-#$pads{221}
- (module "SOT-23" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module SOT-23 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 11.6078 -47.2694)
(path /539EEC0F)
(attr smd)
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+ (pad 3 smd rect (at -1.1 0 180) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask)
+ (net 280 POK_VCCAUX))
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+ (pad 1 smd rect (at 1.1 0.95 180) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask)
+ (net 286 PWR_ENA_VCCO))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/04B9CA18-3B1B.wrl
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-#Components#222: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9162mil|Y=5411mil|PATTERN=SOT-23|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=5|SOURCEDESIGNATOR=D4|SOURCEUNIQUEID=\UPJFRMBE|SOURCEHIERARCHICALPATH=rev02_25|SOURCEFOOTPRINTLIBRARY=CHIPS.PcbLib|SOURCECOMPONENTLIBRARY=diode.IntLib|SOURCELIBREFERENCE=BAT54|SOURCEDESCRIPTION=OnSemi Schottky Diode|UNIQUEID=LHRVRNPE|JUMPERSVISIBLE=TRUE
-#$pads{222}
- (module "SOT-23" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module SOT-23 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 32.8168 -72.9234)
(path /539EEC0F)
(attr smd)
- (fp_text reference "D4" (at 0 0) (layer F.SilkS) hide
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- (pad "3" smd rect (at 1.10000 0.00000) (size 1.2000001 0.8000009)
- (layers F.Cu F.Mask F.Paste) (net 282 "POK_VCCINT")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/04B9CA18-3B1B.wrl"
+ (pad 1 smd rect (at -1.1 -0.95) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask)
+ (net 284 PWR_ENA_VCCAUX))
+ (pad 2 smd rect (at -1.1 0.95) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask))
+ (pad 3 smd rect (at 1.1 0) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask)
+ (net 281 POK_VCCINT))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/04B9CA18-3B1B.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#223: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8946.8188mil|Y=3158.9999mil|PATTERN=L_0603|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=17|SOURCEDESIGNATOR=FB1|SOURCEUNIQUEID=\NLUTYYJE|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=microbuilder.IntLib|SOURCELIBREFERENCE=FERRITE_0603MP|SOURCEDESCRIPTION=Ferrite Bead 600 Ohm 500mA|UNIQUEID=IDQGAPLY|JUMPERSVISIBLE=TRUE
-#$pads{223}
- (module "L_0603" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module L_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 27.351198 -15.722597)
(path /539EEC0F)
(attr smd)
- (fp_text reference "FB1" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference FB1 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
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- (pad "1" smd rect (at -0.00000 -0.85000) (size 1.0000005 0.9000007)
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- )
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- (pad "2" smd rect (at -0.00000 0.85000) (size 1.0000005 0.9000007)
- (layers F.Cu F.Mask F.Paste) (net 204 "FT_VPHY")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/AF13F747-700F.wrl"
+ (pad 1 smd rect (at 0 -0.85) (size 1.000001 0.900001) (layers F.Cu F.Paste F.Mask)
+ (net 198 FT_VCC3V3))
+ (pad 2 smd rect (at 0 0.85) (size 1.000001 0.900001) (layers F.Cu F.Paste F.Mask)
+ (net 203 FT_VPHY))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/AF13F747-700F.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#224: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8687.0394mil|Y=3127.37mil|PATTERN=L_0603|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=18|SOURCEDESIGNATOR=FB2|SOURCEUNIQUEID=\VHIYSXKA|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=microbuilder.IntLib|SOURCELIBREFERENCE=FERRITE_0603MP|SOURCEDESCRIPTION=Ferrite Bead 600 Ohm 500mA|UNIQUEID=IVHXISSB|JUMPERSVISIBLE=TRUE
-#$pads{224}
- (module "L_0603" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module L_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 20.752801 -14.919198)
(path /539EEC0F)
(attr smd)
- (fp_text reference "FB2" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference FB2 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
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- (pad "2" smd rect (at 0.85000 0.00000 90) (size 1.0000005 0.9000007)
- (layers F.Cu F.Mask F.Paste) (net 205 "FT_VPLL")
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/AF13F747-700F.wrl"
+ (pad 2 smd rect (at 0.85 0 90) (size 1.000001 0.900001) (layers F.Cu F.Paste F.Mask)
+ (net 204 FT_VPLL))
+ (pad 1 smd rect (at -0.85 0 90) (size 1.000001 0.900001) (layers F.Cu F.Paste F.Mask)
+ (net 198 FT_VCC3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/AF13F747-700F.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#225: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11540mil|Y=2971.7401mil|PATTERN=L_0603|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=17|SOURCEDESIGNATOR=FB3|SOURCEUNIQUEID=\YLWBIKPN|SOURCEHIERARCHICALPATH=rev02_10|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=microbuilder.IntLib|SOURCELIBREFERENCE=FERRITE_0603MP|SOURCEDESCRIPTION=Ferrite Bead 600 Ohm 500mA|UNIQUEID=XUPWRGMK|JUMPERSVISIBLE=TRUE
-#$pads{225}
- (module "L_0603" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module L_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 93.218 -10.966199)
(path /539EEC0F)
(attr smd)
- (fp_text reference "FB3" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference FB3 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
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- (pad "1" smd rect (at 0.00000 -0.85000) (size 1.0000005 0.9000007)
- (layers F.Cu F.Mask F.Paste) (net 186 "FT_MGMT_VCC3V3")
- )
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- (pad "2" smd rect (at 0.00000 0.85000) (size 1.0000005 0.9000007)
- (layers F.Cu F.Mask F.Paste) (net 187 "FT_MGMT_VPHY")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/AF13F747-700F.wrl"
+ (pad 1 smd rect (at 0 -0.85) (size 1.000001 0.900001) (layers F.Cu F.Paste F.Mask)
+ (net 185 FT_MGMT_VCC3V3))
+ (pad 2 smd rect (at 0 0.85) (size 1.000001 0.900001) (layers F.Cu F.Paste F.Mask)
+ (net 186 FT_MGMT_VPHY))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/AF13F747-700F.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#226: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11460mil|Y=2971.7401mil|PATTERN=L_0603|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=18|SOURCEDESIGNATOR=FB4|SOURCEUNIQUEID=\SCPPJPAA|SOURCEHIERARCHICALPATH=rev02_10|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=microbuilder.IntLib|SOURCELIBREFERENCE=FERRITE_0603MP|SOURCEDESCRIPTION=Ferrite Bead 600 Ohm 500mA|UNIQUEID=VWXHWWTP|JUMPERSVISIBLE=TRUE
-#$pads{226}
- (module "L_0603" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module L_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 91.186 -10.966199)
(path /539EEC0F)
(attr smd)
- (fp_text reference "FB4" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference FB4 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
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- (pad "2" smd rect (at 0.00000 0.85000) (size 1.0000005 0.9000007)
- (layers F.Cu F.Mask F.Paste) (net 188 "FT_MGMT_VPLL")
- )
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- (pad "1" smd rect (at 0.00000 -0.85000) (size 1.0000005 0.9000007)
- (layers F.Cu F.Mask F.Paste) (net 186 "FT_MGMT_VCC3V3")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/AF13F747-700F.wrl"
+ (pad 2 smd rect (at 0 0.85) (size 1.000001 0.900001) (layers F.Cu F.Paste F.Mask)
+ (net 187 FT_MGMT_VPLL))
+ (pad 1 smd rect (at 0 -0.85) (size 1.000001 0.900001) (layers F.Cu F.Paste F.Mask)
+ (net 185 FT_MGMT_VCC3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/AF13F747-700F.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#227: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9502mil|Y=5858mil|PATTERN=L_1206|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|NAMEAUTOPOSITION=1|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=8|SOURCEDESIGNATOR=FB5|SOURCEUNIQUEID=\LCYSIBXW|SOURCEHIERARCHICALPATH=rev02_18|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=UsedComponents.IntLib|SOURCELIBREFERENCE=BLM31PG330SN1_1206|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=SRXFJEFS|JUMPERSVISIBLE=TRUE
-#$pads{227}
- (module "L_1206" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module L_1206 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 41.4528 -84.2772)
(path /539EEC0F)
(attr smd)
- (fp_text reference "FB5" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference FB5 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "2" smd rect (at 1.40000 0.00000 270) (size 1.7999989 1.3999997)
- (layers B.Cu B.Mask B.Paste) (net 175 "FPGA_VCCAUX_1V8")
- )
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- (pad "1" smd rect (at -1.40000 0.00000 270) (size 1.7999989 1.3999997)
- (layers B.Cu B.Mask B.Paste) (net 237 "NetC117_1")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/76148CD0-6DD3.wrl"
+ (pad 2 smd rect (at 1.4 0 270) (size 1.799999 1.4) (layers B.Cu B.Paste B.Mask)
+ (net 174 FPGA_VCCAUX_1V8))
+ (pad 1 smd rect (at -1.4 0 270) (size 1.799999 1.4) (layers B.Cu B.Paste B.Mask)
+ (net 236 NetC117_1))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/76148CD0-6DD3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#228: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8177mil|Y=3845mil|PATTERN=L_1206|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=9|SOURCEDESIGNATOR=FB6|SOURCEUNIQUEID=\SLFVGQAP|SOURCEHIERARCHICALPATH=rev02_18|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=UsedComponents.IntLib|SOURCELIBREFERENCE=BLM31PG330SN1_1206|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=YBFLOGKY|JUMPERSVISIBLE=TRUE
-#$pads{228}
- (module "L_1206" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module L_1206 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 7.7978 -33.147)
(path /539EEC0F)
(attr smd)
- (fp_text reference "FB6" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference FB6 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
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- (pad "1" smd rect (at -1.40000 0.00000 270) (size 1.7999989 1.3999997)
- (layers B.Cu B.Mask B.Paste) (net 239 "NetC118_1")
- )
-#1309 counter:1705 pos:352442(0x560BA) type:2 net:301
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- (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/76148CD0-6DD3.wrl"
+ (pad 1 smd rect (at -1.4 0 270) (size 1.799999 1.4) (layers B.Cu B.Paste B.Mask)
+ (net 238 NetC118_1))
+ (pad 2 smd rect (at 1.4 0 270) (size 1.799999 1.4) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/76148CD0-6DD3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#229: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9430mil|Y=4832mil|PATTERN=L_1206|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=6|SOURCEDESIGNATOR=FB7|SOURCEUNIQUEID=\NHUPTSSI|SOURCEHIERARCHICALPATH=rev02_24|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=UsedComponents.IntLib|SOURCELIBREFERENCE=BLM31PG330SN1_1206|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=HAGIPWFR|JUMPERSVISIBLE=TRUE
-#$pads{229}
- (module "L_1206" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module L_1206 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 39.624 -58.2168)
(path /539EEC0F)
(attr smd)
- (fp_text reference "FB7" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference FB7 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
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- (layers B.Cu B.Mask B.Paste) (net 176 "FPGA_VCCINT_1V0")
- )
-#1309 counter:1703 pos:352034(0x55F22) type:2 net:240
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- (layers B.Cu B.Mask B.Paste) (net 242 "NetC208_1")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/76148CD0-6DD3.wrl"
+ (pad 2 smd rect (at 0 -1.4) (size 1.799999 1.4) (layers B.Cu B.Paste B.Mask)
+ (net 175 FPGA_VCCINT_1V0))
+ (pad 1 smd rect (at 0 1.4) (size 1.799999 1.4) (layers B.Cu B.Paste B.Mask)
+ (net 241 NetC208_1))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/76148CD0-6DD3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#230: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9175.3229mil|Y=4548.9763mil|PATTERN=SO08|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=1|SOURCEDESIGNATOR=IC1|SOURCEUNIQUEID=\TGVCCYGD|SOURCEHIERARCHICALPATH=rev02_7|SOURCEFOOTPRINTLIBRARY=rev02.PcbLib|SOURCECOMPONENTLIBRARY=altera-configdevices.IntLib|SOURCELIBREFERENCE=N25Q128A13ES|SOURCEDESCRIPTION=NOR Flash|FOOTPRINTDESCRIPTION=SO08|UNIQUEID=QYDAQFGL|JUMPERSVISIBLE=TRUE
-#$pads{230}
- (module "SO08" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module SO08 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 33.155202 -51.027998)
(path /539EEC0F)
(attr smd)
- (fp_text reference "IC1" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference IC1 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
- (fp_text value "SO08" (at 0 0) (layer F.SilkS) hide
+ (fp_text value SO08 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "1" smd rect (at -3.07340 -1.90500 270) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 207 "KSM_PROM_CS_N")
- )
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- (pad "8" smd rect (at 3.07340 -1.90500 270) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
- )
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- (pad "2" smd rect (at -3.07340 -0.63500 270) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 208 "KSM_PROM_MISO")
- )
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- (pad "3" smd rect (at -3.07340 0.63500 270) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 244 "NetIC1_3")
- )
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- (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
- )
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- (pad "6" smd rect (at 3.07340 0.63500 270) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 210 "KSM_PROM_SCLK")
- )
-#1309 counter:823 pos:170062(0x2984E) type:2 net:5
-#010000000005000000047C267C300100000000AA000000010C000500FFFFE600FFFFFFFF7D946505B3ACAA02A0F7030000350C00A0F7030000350C00A0F7030000350C00000000000202020000000000E070400100000000000000F200030004007980010079800100798001001BB3FFFFE54C00000000000101010101010100000000000000000000010000010000
- (pad "4" smd rect (at -3.07340 1.90500 270) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1309 counter:824 pos:170266(0x2991A) type:2 net:207
-#010000000005000000047C267C300100000000AA000000010C00CF00FFFFE600FFFFFFFF9D818A05B3ACAA02A0F7030000350C00A0F7030000350C00A0F7030000350C00000000000202020000000000E070400100000000000000F200030004007980010079800100798001001BB3FFFFE54C00000000000101010101010100000000000000000000010000010000
- (pad "5" smd rect (at 3.07340 1.90500 270) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 209 "KSM_PROM_MOSI")
- )
-
+ (pad 1 smd rect (at -3.0734 -1.905 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 206 KSM_PROM_CS_N))
+ (pad 8 smd rect (at 3.0734 -1.905 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at -3.0734 -0.635 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 207 KSM_PROM_MISO))
+ (pad 3 smd rect (at -3.0734 0.635 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 243 NetIC1_3))
+ (pad 7 smd rect (at 3.0734 -0.635 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (pad 6 smd rect (at 3.0734 0.635 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 209 KSM_PROM_SCLK))
+ (pad 4 smd rect (at -3.0734 1.905 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 5 smd rect (at 3.0734 1.905 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 208 KSM_PROM_MOSI))
)
-#Components#231: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9419.4487mil|Y=4049.937mil|PATTERN=SO20W|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|NAMEAUTOPOSITION=1|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=3|SOURCEDESIGNATOR=IC2|SOURCEUNIQUEID=\PLKRUYST|SOURCEHIERARCHICALPATH=rev02_15|SOURCEFOOTPRINTLIBRARY=rev02.PcbLib|SOURCECOMPONENTLIBRARY=74xx-eu.IntLib|SOURCELIBREFERENCE=74*244DW|SOURCEDESCRIPTION=Octal BUFFER and LINE DRIVER, 3-state|FOOTPRINTDESCRIPTION=SO20W|UNIQUEID=EKHMKWNO|JUMPERSVISIBLE=TRUE
-#$pads{231}
- (module "SO20W" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module SO20W (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 39.355997 -38.3524)
(path /539EEC0F)
(attr smd)
- (fp_text reference "IC2" (at 0 0) (layer F.SilkS) hide
- (effects (font (thickness 0.05)))
- )
- (fp_text value "SO20W" (at 0 0) (layer F.SilkS) hide
- (effects (font (thickness 0.05)))
- )
-
- #1309 counter:159 pos:34408(0x8668) type:2 net:290
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- (pad "1" smd rect (at 5.02920 5.71500 90) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 292 "SPI_A_TRISTATE")
- )
-#1309 counter:160 pos:34612(0x8734) type:2 net:8
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- (pad "2" smd rect (at 5.02920 4.44500 90) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 10 "ARM_FPGA_CFG_CS_N")
- )
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- (layers F.Cu F.Mask F.Paste) (net 125 "FPGA_CFG_MISO")
- )
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- (layers F.Cu F.Mask F.Paste) (net 13 "ARM_FPGA_CFG_SCLK")
- )
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- (pad "5" smd rect (at 5.02920 0.63500 90) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 172 "FPGA_PROM_MOSI")
- )
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- (pad "6" smd rect (at 5.02920 -0.63500 90) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 12 "ARM_FPGA_CFG_MOSI")
- )
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- (pad "7" smd rect (at 5.02920 -1.90500 90) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 173 "FPGA_PROM_SCLK")
- )
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- (pad "8" smd rect (at 5.02920 -3.17500 90) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 171 "FPGA_PROM_MISO")
- )
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- (pad "13" smd rect (at -5.02920 -3.17500 90) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 129 "FPGA_CFG_SCLK")
- )
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- (pad "14" smd rect (at -5.02920 -1.90500 90) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 172 "FPGA_PROM_MOSI")
- )
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- (pad "15" smd rect (at -5.02920 -0.63500 90) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 127 "FPGA_CFG_MOSI")
- )
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- (pad "16" smd rect (at -5.02920 0.63500 90) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 173 "FPGA_PROM_SCLK")
- )
-#1309 counter:171 pos:36860(0x8FFC) type:2 net:169
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- (pad "17" smd rect (at -5.02920 1.90500 90) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 171 "FPGA_PROM_MISO")
- )
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- (pad "18" smd rect (at -5.02920 3.17500 90) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 170 "FPGA_PROM_CS_N")
- )
-#1309 counter:173 pos:37270(0x9196) type:2 net:291
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- (pad "19" smd rect (at -5.02920 4.44500 90) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 293 "SPI_B_TRISTATE")
- )
-#1309 counter:174 pos:37475(0x9263) type:2 net:301
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- (pad "20" smd rect (at -5.02920 5.71500 90) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
- )
-#1309 counter:175 pos:37680(0x9330) type:2 net:168
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- (pad "9" smd rect (at 5.02920 -4.44500 90) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 170 "FPGA_PROM_CS_N")
- )
-#1309 counter:176 pos:37884(0x93FC) type:2 net:5
-#010000000005000000047C267C300100000000AA000000010C000500FFFFE700FFFFFFFF9781BB05BA4D8C02A0F7030000350C00A0F7030000350C00A0F7030000350C000000000002020200000000008056400100000000000000F200030004007980010079800100798001001BB3FFFFE54C00000000000101010101010100000000000000000000010000010000
- (pad "10" smd rect (at 5.02920 -5.71500 90) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1309 counter:177 pos:38089(0x94C9) type:2 net:9
-#010000000005000000047C267C300100000000AA000000010C000900FFFFE700FFFFFFFFD7147F059AAC8402A0F7030000350C00A0F7030000350C00A0F7030000350C000000000002020200000000008056400100000000000000F200030004007980010079800100798001001BB3FFFFE54C00000000000101010101010100000000000000000000010000010000
- (pad "12" smd rect (at -5.02920 -4.44500 90) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 11 "ARM_FPGA_CFG_MISO")
- )
-#1309 counter:178 pos:38294(0x9596) type:2 net:119
-#010000000005000000047C267C300100000000AA000000010C007700FFFFE700FFFFFFFFD7147F05BA4D8C02A0F7030000350C00A0F7030000350C00A0F7030000350C000000000002020200000000008056400100000000000000F200030004007980010079800100798001001BB3FFFFE54C00000000000101010101010100000000000000000000010000010000
- (pad "11" smd rect (at -5.02920 -5.71500 90) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 121 "FPGA_CFG_CS_N")
- )
-
- )
-#Components#232: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9662.7874mil|Y=3535.4015mil|PATTERN=SO08|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=4|SOURCEDESIGNATOR=IC3|SOURCEUNIQUEID=\CNXUEIMS|SOURCEHIERARCHICALPATH=rev02_15|SOURCEFOOTPRINTLIBRARY=rev02.PcbLib|SOURCECOMPONENTLIBRARY=altera-configdevices.IntLib|SOURCELIBREFERENCE=N25Q128A13ES|SOURCEDESCRIPTION=NOR Flash|FOOTPRINTDESCRIPTION=SO08|UNIQUEID=MYMHGCHD|JUMPERSVISIBLE=TRUE
-#$pads{232}
- (module "SO08" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (fp_text reference IC2 (at 0 0) (layer F.SilkS) hide
+ (effects (font (thickness 0.05)))
+ )
+ (fp_text value SO20W (at 0 0) (layer F.SilkS) hide
+ (effects (font (thickness 0.05)))
+ )
+ (pad 1 smd rect (at 5.0292 5.715 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 291 SPI_A_TRISTATE))
+ (pad 2 smd rect (at 5.0292 4.445 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 9 ARM_FPGA_CFG_CS_N))
+ (pad 3 smd rect (at 5.0292 3.175 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 124 FPGA_CFG_MISO))
+ (pad 4 smd rect (at 5.0292 1.905 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 12 ARM_FPGA_CFG_SCLK))
+ (pad 5 smd rect (at 5.0292 0.635 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 171 FPGA_PROM_MOSI))
+ (pad 6 smd rect (at 5.0292 -0.635 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 11 ARM_FPGA_CFG_MOSI))
+ (pad 7 smd rect (at 5.0292 -1.905 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 172 FPGA_PROM_SCLK))
+ (pad 8 smd rect (at 5.0292 -3.175 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 170 FPGA_PROM_MISO))
+ (pad 13 smd rect (at -5.0292 -3.175 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 128 FPGA_CFG_SCLK))
+ (pad 14 smd rect (at -5.0292 -1.905 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 171 FPGA_PROM_MOSI))
+ (pad 15 smd rect (at -5.0292 -0.635 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 126 FPGA_CFG_MOSI))
+ (pad 16 smd rect (at -5.0292 0.635 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 172 FPGA_PROM_SCLK))
+ (pad 17 smd rect (at -5.0292 1.905 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 170 FPGA_PROM_MISO))
+ (pad 18 smd rect (at -5.0292 3.175 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 169 FPGA_PROM_CS_N))
+ (pad 19 smd rect (at -5.0292 4.445 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 292 SPI_B_TRISTATE))
+ (pad 20 smd rect (at -5.0292 5.715 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (pad 9 smd rect (at 5.0292 -4.445 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 169 FPGA_PROM_CS_N))
+ (pad 10 smd rect (at 5.0292 -5.715 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 12 smd rect (at -5.0292 -4.445 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 10 ARM_FPGA_CFG_MISO))
+ (pad 11 smd rect (at -5.0292 -5.715 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 120 FPGA_CFG_CS_N))
+ )
+
+ (module SO08 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 45.5368 -25.283198)
(path /539EEC0F)
(attr smd)
- (fp_text reference "IC3" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference IC3 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
- (fp_text value "SO08" (at 0 0) (layer F.SilkS) hide
+ (fp_text value SO08 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:809 pos:167206(0x28D26) type:2 net:170
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- (pad "5" smd rect (at 3.07340 1.90500 270) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 172 "FPGA_PROM_MOSI")
- )
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- (pad "4" smd rect (at -3.07340 1.90500 270) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
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- (pad "6" smd rect (at 3.07340 0.63500 270) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 173 "FPGA_PROM_SCLK")
- )
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- (pad "7" smd rect (at 3.07340 -0.63500 270) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
- )
-#1309 counter:813 pos:168022(0x29056) type:2 net:172
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- (pad "3" smd rect (at -3.07340 0.63500 270) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 174 "FPGA_PROM_W_N")
- )
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- (pad "2" smd rect (at -3.07340 -0.63500 270) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 171 "FPGA_PROM_MISO")
- )
-#1309 counter:815 pos:168430(0x291EE) type:2 net:301
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- (pad "8" smd rect (at 3.07340 -1.90500 270) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
- )
-#1309 counter:816 pos:168634(0x292BA) type:2 net:168
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- (pad "1" smd rect (at -3.07340 -1.90500 270) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 170 "FPGA_PROM_CS_N")
- )
-
+ (pad 5 smd rect (at 3.0734 1.905 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 171 FPGA_PROM_MOSI))
+ (pad 4 smd rect (at -3.0734 1.905 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 6 smd rect (at 3.0734 0.635 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 172 FPGA_PROM_SCLK))
+ (pad 7 smd rect (at 3.0734 -0.635 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (pad 3 smd rect (at -3.0734 0.635 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 173 FPGA_PROM_W_N))
+ (pad 2 smd rect (at -3.0734 -0.635 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 170 FPGA_PROM_MISO))
+ (pad 8 smd rect (at 3.0734 -1.905 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (pad 1 smd rect (at -3.0734 -1.905 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 169 FPGA_PROM_CS_N))
)
-#Components#233: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10787mil|Y=3739.37mil|PATTERN=SO20W|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=2|SOURCEDESIGNATOR=IC4|SOURCEUNIQUEID=\EWWHIAAJ|SOURCEHIERARCHICALPATH=rev02_12|SOURCEFOOTPRINTLIBRARY=rev02.PcbLib|SOURCECOMPONENTLIBRARY=74xx-eu.IntLib|SOURCELIBREFERENCE=74*244DW|SOURCEDESCRIPTION=Octal BUFFER and LINE DRIVER, 3-state|FOOTPRINTDESCRIPTION=SO20W|UNIQUEID=SINDUAKT|JUMPERSVISIBLE=TRUE
-#$pads{233}
- (module "SO20W" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module SO20W (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 74.0918 -30.463998)
(path /539EEC0F)
(attr smd)
- (fp_text reference "IC4" (at 0 0) (layer F.SilkS) hide
- (effects (font (thickness 0.05)))
- )
- (fp_text value "SO20W" (at 0 0) (layer F.SilkS) hide
- (effects (font (thickness 0.05)))
- )
-
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- (pad "11" smd rect (at 5.71500 -5.02920) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 218 "MKM_FPGA_CS_N")
- )
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- (pad "12" smd rect (at 4.44500 -5.02920) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 212 "MKM_AVR_MISO")
- )
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- (pad "10" smd rect (at 5.71500 5.02920) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
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- (pad "9" smd rect (at 4.44500 5.02920) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 217 "MKM_CS_N")
- )
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- (pad "20" smd rect (at -5.71500 -5.02920) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 4 "3V3_BATT")
- )
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- (pad "19" smd rect (at -4.44500 -5.02920) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 216 "MKM_CONTROL_FPGA_DIS")
- )
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- (pad "18" smd rect (at -3.17500 -5.02920) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 217 "MKM_CS_N")
- )
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- (pad "17" smd rect (at -1.90500 -5.02920) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 222 "MKM_MISO")
- )
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- (pad "16" smd rect (at -0.63500 -5.02920) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 224 "MKM_SCK")
- )
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- (pad "15" smd rect (at 0.63500 -5.02920) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 220 "MKM_FPGA_MOSI")
- )
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- (pad "14" smd rect (at 1.90500 -5.02920) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 223 "MKM_MOSI")
- )
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- (pad "13" smd rect (at 3.17500 -5.02920) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 221 "MKM_FPGA_SCK")
- )
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- (pad "8" smd rect (at 3.17500 5.02920) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 222 "MKM_MISO")
- )
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- (pad "7" smd rect (at 1.90500 5.02920) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 224 "MKM_SCK")
- )
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- (pad "6" smd rect (at 0.63500 5.02920) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 213 "MKM_AVR_MOSI")
- )
-#1309 counter:154 pos:33388(0x826C) type:2 net:221
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- (pad "5" smd rect (at -0.63500 5.02920) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 223 "MKM_MOSI")
- )
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- (pad "4" smd rect (at -1.90500 5.02920) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 214 "MKM_AVR_SCK")
- )
-#1309 counter:156 pos:33796(0x8404) type:2 net:217
-#010000000005000000047C267C300100000000AA000000010C00D900FFFFE900FFFFFFFF60E45A06C45E1C02A0F7030000350C00A0F7030000350C00A0F7030000350C000000000002020200000000000000000100000000000000F200030004007980010079800100798001001BB3FFFFE54C00000000000101010101010100000000000000000000010000010000
- (pad "3" smd rect (at -3.17500 5.02920) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 219 "MKM_FPGA_MISO")
- )
-#1309 counter:157 pos:34000(0x84D0) type:2 net:209
-#010000000005000000047C267C300100000000AA000000010C00D100FFFFE900FFFFFFFF40435306C45E1C02A0F7030000350C00A0F7030000350C00A0F7030000350C000000000002020200000000000000000100000000000000F200030004007980010079800100798001001BB3FFFFE54C00000000000101010101010100000000000000000000010000010000
- (pad "2" smd rect (at -4.44500 5.02920) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 211 "MKM_AVR_CS_N")
- )
-#1309 counter:158 pos:34204(0x859C) type:2 net:213
-#010000000005000000047C267C300100000000AA000000010C00D500FFFFE900FFFFFFFF20A24B06C45E1C02A0F7030000350C00A0F7030000350C00A0F7030000350C000000000002020200000000000000000100000000000000F200030004007980010079800100798001001BB3FFFFE54C00000000000101010101010100000000000000000000010000010000
- (pad "1" smd rect (at -5.71500 5.02920) (size 0.6604000 2.0320000)
- (layers F.Cu F.Mask F.Paste) (net 215 "MKM_CONTROL_AVR_ENA")
- )
-
- )
-#Components#234: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9910mil|Y=2976mil|PATTERN=RCLAMP0502A|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=19|SOURCEDESIGNATOR=IC5|SOURCEUNIQUEID=\SCSOASQX|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=rev02.PcbLib|SOURCECOMPONENTLIBRARY=UsedComponents.IntLib|SOURCELIBREFERENCE=RCLAMP0502ASC-89|SOURCEDESCRIPTION=USB protective diodes|FOOTPRINTDESCRIPTION=RCLAMP0502A|UNIQUEID=DPKPFYVG|JUMPERSVISIBLE=TRUE
-#$pads{234}
- (module "RCLAMP0502A" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (fp_text reference IC4 (at 0 0) (layer F.SilkS) hide
+ (effects (font (thickness 0.05)))
+ )
+ (fp_text value SO20W (at 0 0) (layer F.SilkS) hide
+ (effects (font (thickness 0.05)))
+ )
+ (pad 11 smd rect (at 5.715 -5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 217 MKM_FPGA_CS_N))
+ (pad 12 smd rect (at 4.445 -5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 211 MKM_AVR_MISO))
+ (pad 10 smd rect (at 5.715 5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 9 smd rect (at 4.445 5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 216 MKM_CS_N))
+ (pad 20 smd rect (at -5.715 -5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 3 3V3_BATT))
+ (pad 19 smd rect (at -4.445 -5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 215 MKM_CONTROL_FPGA_DIS))
+ (pad 18 smd rect (at -3.175 -5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 216 MKM_CS_N))
+ (pad 17 smd rect (at -1.905 -5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 221 MKM_MISO))
+ (pad 16 smd rect (at -0.635 -5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 223 MKM_SCK))
+ (pad 15 smd rect (at 0.635 -5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 219 MKM_FPGA_MOSI))
+ (pad 14 smd rect (at 1.905 -5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 222 MKM_MOSI))
+ (pad 13 smd rect (at 3.175 -5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 220 MKM_FPGA_SCK))
+ (pad 8 smd rect (at 3.175 5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 221 MKM_MISO))
+ (pad 7 smd rect (at 1.905 5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 223 MKM_SCK))
+ (pad 6 smd rect (at 0.635 5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 212 MKM_AVR_MOSI))
+ (pad 5 smd rect (at -0.635 5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 222 MKM_MOSI))
+ (pad 4 smd rect (at -1.905 5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 213 MKM_AVR_SCK))
+ (pad 3 smd rect (at -3.175 5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 218 MKM_FPGA_MISO))
+ (pad 2 smd rect (at -4.445 5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 210 MKM_AVR_CS_N))
+ (pad 1 smd rect (at -5.715 5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 214 MKM_CONTROL_AVR_ENA))
+ )
+
+ (module RCLAMP0502A (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 51.816 -11.0744)
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-#$pads{235}
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-#$pads{236}
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-#$pads{237}
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-#$pads{238}
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-#Components#239: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8657.4016mil|Y=1815.5906mil|PATTERN=694106301002|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|HEIGHT=393.7008mil|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=13|SOURCEDESIGNATOR=JP1|SOURCEUNIQUEID=\NDFLUAOE|SOURCEHIERARCHICALPATH=rev02_1|SOURCEFOOTPRINTLIBRARY=rev02.PcbLib|SOURCECOMPONENTLIBRARY=rev02_1.SCHLIB|SOURCELIBREFERENCE=POWER_JACKSMD|SOURCEDESCRIPTION=Wurth Power Connector 5.5x2.1mm Barrel|FOOTPRINTDESCRIPTION=Wurth DC Power Jack, 2.1mm, PCB Mount|UNIQUEID=DQBIMPQR|JUMPERSVISIBLE=TRUE
-#$pads{239}
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+ (module 694106301002 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
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+ (net 6 GND))
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-#$pads{240}
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+ (module PLS-2 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
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-#$pads{241}
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-#Components#242: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11361.3121mil|Y=2480.9449mil|PATTERN=PLS-3|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|UNIONINDEX=0|CHANNELOFFSET=5|SOURCEDESIGNATOR=JP4|SOURCEUNIQUEID=\RUSALGIN|SOURCEHIERARCHICALPATH=rev02_11|SOURCEFOOTPRINTLIBRARY=Connectors.PcbLib|SOURCECOMPONENTLIBRARY=SparkFun-Connectors.IntLib|SOURCELIBREFERENCE=M03LOCK|SOURCEDESCRIPTION=Standard 3-pin 0.1" header. Use with straight break away headers (SKU : PRT-00116), right angle break away headers (PRT-00553), swiss pins (PRT-00743), machine pins (PRT-00117), and female headers (PRT-00115). Molex polarized connector foot print use with SKU : PRT-08232 with associated crimp pins and housings.|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=DEYDMPVE|JUMPERSVISIBLE=TRUE
-#$pads{242}
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- )
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- (layers F.Cu B.Cu F.Mask F.Paste B.Mask B.Paste) (net 303 "VCCO_3V3")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/836C6F64-A2E5.wrl"
+ (pad 3 thru_hole circle (at 2.54 0) (size 1.5 1.5) (drill 1.000001) (layers F&B.Cu *.Paste *.Mask)
+ (net 6 GND))
+ (pad 2 thru_hole circle (at 0 0) (size 1.5 1.5) (drill 1.000001) (layers F&B.Cu *.Paste *.Mask)
+ (net 3 3V3_BATT))
+ (pad 1 thru_hole rect (at -2.54 0) (size 1.5 1.5) (drill 1.000001) (layers F&B.Cu *.Paste *.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/836C6F64-A2E5.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#243: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8588.5039mil|Y=3700.4331mil|PATTERN=PLD-6|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=5|SOURCEDESIGNATOR=JP7|SOURCEUNIQUEID=\FPYNTANX|SOURCEHIERARCHICALPATH=rev02_15|SOURCEFOOTPRINTLIBRARY=Connectors.PcbLib|SOURCECOMPONENTLIBRARY=SparkFun-Connectors.IntLib|SOURCELIBREFERENCE=M03X2NO_SILK|SOURCEDESCRIPTION=2x3 .1" header|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=OWMBEXPO|JUMPERSVISIBLE=TRUE
-#$pads{243}
- (module "PLD-6" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module PLD-6 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 18.249999 -29.475001)
(path /539EEC0F)
(attr smd)
- (fp_text reference "JP7" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference JP7 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- )
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- )
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- (pad "5" thru_hole circle (at -1.27000 2.54000 270) (size 1.4999995 1.4999995) (drill 1.0000005)
- (layers F.Cu B.Cu F.Mask F.Paste B.Mask B.Paste) (net 174 "FPGA_PROM_W_N")
- )
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- (pad "6" thru_hole circle (at 1.27000 2.54000 270) (size 1.4999995 1.4999995) (drill 1.0000005)
- (layers F.Cu B.Cu F.Mask F.Paste B.Mask B.Paste) (net 303 "VCCO_3V3")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/B3089A96-FA19.wrl"
+ (pad 1 thru_hole rect (at -1.27 -2.54 270) (size 1.5 1.5) (drill 1.000001) (layers F&B.Cu *.Paste *.Mask)
+ (net 121 FPGA_CFG_CTRL_ARM_ENA))
+ (pad 2 thru_hole circle (at 1.27 -2.54 270) (size 1.5 1.5) (drill 1.000001) (layers F&B.Cu *.Paste *.Mask)
+ (net 291 SPI_A_TRISTATE))
+ (pad 3 thru_hole circle (at -1.27 0 270) (size 1.5 1.5) (drill 1.000001) (layers F&B.Cu *.Paste *.Mask)
+ (net 122 FPGA_CFG_CTRL_FPGA_DIS))
+ (pad 4 thru_hole circle (at 1.27 0 270) (size 1.5 1.5) (drill 1.000001) (layers F&B.Cu *.Paste *.Mask)
+ (net 292 SPI_B_TRISTATE))
+ (pad 5 thru_hole circle (at -1.27 2.54 270) (size 1.5 1.5) (drill 1.000001) (layers F&B.Cu *.Paste *.Mask)
+ (net 173 FPGA_PROM_W_N))
+ (pad 6 thru_hole circle (at 1.27 2.54 270) (size 1.5 1.5) (drill 1.000001) (layers F&B.Cu *.Paste *.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/B3089A96-FA19.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#244: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9661.8976mil|Y=1910.0788mil|PATTERN=VD_0603|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|HEIGHT=19.685mil|UNIONINDEX=0|CHANNELOFFSET=5|SOURCEDESIGNATOR=LED1|SOURCEUNIQUEID=\HBWGRJBN|SOURCEHIERARCHICALPATH=rev02_3|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=rev02_1.SCHLIB|SOURCELIBREFERENCE=LEDCHIP-LED0603|SOURCEDESCRIPTION=GREEN LED|FOOTPRINTDESCRIPTION=Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=AHCFDHQR|JUMPERSVISIBLE=TRUE
-#$pads{244}
- (module "VD_0603" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module VD_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 45.514199 15.999998)
(path /539EEC0F)
(attr smd)
- (fp_text reference "LED1" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference LED1 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:116 pos:25628(0x641C) type:2 net:244
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- (pad "1" smd rect (at 0.00000 -0.80000) (size 1.0000005 0.8000009)
- (layers F.Cu F.Mask F.Paste) (net 246 "NetLED1_1")
- )
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- (pad "2" smd rect (at 0.00000 0.80000) (size 1.0000005 0.8000009)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl"
+ (pad 1 smd rect (at 0 -0.8) (size 1.000001 0.800001) (layers F.Cu F.Paste F.Mask)
+ (net 245 NetLED1_1))
+ (pad 2 smd rect (at 0 0.8) (size 1.000001 0.800001) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#245: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9504.4171mil|Y=1910.0788mil|PATTERN=VD_0603|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|HEIGHT=19.685mil|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=6|SOURCEDESIGNATOR=LED2|SOURCEUNIQUEID=\DXAGWNFC|SOURCEHIERARCHICALPATH=rev02_3|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=rev02_1.SCHLIB|SOURCELIBREFERENCE=LEDCHIP-LED0603|SOURCEDESCRIPTION=RED LED|FOOTPRINTDESCRIPTION=Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=PCSDLCWP|JUMPERSVISIBLE=TRUE
-#$pads{245}
- (module "VD_0603" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module VD_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 41.514194 15.999998)
(path /539EEC0F)
(attr smd)
- (fp_text reference "LED2" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference LED2 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:112 pos:24812(0x60EC) type:2 net:5
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- (pad "2" smd rect (at 0.00000 0.80000) (size 1.0000005 0.8000009)
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- )
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- (pad "1" smd rect (at 0.00000 -0.80000) (size 1.0000005 0.8000009)
- (layers F.Cu F.Mask F.Paste) (net 247 "NetLED2_1")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl"
+ (pad 2 smd rect (at 0 0.8) (size 1.000001 0.800001) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 -0.8) (size 1.000001 0.800001) (layers F.Cu F.Paste F.Mask)
+ (net 246 NetLED2_1))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#246: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9425.6769mil|Y=1910.0788mil|PATTERN=VD_0603|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|HEIGHT=19.685mil|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=7|SOURCEDESIGNATOR=LED3|SOURCEUNIQUEID=\CLXXRKAI|SOURCEHIERARCHICALPATH=rev02_3|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=rev02_1.SCHLIB|SOURCELIBREFERENCE=LEDCHIP-LED0603|SOURCEDESCRIPTION=BLUE LED|FOOTPRINTDESCRIPTION=Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=VAHXHSRJ|JUMPERSVISIBLE=TRUE
-#$pads{246}
- (module "VD_0603" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module VD_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 39.514193 15.999998)
(path /539EEC0F)
(attr smd)
- (fp_text reference "LED3" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference LED3 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "1" smd rect (at 0.00000 -0.80000) (size 1.0000005 0.8000009)
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- )
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- (pad "2" smd rect (at 0.00000 0.80000) (size 1.0000005 0.8000009)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl"
+ (pad 1 smd rect (at 0 -0.8) (size 1.000001 0.800001) (layers F.Cu F.Paste F.Mask)
+ (net 247 NetLED3_1))
+ (pad 2 smd rect (at 0 0.8) (size 1.000001 0.800001) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#247: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9583.1574mil|Y=1910.0788mil|PATTERN=VD_0603|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|HEIGHT=19.685mil|UNIONINDEX=0|CHANNELOFFSET=8|SOURCEDESIGNATOR=LED4|SOURCEUNIQUEID=\IHSNTRQE|SOURCEHIERARCHICALPATH=rev02_3|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=rev02_1.SCHLIB|SOURCELIBREFERENCE=LEDCHIP-LED0603|SOURCEDESCRIPTION=YELLOW LED|FOOTPRINTDESCRIPTION=Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=VFEXQURH|JUMPERSVISIBLE=TRUE
-#$pads{247}
- (module "VD_0603" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module VD_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 43.514198 15.999998)
(path /539EEC0F)
(attr smd)
- (fp_text reference "LED4" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference LED4 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:114 pos:25220(0x6284) type:2 net:5
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- (pad "2" smd rect (at 0.00000 0.80000) (size 1.0000005 0.8000009)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1309 counter:115 pos:25424(0x6350) type:2 net:247
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- (pad "1" smd rect (at 0.00000 -0.80000) (size 1.0000005 0.8000009)
- (layers F.Cu F.Mask F.Paste) (net 249 "NetLED4_1")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl"
+ (pad 2 smd rect (at 0 0.8) (size 1.000001 0.800001) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 -0.8) (size 1.000001 0.800001) (layers F.Cu F.Paste F.Mask)
+ (net 248 NetLED4_1))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#248: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9222.3621mil|Y=1910.0787mil|PATTERN=VD_0603|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|HEIGHT=19.685mil|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=7|SOURCEDESIGNATOR=LED9|SOURCEUNIQUEID=\WAUMVLWR|SOURCEHIERARCHICALPATH=rev02_11|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=rev02_1.SCHLIB|SOURCELIBREFERENCE=LEDCHIP-LED0603|SOURCEDESCRIPTION=GREEN LED|FOOTPRINTDESCRIPTION=Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=GVBYSDTL|JUMPERSVISIBLE=TRUE
-#$pads{248}
- (module "VD_0603" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module VD_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 34.349997 16.000001)
(path /539EEC0F)
(attr smd)
- (fp_text reference "LED9" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference LED9 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- )
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl"
+ (pad 1 smd rect (at 0 -0.8) (size 1.000001 0.800001) (layers F.Cu F.Paste F.Mask)
+ (net 249 NetLED9_1))
+ (pad 2 smd rect (at 0 0.8) (size 1.000001 0.800001) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
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-#$pads{249}
- (module "VD_0603" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module VD_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 30.349995 16.000001)
(path /539EEC0F)
(attr smd)
- (fp_text reference "LED10" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference LED10 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl"
+ (pad 2 smd rect (at 0 0.8) (size 1.000001 0.800001) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 -0.8) (size 1.000001 0.800001) (layers F.Cu F.Paste F.Mask)
+ (net 250 NetLED10_1))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#250: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8986.1418mil|Y=1910.0787mil|PATTERN=VD_0603|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|HEIGHT=19.685mil|UNIONINDEX=0|CHANNELOFFSET=9|SOURCEDESIGNATOR=LED11|SOURCEUNIQUEID=\GQMIRCOA|SOURCEHIERARCHICALPATH=rev02_11|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=rev02_1.SCHLIB|SOURCELIBREFERENCE=LEDCHIP-LED0603|SOURCEDESCRIPTION=BLUE LED|FOOTPRINTDESCRIPTION=Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=DIEOCIKJ|JUMPERSVISIBLE=TRUE
-#$pads{250}
- (module "VD_0603" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module VD_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 28.350002 16.000001)
(path /539EEC0F)
(attr smd)
- (fp_text reference "LED11" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference LED11 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl"
+ (pad 1 smd rect (at 0 -0.8) (size 1.000001 0.800001) (layers F.Cu F.Paste F.Mask)
+ (net 251 NetLED11_1))
+ (pad 2 smd rect (at 0 0.8) (size 1.000001 0.800001) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#251: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9143.6219mil|Y=1910.0787mil|PATTERN=VD_0603|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|HEIGHT=19.685mil|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=10|SOURCEDESIGNATOR=LED12|SOURCEUNIQUEID=\JVVPCFGQ|SOURCEHIERARCHICALPATH=rev02_11|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=rev02_1.SCHLIB|SOURCELIBREFERENCE=LEDCHIP-LED0603|SOURCEDESCRIPTION=YELLOW LED|FOOTPRINTDESCRIPTION=Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=OPFMRYSD|JUMPERSVISIBLE=TRUE
-#$pads{251}
- (module "VD_0603" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module VD_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 32.349996 16.000001)
(path /539EEC0F)
(attr smd)
- (fp_text reference "LED12" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference LED12 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl"
+ (pad 2 smd rect (at 0 0.8) (size 1.000001 0.800001) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 -0.8) (size 1.000001 0.800001) (layers F.Cu F.Paste F.Mask)
+ (net 252 NetLED12_1))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
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-#$pads{252}
- (module "VD_0603" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module VD_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 73.999999 16.000001)
(path /539EEC0F)
(attr smd)
- (fp_text reference "LED13" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference LED13 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
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- (layers F.Cu F.Mask F.Paste) (net 130 "FPGA_DONE_INT")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl"
+ (pad 1 smd rect (at 0 -0.8) (size 1.000001 0.800001) (layers F.Cu F.Paste F.Mask)
+ (net 253 NetLED13_1))
+ (pad 2 smd rect (at 0 0.8) (size 1.000001 0.800001) (layers F.Cu F.Paste F.Mask)
+ (net 129 FPGA_DONE_INT))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#253: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9919.2127mil|Y=1910.0787mil|PATTERN=VD_0603|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|HEIGHT=19.685mil|UNIONINDEX=0|CHANNELOFFSET=2|SOURCEDESIGNATOR=LED14|SOURCEUNIQUEID=\AQICQHCJ|SOURCEHIERARCHICALPATH=rev02_19|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=rev02_1.SCHLIB|SOURCELIBREFERENCE=LEDCHIP-LED0603|SOURCEDESCRIPTION=RED LED|FOOTPRINTDESCRIPTION=Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=GRTCHKXL|JUMPERSVISIBLE=TRUE
-#$pads{253}
- (module "VD_0603" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module VD_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 52.050003 16.000001)
(path /539EEC0F)
(attr smd)
- (fp_text reference "LED14" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference LED14 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
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- (layers F.Cu F.Mask F.Paste) (net 255 "NetLED14_1")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl"
+ (pad 2 smd rect (at 0 0.8) (size 1.000001 0.800001) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 -0.8) (size 1.000001 0.800001) (layers F.Cu F.Paste F.Mask)
+ (net 254 NetLED14_1))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#254: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10076.6928mil|Y=1910.0787mil|PATTERN=VD_0603|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|HEIGHT=19.685mil|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=3|SOURCEDESIGNATOR=LED15|SOURCEUNIQUEID=\YPAJKBLC|SOURCEHIERARCHICALPATH=rev02_19|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=rev02_1.SCHLIB|SOURCELIBREFERENCE=LEDCHIP-LED0603|SOURCEDESCRIPTION=GREEN LED|FOOTPRINTDESCRIPTION=Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=YMKBKIHR|JUMPERSVISIBLE=TRUE
-#$pads{254}
- (module "VD_0603" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module VD_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 56.049997 16.000001)
(path /539EEC0F)
(attr smd)
- (fp_text reference "LED15" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference LED15 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl"
+ (pad 1 smd rect (at 0 -0.8) (size 1.000001 0.800001) (layers F.Cu F.Paste F.Mask)
+ (net 255 NetLED15_1))
+ (pad 2 smd rect (at 0 0.8) (size 1.000001 0.800001) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#255: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9997.9526mil|Y=1910.0787mil|PATTERN=VD_0603|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|HEIGHT=19.685mil|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=4|SOURCEDESIGNATOR=LED16|SOURCEUNIQUEID=\LWEGBGDQ|SOURCEHIERARCHICALPATH=rev02_19|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=rev02_1.SCHLIB|SOURCELIBREFERENCE=LEDCHIP-LED0603|SOURCEDESCRIPTION=YELLOW LED|FOOTPRINTDESCRIPTION=Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=XEDPWRGP|JUMPERSVISIBLE=TRUE
-#$pads{255}
- (module "VD_0603" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module VD_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 54.049996 16.000001)
(path /539EEC0F)
(attr smd)
- (fp_text reference "LED16" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference LED16 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
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- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1309 counter:97 pos:21752(0x54F8) type:2 net:255
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- (pad "1" smd rect (at 0.00000 -0.80000) (size 1.0000005 0.8000009)
- (layers F.Cu F.Mask F.Paste) (net 257 "NetLED16_1")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl"
+ (pad 2 smd rect (at 0 0.8) (size 1.000001 0.800001) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0 -0.8) (size 1.000001 0.800001) (layers F.Cu F.Paste F.Mask)
+ (net 256 NetLED16_1))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#256: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9840.4725mil|Y=1910.0787mil|PATTERN=VD_0603|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|HEIGHT=19.685mil|UNIONINDEX=0|CHANNELOFFSET=5|SOURCEDESIGNATOR=LED17|SOURCEUNIQUEID=\WDDVPRLH|SOURCEHIERARCHICALPATH=rev02_19|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=rev02_1.SCHLIB|SOURCELIBREFERENCE=LEDCHIP-LED0603|SOURCEDESCRIPTION=BLUE LED|FOOTPRINTDESCRIPTION=Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=FRQQKVME|JUMPERSVISIBLE=TRUE
-#$pads{256}
- (module "VD_0603" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module VD_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 50.050001 16.000001)
(path /539EEC0F)
(attr smd)
- (fp_text reference "LED17" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference LED17 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:100 pos:22364(0x575C) type:2 net:256
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- (pad "1" smd rect (at 0.00000 -0.80000) (size 1.0000005 0.8000009)
- (layers F.Cu F.Mask F.Paste) (net 258 "NetLED17_1")
- )
-#1309 counter:101 pos:22568(0x5828) type:2 net:5
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- (pad "2" smd rect (at 0.00000 0.80000) (size 1.0000005 0.8000009)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl"
+ (pad 1 smd rect (at 0 -0.8) (size 1.000001 0.800001) (layers F.Cu F.Paste F.Mask)
+ (net 257 NetLED17_1))
+ (pad 2 smd rect (at 0 0.8) (size 1.000001 0.800001) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#257: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10867.3328mil|Y=1910.0787mil|PATTERN=VD_0603|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|HEIGHT=19.685mil|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=6|SOURCEDESIGNATOR=LED18|SOURCEUNIQUEID=\TRGRSGNT|SOURCEHIERARCHICALPATH=rev02_25|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=rev02_1.SCHLIB|SOURCELIBREFERENCE=LEDCHIP-LED0603|SOURCEDESCRIPTION=GREEN LED|FOOTPRINTDESCRIPTION=Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=VQEWNMME|JUMPERSVISIBLE=TRUE
-#$pads{257}
- (module "VD_0603" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module VD_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 76.132253 16.000001)
(path /539EEC0F)
(attr smd)
- (fp_text reference "LED18" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference LED18 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
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- (pad "2" smd rect (at 0.00000 0.80000) (size 1.0000005 0.8000009)
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- )
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- (pad "1" smd rect (at 0.00000 -0.80000) (size 1.0000005 0.8000009)
- (layers F.Cu F.Mask F.Paste) (net 259 "NetLED18_1")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl"
+ (pad 2 smd rect (at 0 0.8) (size 1.000001 0.800001) (layers F.Cu F.Paste F.Mask)
+ (net 259 NetLED18_2))
+ (pad 1 smd rect (at 0 -0.8) (size 1.000001 0.800001) (layers F.Cu F.Paste F.Mask)
+ (net 258 NetLED18_1))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#258: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10722.4409mil|Y=6289.559mil|PATTERN=SOT-23|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=15|SOURCEDESIGNATOR=Q1|SOURCEUNIQUEID=\RFOFNPYE|SOURCEHIERARCHICALPATH=rev02_1|SOURCEFOOTPRINTLIBRARY=CHIPS.PcbLib|SOURCECOMPONENTLIBRARY=transistors_gaui.IntLib|SOURCELIBREFERENCE=2N7002|SOURCEDESCRIPTION=OnSemi FET|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=JURAXBEN|JUMPERSVISIBLE=TRUE
-#$pads{258}
- (module "SOT-23" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module SOT-23 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 72.451999 -95.238799)
(path /539EEC0F)
(attr smd)
- (fp_text reference "Q1" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference Q1 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
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- (pad "3" smd rect (at -0.00000 1.10000 270) (size 1.2000001 0.8000009)
- (layers F.Cu F.Mask F.Paste) (net 245 "NetJP2_2")
- )
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- (pad "2" smd rect (at -0.95000 -1.10000 270) (size 1.2000001 0.8000009)
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- )
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- (layers F.Cu F.Mask F.Paste) (net 261 "NetQ1_1")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/04B9CA18-3B1B.wrl"
+ (pad 3 smd rect (at 0 1.1 270) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask)
+ (net 244 NetJP2_2))
+ (pad 2 smd rect (at -0.95 -1.1 270) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 0.95 -1.1 270) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask)
+ (net 260 NetQ1_1))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/04B9CA18-3B1B.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#259: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11428mil|Y=6193mil|PATTERN=SOT-23|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=4|SOURCEDESIGNATOR=Q2|SOURCEUNIQUEID=\HESHPHVY|SOURCEHIERARCHICALPATH=rev02_2|SOURCEFOOTPRINTLIBRARY=CHIPS.PcbLib|SOURCECOMPONENTLIBRARY=rev02_1.SCHLIB|SOURCELIBREFERENCE=BC818*SMD|SOURCEDESCRIPTION=NPN Transistor|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=LCPRGVTC|JUMPERSVISIBLE=TRUE
-#$pads{259}
- (module "SOT-23" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module SOT-23 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 90.3732 -92.7862)
(path /539EEC0F)
(attr smd)
- (fp_text reference "Q2" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference Q2 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
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- )
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- )
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- (layers B.Cu B.Mask B.Paste)
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/04B9CA18-3B1B.wrl"
+ (pad 1 smd rect (at -1.1 0.95) (size 1.2 0.800001) (layers B.Cu B.Paste B.Mask)
+ (net 276 NOISE_OUT))
+ (pad 2 smd rect (at -1.1 -0.95) (size 1.2 0.800001) (layers B.Cu B.Paste B.Mask)
+ (net 275 NOISE_IN))
+ (pad 3 smd rect (at 1.1 0) (size 1.2 0.800001) (layers B.Cu B.Paste B.Mask))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/04B9CA18-3B1B.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#260: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=FALSE|X=8984.1732mil|Y=3916.9685mil|PATTERN=CRYSTAL_3.2X2.5|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=9|SOURCEDESIGNATOR=Q3|SOURCEUNIQUEID=\KRHNPRRY|SOURCEHIERARCHICALPATH=rev02_3|SOURCEFOOTPRINTLIBRARY=rev02.PcbLib|SOURCECOMPONENTLIBRARY=adafruit.IntLib|SOURCELIBREFERENCE=XTAL-4-3225|SOURCEDESCRIPTION=Abracon 25MHz 10pF 4-pin 3.2 x 2.5mm crystal|FOOTPRINTDESCRIPTION=CRYSTAL_3.2X2.5|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=KXPBKWWN|JUMPERSVISIBLE=TRUE
-#$pads{260}
- (module "CRYSTAL_3.2X2.5" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module CRYSTAL_3.2X2.5 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 28.299999 -34.975)
(path /539EEC0F)
(attr smd)
- (fp_text reference "Q3" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference Q3 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
- (fp_text value "CRYSTAL_3.2X2.5" (at 0 0) (layer F.SilkS) hide
+ (fp_text value CRYSTAL_3.2X2.5 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (layers B.Cu B.Mask B.Paste) (net 228 "NetC17_2")
- )
-
+ (pad 4 smd rect (at 1.1176 -0.8636) (size 1.397 1.1938) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 3 smd rect (at -1.0922 -0.8636) (size 1.397 1.1938) (layers B.Cu B.Paste B.Mask)
+ (net 279 OSC_OUT))
+ (pad 2 smd rect (at -1.0922 0.8382 180) (size 1.397 1.1938) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 1.1176 0.8382 180) (size 1.397 1.1938) (layers B.Cu B.Paste B.Mask)
+ (net 227 NetC17_2))
)
-#Components#261: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11386mil|Y=5416mil|PATTERN=SOT-23|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=2|SOURCEDESIGNATOR=Q4|SOURCEUNIQUEID=\XKNQFLHE|SOURCEHIERARCHICALPATH=rev02_13|SOURCEFOOTPRINTLIBRARY=CHIPS.PcbLib|SOURCECOMPONENTLIBRARY=transistors_gaui.IntLib|SOURCELIBREFERENCE=2N7002|SOURCEDESCRIPTION=OnSemi FET|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=OCPVFASG|JUMPERSVISIBLE=TRUE
-#$pads{261}
- (module "SOT-23" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module SOT-23 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 89.3064 -73.0504)
(path /539EEC0F)
(attr smd)
- (fp_text reference "Q4" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference Q4 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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)
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/04B9CA18-3B1B.wrl"
+ (pad 3 smd rect (at -1.1 0 180) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask)
+ (net 154 FPGA_INIT_B_INT))
+ (pad 2 smd rect (at 1.1 -0.95 180) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 1.1 0.95 180) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask)
+ (net 155 FPGA_INIT_B))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/04B9CA18-3B1B.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#262: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10546mil|Y=5875mil|PATTERN=ASF|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|HEIGHT=59.0551mil|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=8|SOURCEDESIGNATOR=Q5|SOURCEUNIQUEID=\NKKCPVOR|SOURCEHIERARCHICALPATH=rev02_15|SOURCEFOOTPRINTLIBRARY=rev02.PcbLib|SOURCECOMPONENTLIBRARY=rev02_1.SCHLIB|SOURCELIBREFERENCE=ASF*|SOURCEDESCRIPTION=CRYSTAL CLOCK OSCILLATOR. 5.0 Vdc or 3.3 Vdc - LOW PROFILE ULTRA MINIATURE CERAMIC SURFACE MOUNT. \nSource: http://www.abracon.com/Oscillators/asf1-L-L1.pdf|FOOTPRINTDESCRIPTION=ASF|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=BVSFBFON|JUMPERSVISIBLE=TRUE
-#$pads{262}
- (module "ASF" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module ASF (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 67.9704 -84.709)
(path /539EEC0F)
(attr smd)
- (fp_text reference "Q5" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference Q5 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
- (fp_text value "ASF" (at 0 0) (layer F.SilkS) hide
+ (fp_text value ASF (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:1896 pos:487891(0x771D3) type:2 net:301
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- (pad "4" smd rect (at -1.09220 -1.25240 270) (size 1.7018000 1.4986000)
- (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
- )
-#1309 counter:1897 pos:488095(0x7729F) type:2 net:261
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- (pad "3" smd rect (at -1.09220 1.29540 270) (size 1.7018000 1.4986000)
- (layers B.Cu B.Mask B.Paste) (net 263 "NetQ5_3")
- )
-#1309 counter:1898 pos:488299(0x7736B) type:2 net:260
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- (pad "1" smd rect (at 1.13020 -1.25240 270) (size 1.7018000 1.4986000)
- (layers B.Cu B.Mask B.Paste) (net 262 "NetQ5_1")
- )
-#1309 counter:1899 pos:488503(0x77437) type:2 net:5
-#010000000005000000047C267C300100000000AA000000200C000500FFFF0601FFFFFFFF41FB4F0600AC780330390A00B000090030390A00B000090030390A00B0000900000000000202020000000000E070400100000000000000F200030004007980010079800100798001001BB3FFFFE54C00000000000101010101010100000000000000000000FFFF00010000
- (pad "2" smd rect (at 1.13020 1.29540 270) (size 1.7018000 1.4986000)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
-
+ (pad 4 smd rect (at -1.0922 -1.2524 270) (size 1.7018 1.4986) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad 3 smd rect (at -1.0922 1.2954 270) (size 1.7018 1.4986) (layers B.Cu B.Paste B.Mask)
+ (net 262 NetQ5_3))
+ (pad 1 smd rect (at 1.1302 -1.2524 270) (size 1.7018 1.4986) (layers B.Cu B.Paste B.Mask)
+ (net 261 NetQ5_1))
+ (pad 2 smd rect (at 1.1302 1.2954 270) (size 1.7018 1.4986) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
)
-#Components#263: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8489.6772mil|Y=4209.7087mil|PATTERN=SOT-23|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|NAMEAUTOPOSITION=1|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=7|SOURCEDESIGNATOR=Q6|SOURCEUNIQUEID=\SULUVTFU|SOURCEHIERARCHICALPATH=rev02_25|SOURCEFOOTPRINTLIBRARY=CHIPS.PcbLib|SOURCECOMPONENTLIBRARY=transistors_gaui.IntLib|SOURCELIBREFERENCE=2N7002|SOURCEDESCRIPTION=OnSemi FET|UNIQUEID=PROYDWIG|JUMPERSVISIBLE=TRUE
-#$pads{263}
- (module "SOT-23" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module SOT-23 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 15.739801 -42.410601)
(path /539EEC0F)
(attr smd)
- (fp_text reference "Q6" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference Q6 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:118 pos:26036(0x65B4) type:2 net:281
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- (pad "1" smd rect (at -1.10000 -0.95000) (size 1.2000001 0.8000009)
- (layers F.Cu F.Mask F.Paste) (net 283 "POK_VCCO")
- )
-#1309 counter:119 pos:26240(0x6680) type:2 net:5
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- (pad "2" smd rect (at -1.10000 0.95000) (size 1.2000001 0.8000009)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1309 counter:120 pos:26444(0x674C) type:2 net:258
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- (pad "3" smd rect (at 1.10000 0.00000) (size 1.2000001 0.8000009)
- (layers F.Cu F.Mask F.Paste) (net 260 "NetLED18_2")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/04B9CA18-3B1B.wrl"
+ (pad 1 smd rect (at -1.1 -0.95) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask)
+ (net 282 POK_VCCO))
+ (pad 2 smd rect (at -1.1 0.95) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 3 smd rect (at 1.1 0) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask)
+ (net 259 NetLED18_2))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/04B9CA18-3B1B.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#264: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8952.6772mil|Y=5744.7244mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=16|SOURCEDESIGNATOR=R1|SOURCEUNIQUEID=\OKNNLCNX|SOURCEHIERARCHICALPATH=rev02_1|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 1%|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=MNPAGQNF|JUMPERSVISIBLE=TRUE
-#$pads{264}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 27.500001 -81.4)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R1" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R1 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:587 pos:121731(0x1DB83) type:2 net:282
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- (pad "2" smd rect (at -0.00000 -0.50000 90) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 284 "PWR_18V")
- )
-#1309 counter:588 pos:121935(0x1DC4F) type:2 net:262
-#010000000005000000047C267C300100000000AA000000010C000601FFFF0801FFFFFFFFF41156055A9269030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000
- (pad "1" smd rect (at -0.00000 0.50000 90) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 264 "NetR1_1")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 283 PWR_18V))
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 263 NetR1_1))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#265: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8952.6772mil|Y=5658.1102mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=17|SOURCEDESIGNATOR=R2|SOURCEUNIQUEID=\RTOJLANF|SOURCEHIERARCHICALPATH=rev02_1|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 1%|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=GDOQLYCP|JUMPERSVISIBLE=TRUE
-#$pads{265}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 27.500001 -79.199999)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R2" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R2 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:585 pos:121323(0x1D9EB) type:2 net:5
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- (pad "1" smd rect (at -0.00000 0.50000 90) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1309 counter:586 pos:121527(0x1DAB7) type:2 net:262
-#010000000005000000047C267C300100000000AA000000010C000601FFFF0901FFFFFFFFF4115605E15C62030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000
- (pad "2" smd rect (at -0.00000 -0.50000 90) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 264 "NetR1_1")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 263 NetR1_1))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#266: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8882mil|Y=5722.315mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=18|SOURCEDESIGNATOR=R3|SOURCEUNIQUEID=\CXDGKNHT|SOURCEHIERARCHICALPATH=rev02_1|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=KWTNCBXO|JUMPERSVISIBLE=TRUE
-#$pads{266}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 25.7048 -80.830801)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R3" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R3 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:583 pos:120915(0x1D853) type:2 net:263
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- (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 265 "NetR3_2")
- )
-#1309 counter:584 pos:121119(0x1D91F) type:2 net:262
-#010000000005000000047C267C300100000000AA000000010C000601FFFF0A01FFFFFFFF124A4E05EE2769030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000
- (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 264 "NetR1_1")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 264 NetR3_2))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 263 NetR1_1))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#267: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10409mil|Y=5805mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=9|SOURCEDESIGNATOR=R4|SOURCEUNIQUEID=\FNHEBABR|SOURCEHIERARCHICALPATH=rev02_15|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=DLLXULBO|JUMPERSVISIBLE=TRUE
-#$pads{267}
- (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 64.4906 -82.931)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R4" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R4 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:1999 pos:508903(0x7C3E7) type:2 net:131
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- (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 133 "FPGA_GCLK")
- )
-#1309 counter:2000 pos:509107(0x7C4B3) type:2 net:261
-#010000000005000000047C267C300100000000AA000000200C000501FFFF0B01FFFFFFFF90493406C3C678030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000
- (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 263 "NetQ5_3")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 132 FPGA_GCLK))
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 262 NetQ5_3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#268: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10694.8031mil|Y=6457.3228mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=19|SOURCEDESIGNATOR=R5|SOURCEUNIQUEID=\DTMFGWTA|SOURCEHIERARCHICALPATH=rev02_1|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=FGRQYCYX|JUMPERSVISIBLE=TRUE
-#$pads{268}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 71.749999 -99.499999)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R5" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R5 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 260 NetQ1_1))
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 131 FPGA_ENTROPY_DISABLE))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
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)
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)
-#Components#269: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10694.8031mil|Y=6408.1102mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=20|SOURCEDESIGNATOR=R6|SOURCEUNIQUEID=\FIFJPVFM|SOURCEHIERARCHICALPATH=rev02_1|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=MUCSLJKW|JUMPERSVISIBLE=TRUE
-#$pads{269}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 71.749999 -98.249999)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R6" (at 0 0) (layer F.SilkS) hide
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)
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 260 NetQ1_1))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
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)
-#Components#270: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10665.2756mil|Y=6063.622mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=21|SOURCEDESIGNATOR=R7|SOURCEUNIQUEID=\MGSMWTQM|SOURCEHIERARCHICALPATH=rev02_1|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=RQPWUPMP|JUMPERSVISIBLE=TRUE
-#$pads{270}
- (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 71 -89.499999)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R7" (at 0 0) (layer F.SilkS) hide
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)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988)
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 4 15V_LDO_ENABLE))
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 283 PWR_18V))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
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)
-
)
-#Components#271: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8877.0001mil|Y=5421mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=22|SOURCEDESIGNATOR=R8|SOURCEUNIQUEID=\SOCXQOQW|SOURCEHIERARCHICALPATH=rev02_1|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 1%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=DCPXKSIX|JUMPERSVISIBLE=TRUE
-#$pads{271}
- (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 25.577803 -73.1774)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R8" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R8 (at 0 0) (layer F.SilkS) hide
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)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988)
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- (layers B.Cu B.Mask B.Paste) (net 302 "VCC_5V0")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 265 NetR8_1))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 301 VCC_5V0))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#272: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8980mil|Y=5399mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=23|SOURCEDESIGNATOR=R9|SOURCEUNIQUEID=\LCXAWMSR|SOURCEHIERARCHICALPATH=rev02_1|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 1%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=UXSURNSG|JUMPERSVISIBLE=TRUE
-#$pads{272}
- (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 28.194 -72.6186)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R9" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R9 (at 0 0) (layer F.SilkS) hide
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(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- #1309 counter:1993 pos:507679(0x7BF1F) type:2 net:264
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-#1309 counter:1994 pos:507883(0x7BFEB) type:2 net:5
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-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 265 NetR8_1))
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#273: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11299mil|Y=6211mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=5|SOURCEDESIGNATOR=R10|SOURCEUNIQUEID=\PRNPSLKC|SOURCEHIERARCHICALPATH=rev02_2|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 1%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=CQWSIRQL|JUMPERSVISIBLE=TRUE
-#$pads{273}
- (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 87.0966 -93.2434)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R10" (at 0 0) (layer F.SilkS) hide
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)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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-#1309 counter:1992 pos:507475(0x7BE53) type:2 net:274
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- (layers B.Cu B.Mask B.Paste) (net 276 "NOISE_IN")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 287 RAW_NOISE))
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 275 NOISE_IN))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#274: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11452mil|Y=5872mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=6|SOURCEDESIGNATOR=R11|SOURCEUNIQUEID=\PXWBTCLP|SOURCEHIERARCHICALPATH=rev02_2|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 1%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=VVOQTWWQ|JUMPERSVISIBLE=TRUE
-#$pads{274}
- (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 90.9828 -84.6328)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R11" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R11 (at 0 0) (layer F.SilkS) hide
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)
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)
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-#1309 counter:1990 pos:507067(0x7BCBB) type:2 net:4
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- (layers B.Cu B.Mask B.Paste) (net 6 "15V_STABLE")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 287 RAW_NOISE))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 5 15V_STABLE))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
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)
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)
-#Components#275: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11203mil|Y=5930mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=7|SOURCEDESIGNATOR=R12|SOURCEUNIQUEID=\IRLNVDEM|SOURCEHIERARCHICALPATH=rev02_2|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 1%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=MEUEJNBV|JUMPERSVISIBLE=TRUE
-#$pads{275}
- (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 84.6582 -86.106)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R12" (at 0 0) (layer F.SilkS) hide
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)
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 7 NetC15_2))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 8 AMPLIFIED))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#276: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11047mil|Y=5764mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=8|SOURCEDESIGNATOR=R13|SOURCEUNIQUEID=\PIIMXANL|SOURCEHIERARCHICALPATH=rev02_2|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 1%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=BCJRCCDE|JUMPERSVISIBLE=TRUE
-#$pads{276}
- (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 80.6958 -81.8896)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R13" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R13 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
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- (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988)
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- (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 9 "AMPLIFIED")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 8 AMPLIFIED))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#277: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9127mil|Y=3905mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=10|SOURCEDESIGNATOR=R14|SOURCEUNIQUEID=\AXVMENUF|SOURCEHIERARCHICALPATH=rev02_3|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=ISJTUUOB|JUMPERSVISIBLE=TRUE
-#$pads{277}
- (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 31.9278 -34.671)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R14" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R14 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
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(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988)
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 278 OSC_IN))
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 227 NetC17_2))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#278: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9483mil|Y=3329mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=11|SOURCEDESIGNATOR=R15|SOURCEUNIQUEID=\QHRQYGCP|SOURCEHIERARCHICALPATH=rev02_3|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=JGGAGRDG|JUMPERSVISIBLE=TRUE
-#$pads{278}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 40.9702 -20.0406)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R15" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R15 (at 0 0) (layer F.SilkS) hide
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)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 39 BOOT0))
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#279: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9641.6535mil|Y=2835.2755mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=12|SOURCEDESIGNATOR=R16|SOURCEUNIQUEID=\TVDBRPPW|SOURCEHIERARCHICALPATH=rev02_3|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=JBJBDMVT|JUMPERSVISIBLE=TRUE
-#$pads{279}
- (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 44.999999 -7.49999799999999)
+
+ (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (at 44.999999 -7.499998)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R16" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R16 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (pad "1" smd rect (at -0.00000 0.50000 90) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 249 "NetLED4_1")
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- (pad "2" smd rect (at -0.00000 -0.50000 90) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 16 "ARM_LED3")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 248 NetLED4_1))
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 15 ARM_LED3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#280: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8950.3229mil|Y=4523.9763mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=2|SOURCEDESIGNATOR=R17|SOURCEUNIQUEID=\UHUVSCDK|SOURCEHIERARCHICALPATH=rev02_7|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=LBNAKQHE|JUMPERSVISIBLE=TRUE
-#$pads{280}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 27.440202 -50.392998)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R17" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R17 (at 0 0) (layer F.SilkS) hide
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)
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 243 NetIC1_3))
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#281: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8949.7244mil|Y=4622.6772mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=3|SOURCEDESIGNATOR=R18|SOURCEUNIQUEID=\SQGBPEUV|SOURCEHIERARCHICALPATH=rev02_7|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=UJKEOVKI|JUMPERSVISIBLE=TRUE
-#$pads{281}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 27.425 -52.900001)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R18" (at 0 0) (layer F.SilkS) hide
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)
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 206 KSM_PROM_CS_N))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#282: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9102.622mil|Y=4178.937mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=2|SOURCEDESIGNATOR=R19|SOURCEUNIQUEID=\OXLAMTKS|SOURCEHIERARCHICALPATH=rev02_8|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=JHFXXJBJ|JUMPERSVISIBLE=TRUE
-#$pads{282}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 31.308599 -41.629)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R19" (at 0 0) (layer F.SilkS) hide
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 290 RTC_SDA))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#283: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9078mil|Y=4225mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=3|SOURCEDESIGNATOR=R20|SOURCEUNIQUEID=\VJEBVRHS|SOURCEHIERARCHICALPATH=rev02_8|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=FOIHDNYB|JUMPERSVISIBLE=TRUE
-#$pads{283}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 30.6832 -42.799)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R20" (at 0 0) (layer F.SilkS) hide
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-#1365
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+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 289 RTC_SCL))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#284: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9078mil|Y=4276mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=4|SOURCEDESIGNATOR=R21|SOURCEUNIQUEID=\YNNFUAQH|SOURCEHIERARCHICALPATH=rev02_8|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=JYDJJPGF|JUMPERSVISIBLE=TRUE
-#$pads{284}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 30.6832 -44.0944)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R21" (at 0 0) (layer F.SilkS) hide
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-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 288 RTC_MFP))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#285: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8669.0394mil|Y=2900.37mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=23|SOURCEDESIGNATOR=R22|SOURCEUNIQUEID=\NAVRWTVD|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 1%|UNIQUEID=HHOKHUTX|JUMPERSVISIBLE=TRUE
-#$pads{285}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 20.295601 -9.153398)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R22" (at 0 0) (layer F.SilkS) hide
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-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 190 FT_REF))
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
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-
)
-#Components#286: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8170.0394mil|Y=2830.37mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=24|SOURCEDESIGNATOR=R23|SOURCEUNIQUEID=\UQHITTRJ|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=UIIADULL|JUMPERSVISIBLE=TRUE
-#$pads{286}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 7.62100100000001 -7.37539799999999)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (at 7.621001 -7.375398)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R23" (at 0 0) (layer F.SilkS) hide
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-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 198 FT_VCC3V3))
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 192 FT_RESET))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
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)
-
)
-#Components#287: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11355.2362mil|Y=2910.0787mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=23|SOURCEDESIGNATOR=R26|SOURCEUNIQUEID=\SEHSRGHN|SOURCEHIERARCHICALPATH=rev02_10|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 1%|UNIQUEID=WLDGRWQJ|JUMPERSVISIBLE=TRUE
-#$pads{287}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 88.524999 -9.39999899999999)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (at 88.524999 -9.399999)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R26" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R26 (at 0 0) (layer F.SilkS) hide
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-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 189 FT_REF1))
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#288: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11184mil|Y=3478.7401mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=24|SOURCEDESIGNATOR=R27|SOURCEUNIQUEID=\IAPLFHPG|SOURCEHIERARCHICALPATH=rev02_10|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=JOMPPNXI|JUMPERSVISIBLE=TRUE
-#$pads{288}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 84.1756 -23.843999)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R27" (at 0 0) (layer F.SilkS) hide
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-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 185 FT_MGMT_VCC3V3))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 191 FT_RESET1))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#289: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9708.5827mil|Y=4021.2992mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=11|SOURCEDESIGNATOR=R30|SOURCEUNIQUEID=\NTCQNNVF|SOURCEHIERARCHICALPATH=rev02_11|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=WHXPLIJG|JUMPERSVISIBLE=TRUE
-#$pads{289}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 46.700001 -37.625)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R30" (at 0 0) (layer F.SilkS) hide
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- (layers F.Cu F.Mask F.Paste) (net 4 "3V3_BATT")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 38 AVR_RESET))
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 3 3V3_BATT))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#290: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8972.3622mil|Y=2835.2755mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=12|SOURCEDESIGNATOR=R31|SOURCEUNIQUEID=\OURRHNRW|SOURCEHIERARCHICALPATH=rev02_11|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=OXURQQCI|JUMPERSVISIBLE=TRUE
-#$pads{290}
- (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 28 -7.49999799999999)
+
+ (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (at 28 -7.499998)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R31" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R31 (at 0 0) (layer F.SilkS) hide
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+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 35 AVR_LED3))
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 252 NetLED12_1))
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-#$pads{291}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 36.2204 -22.8854)
(path /539EEC0F)
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+ (net 3 3V3_BATT))
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(scale (xyz 1 1 1))
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-#$pads{292}
- (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 79.1464 -25.841198)
(path /539EEC0F)
(attr smd)
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+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
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+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 3 3V3_BATT))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
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(scale (xyz 1 1 1))
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-#$pads{293}
- (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 76.675 -33.2)
(path /539EEC0F)
(attr smd)
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-#1365
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+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 216 MKM_CS_N))
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 3 3V3_BATT))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
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(scale (xyz 1 1 1))
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-#$pads{294}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 78.999999 -7.37499899999999)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (at 78.999999 -7.374999)
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+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 253 NetLED13_1))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
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-#$pads{295}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 39.249998 -71.575)
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+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 130 FPGA_DONE))
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 129 FPGA_DONE_INT))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
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-#$pads{296}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 84.209001 -71.7296)
(path /539EEC0F)
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-#1365
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+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 154 FPGA_INIT_B_INT))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
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-#$pads{297}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 35.200001 -67.649999)
(path /539EEC0F)
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- (pad "2" smd rect (at -0.50000 -0.00000 180) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 168 FPGA_PROGRAM_B))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#298: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11528mil|Y=5379mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=10|SOURCEDESIGNATOR=R42|SOURCEUNIQUEID=\USCJBBGP|SOURCEHIERARCHICALPATH=rev02_13|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=BXTXQRPX|JUMPERSVISIBLE=TRUE
-#$pads{298}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 92.9132 -72.1106)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R42" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R42 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
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- (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 155 FPGA_INIT_B))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#299: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11584mil|Y=5233mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=11|SOURCEDESIGNATOR=R43|SOURCEUNIQUEID=\JNTNAIRU|SOURCEHIERARCHICALPATH=rev02_13|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=CJOCTSFI|JUMPERSVISIBLE=TRUE
-#$pads{299}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 94.3356 -68.4022)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R43" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R43 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
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- (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988)
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- (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 161 FPGA_JTAG_TDI))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#300: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11583mil|Y=5133mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=12|SOURCEDESIGNATOR=R44|SOURCEUNIQUEID=\PYDNWLMV|SOURCEHIERARCHICALPATH=rev02_13|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=WTVKNAOV|JUMPERSVISIBLE=TRUE
-#$pads{300}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 94.3102 -65.8622)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R44" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R44 (at 0 0) (layer F.SilkS) hide
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)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
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- (layers F.Cu F.Mask F.Paste) (net 164 "FPGA_JTAG_TMS")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 163 FPGA_JTAG_TMS))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#301: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11583mil|Y=5034mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=13|SOURCEDESIGNATOR=R45|SOURCEUNIQUEID=\BOXFRSJH|SOURCEHIERARCHICALPATH=rev02_13|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=AFYWQSTP|JUMPERSVISIBLE=TRUE
-#$pads{301}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 94.3102 -63.3476)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R45" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R45 (at 0 0) (layer F.SilkS) hide
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)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 160 FPGA_JTAG_TCK))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#302: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8377.874mil|Y=3832.3228mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=10|SOURCEDESIGNATOR=R46|SOURCEUNIQUEID=\WEHUBXOQ|SOURCEHIERARCHICALPATH=rev02_15|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=PHVNOSMT|JUMPERSVISIBLE=TRUE
-#$pads{302}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 12.9 -32.824999)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R46" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R46 (at 0 0) (layer F.SilkS) hide
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)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 291 SPI_A_TRISTATE))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#303: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8376.8898mil|Y=3664.0157mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=11|SOURCEDESIGNATOR=R47|SOURCEUNIQUEID=\JINPGWNB|SOURCEHIERARCHICALPATH=rev02_15|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=UVDSHSEH|JUMPERSVISIBLE=TRUE
-#$pads{303}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 12.875001 -28.549999)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R47" (at 0 0) (layer F.SilkS) hide
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)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 292 SPI_B_TRISTATE))
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#304: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10570mil|Y=6022mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=13|SOURCEDESIGNATOR=R49|SOURCEUNIQUEID=\BYOFBHNF|SOURCEHIERARCHICALPATH=rev02_15|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=JJBETSHN|JUMPERSVISIBLE=TRUE
-#$pads{304}
- (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 68.58 -88.4428)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R49" (at 0 0) (layer F.SilkS) hide
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)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 261 NetQ5_1))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#305: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8381.811mil|Y=3492.7559mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=14|SOURCEDESIGNATOR=R50|SOURCEUNIQUEID=\AJEHVBJN|SOURCEHIERARCHICALPATH=rev02_15|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=IYCHTOBY|JUMPERSVISIBLE=TRUE
-#$pads{305}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 12.999999 -24.2)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R50" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R50 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988)
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- )
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- (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 174 "FPGA_PROM_W_N")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 173 FPGA_PROM_W_N))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#306: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9544.2126mil|Y=3700.4331mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=15|SOURCEDESIGNATOR=R51|SOURCEUNIQUEID=\NTLQXJAC|SOURCEHIERARCHICALPATH=rev02_15|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=AWJPOFWU|JUMPERSVISIBLE=TRUE
-#$pads{306}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 42.525 -29.475001)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R51" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R51 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
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- (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988)
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- (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 170 "FPGA_PROM_CS_N")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 169 FPGA_PROM_CS_N))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#307: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9257mil|Y=5367mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=10|SOURCEDESIGNATOR=R52|SOURCEUNIQUEID=\YOTJPEPB|SOURCEHIERARCHICALPATH=rev02_18|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=PWBRFWST|JUMPERSVISIBLE=TRUE
-#$pads{307}
- (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 35.2298 -71.8058)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R52" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R52 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:1971 pos:503191(0x7AD97) type:2 net:267
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- (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 269 "NetR52_1")
- )
-#1309 counter:1972 pos:503395(0x7AE63) type:2 net:300
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- (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 302 "VCC_5V0")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 268 NetR52_1))
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 301 VCC_5V0))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#308: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9083mil|Y=5526mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=11|SOURCEDESIGNATOR=R53|SOURCEUNIQUEID=\OCXGGBCL|SOURCEHIERARCHICALPATH=rev02_18|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=GRMXDAFJ|JUMPERSVISIBLE=TRUE
-#$pads{308}
- (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 30.8102 -75.8444)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R53" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R53 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:1969 pos:502783(0x7ABFF) type:2 net:268
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- (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 270 "NetR53_2")
- )
-#1309 counter:1970 pos:502987(0x7ACCB) type:2 net:5
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- (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 269 NetR53_2))
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#309: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8306.685mil|Y=4340mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=12|SOURCEDESIGNATOR=R54|SOURCEUNIQUEID=\MVGRPMYK|SOURCEHIERARCHICALPATH=rev02_18|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=DFDJAYYS|JUMPERSVISIBLE=TRUE
-#$pads{309}
- (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 11.091799 -45.72)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R54" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R54 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:1967 pos:502375(0x7AA67) type:2 net:269
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- (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 271 "NetR54_1")
- )
-#1309 counter:1968 pos:502579(0x7AB33) type:2 net:300
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- (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 302 "VCC_5V0")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 270 NetR54_1))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 301 VCC_5V0))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#310: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8481mil|Y=4183mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=13|SOURCEDESIGNATOR=R55|SOURCEUNIQUEID=\UGMYGRXU|SOURCEHIERARCHICALPATH=rev02_18|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=RKEYYREX|JUMPERSVISIBLE=TRUE
-#$pads{310}
- (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 15.5194 -41.7322)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R55" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R55 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 272 "NetR55_2")
- )
-#1309 counter:1966 pos:502171(0x7A99B) type:2 net:5
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- (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 271 NetR55_2))
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#311: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9083mil|Y=5705mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=14|SOURCEDESIGNATOR=R56|SOURCEUNIQUEID=\WBGSTQKL|SOURCEHIERARCHICALPATH=rev02_18|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 1%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=GDRGNGUL|JUMPERSVISIBLE=TRUE
-#$pads{311}
- (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 30.8102 -80.391)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R56" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R56 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
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- (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 238 "NetC117_2")
- )
-#1309 counter:1964 pos:501763(0x7A803) type:2 net:235
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- (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 237 "NetC117_1")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 237 NetC117_2))
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 236 NetC117_1))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#312: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9112mil|Y=5615mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=15|SOURCEDESIGNATOR=R57|SOURCEUNIQUEID=\DCQOQWVV|SOURCEHIERARCHICALPATH=rev02_18|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 1%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=VUNCEFPE|JUMPERSVISIBLE=TRUE
-#$pads{312}
- (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 31.5468 -78.105)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R57" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R57 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
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- (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988)
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- )
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- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 237 NetC117_2))
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#313: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8475mil|Y=4010mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=16|SOURCEDESIGNATOR=R58|SOURCEUNIQUEID=\VNJYFHSD|SOURCEHIERARCHICALPATH=rev02_18|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 1%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=FSIBEQJH|JUMPERSVISIBLE=TRUE
-#$pads{313}
- (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 15.367 -37.338)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R58" (at 0 0) (layer F.SilkS) hide
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)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988)
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- (layers B.Cu B.Mask B.Paste) (net 239 "NetC118_1")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 239 NetC118_2))
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 238 NetC118_1))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#314: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8450mil|Y=4097mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=17|SOURCEDESIGNATOR=R59|SOURCEUNIQUEID=\RPFTUREA|SOURCEHIERARCHICALPATH=rev02_18|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 1%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=UFPUKHUF|JUMPERSVISIBLE=TRUE
-#$pads{314}
- (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 14.732 -39.5478)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R59" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R59 (at 0 0) (layer F.SilkS) hide
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)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988)
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- (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 239 NetC118_2))
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#315: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9310.9449mil|Y=5747.6772mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=18|SOURCEDESIGNATOR=R60|SOURCEUNIQUEID=\FRAVEMPY|SOURCEHIERARCHICALPATH=rev02_18|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=SVBXIYGX|JUMPERSVISIBLE=TRUE
-#$pads{315}
- (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 36.6 -81.475001)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R60" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R60 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
-#1309 counter:1956 pos:500131(0x7A1A3) type:2 net:235
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- (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 237 "NetC117_1")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 236 NetC117_1))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#316: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8245mil|Y=3952mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=19|SOURCEDESIGNATOR=R61|SOURCEUNIQUEID=\JRGYMDHF|SOURCEHIERARCHICALPATH=rev02_18|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=EFOFTKNJ|JUMPERSVISIBLE=TRUE
-#$pads{316}
- (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 9.52500000000001 -35.8648)
+
+ (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (at 9.525 -35.8648)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R61" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R61 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988)
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 238 NetC118_1))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#317: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11185.315mil|Y=5419mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=14|SOURCEDESIGNATOR=R62|SOURCEUNIQUEID=\WHHCXYRO|SOURCEHIERARCHICALPATH=rev02_13|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0603|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=BLRXDOTU|JUMPERSVISIBLE=TRUE
-#$pads{317}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 84.209001 -73.1266)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R62" (at 0 0) (layer F.SilkS) hide
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)
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 154 FPGA_INIT_B_INT))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 153 FPGA_INIT_B_INT1))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#318: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9335.5512mil|Y=5203.3858mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=15|SOURCEDESIGNATOR=R63|SOURCEUNIQUEID=\CBSLHEIR|SOURCEHIERARCHICALPATH=rev02_13|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0603|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=VXYSITMO|JUMPERSVISIBLE=TRUE
-#$pads{318}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 37.225 -67.649999)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R63" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R63 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 167 FPGA_PROGRAM_B1))
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 168 FPGA_PROGRAM_B))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#319: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11058.9764mil|Y=2815.5906mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=6|SOURCEDESIGNATOR=R64|SOURCEUNIQUEID=\GGDHHOSC|SOURCEHIERARCHICALPATH=rev02_19|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=LJFQFSLY|JUMPERSVISIBLE=TRUE
-#$pads{319}
- (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 81.000001 -7.000001)
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+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 150 FPGA_GPIO_LED_1))
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-#$pads{320}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 44.699999 -61.349999)
(path /539EEC0F)
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+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
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-#$pads{321}
- (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 22.0726 -62.8904)
(path /539EEC0F)
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+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 273 NetR66_1))
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 301 VCC_5V0))
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-#$pads{322}
- (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 29.3116 -62.8904)
(path /539EEC0F)
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+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 241 NetC208_1))
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 274 NetR67_1))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
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)
-#Components#323: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8930mil|Y=5082mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=9|SOURCEDESIGNATOR=R68|SOURCEUNIQUEID=\EGQMXVBQ|SOURCEHIERARCHICALPATH=rev02_24|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 1%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=ALUMTHGN|JUMPERSVISIBLE=TRUE
-#$pads{323}
- (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 26.924 -64.5668)
(path /539EEC0F)
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+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 242 NetC208_2))
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 241 NetC208_1))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
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(scale (xyz 1 1 1))
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)
-#Components#324: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8834mil|Y=5082mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=10|SOURCEDESIGNATOR=R69|SOURCEUNIQUEID=\XRUUPPTT|SOURCEHIERARCHICALPATH=rev02_24|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 1%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=NPWAUOBG|JUMPERSVISIBLE=TRUE
-#$pads{324}
- (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 24.4856 -64.5668)
(path /539EEC0F)
(attr smd)
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-#1365
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+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 242 NetC208_2))
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
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-#$pads{325}
- (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 30.3022 -64.5668)
(path /539EEC0F)
(attr smd)
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-#1365
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+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 241 NetC208_1))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
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(scale (xyz 1 1 1))
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-#$pads{326}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 37.275 -69.025)
(path /539EEC0F)
(attr smd)
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- (pad "1" smd rect (at -0.50000 -0.00000) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 129 "FPGA_CFG_SCLK")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 127 FPGA_CFG_SCLK1))
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 128 FPGA_CFG_SCLK))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#327: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8570mil|Y=5024.0001mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=8|SOURCEDESIGNATOR=R72|SOURCEUNIQUEID=\CWDEVVHF|SOURCEHIERARCHICALPATH=rev02_25|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 1%|UNIQUEID=HCESQLWH|JUMPERSVISIBLE=TRUE
-#$pads{327}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 17.78 -63.093603)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R72" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R72 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
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- (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988)
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- (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 286 "PWR_ENA_VCCINT")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 301 VCC_5V0))
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 285 PWR_ENA_VCCINT))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#328: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8303mil|Y=4515mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=9|SOURCEDESIGNATOR=R73|SOURCEUNIQUEID=\FUMQCXAW|SOURCEHIERARCHICALPATH=rev02_25|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=JRPHRSCD|JUMPERSVISIBLE=TRUE
-#$pads{328}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 10.9982 -50.165)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R73" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R73 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
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- (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988)
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- (layers F.Cu F.Mask F.Paste) (net 281 "POK_VCCAUX")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 301 VCC_5V0))
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 280 POK_VCCAUX))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#329: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8322.7559mil|Y=4299.8425mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=10|SOURCEDESIGNATOR=R74|SOURCEUNIQUEID=\IQWADQTB|SOURCEHIERARCHICALPATH=rev02_25|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 1%|UNIQUEID=UNGCFJVU|JUMPERSVISIBLE=TRUE
-#$pads{329}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 11.5 -44.699999)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R74" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R74 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
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- (pad "1" smd rect (at -0.50000 -0.00000) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 281 "POK_VCCAUX")
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- (pad "2" smd rect (at 0.50000 -0.00000) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 287 "PWR_ENA_VCCO")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 280 POK_VCCAUX))
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 286 PWR_ENA_VCCO))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#330: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9225mil|Y=5310mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=11|SOURCEDESIGNATOR=R75|SOURCEUNIQUEID=\BSEBXVBC|SOURCEHIERARCHICALPATH=rev02_25|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=GBIHSBUL|JUMPERSVISIBLE=TRUE
-#$pads{330}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 34.417 -70.358)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R75" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R75 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
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- (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 302 "VCC_5V0")
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- (layers F.Cu F.Mask F.Paste) (net 282 "POK_VCCINT")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 301 VCC_5V0))
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 281 POK_VCCINT))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#331: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9148.5433mil|Y=5517.3622mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=12|SOURCEDESIGNATOR=R76|SOURCEUNIQUEID=\KKYTTUBF|SOURCEHIERARCHICALPATH=rev02_25|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 1%|UNIQUEID=LSJXNDYB|JUMPERSVISIBLE=TRUE
-#$pads{331}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 32.475 -75.625)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R76" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R76 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
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- (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 282 "POK_VCCINT")
- )
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- (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 285 "PWR_ENA_VCCAUX")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 281 POK_VCCINT))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 284 PWR_ENA_VCCAUX))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#332: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8380.6772mil|Y=4199.7087mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=13|SOURCEDESIGNATOR=R77|SOURCEUNIQUEID=\WTTIQWXB|SOURCEHIERARCHICALPATH=rev02_25|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=LCIUXKJV|JUMPERSVISIBLE=TRUE
-#$pads{332}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 12.971201 -42.156601)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R77" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R77 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
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- )
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- (layers F.Cu F.Mask F.Paste) (net 283 "POK_VCCO")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 301 VCC_5V0))
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 282 POK_VCCO))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#333: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11153.4646mil|Y=2728.9764mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=14|SOURCEDESIGNATOR=R78|SOURCEUNIQUEID=\WQKKKFSW|SOURCEHIERARCHICALPATH=rev02_25|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=RKXEYKCR|JUMPERSVISIBLE=TRUE
-#$pads{333}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 83.400001 -4.80000099999999)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (at 83.400001 -4.800001)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R78" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R78 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (layers F.Cu F.Mask F.Paste) (net 259 "NetLED18_1")
- )
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- (layers F.Cu F.Mask F.Paste) (net 302 "VCC_5V0")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 258 NetLED18_1))
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 301 VCC_5V0))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#334: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10875mil|Y=3557.37mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=7|SOURCEDESIGNATOR=R80|SOURCEUNIQUEID=\ERRQQWNE|SOURCEHIERARCHICALPATH=rev02_12|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=VYXTBHNL|JUMPERSVISIBLE=TRUE
-#$pads{334}
- (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 76.327 -25.841198)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R80" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R80 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
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- (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 4 "3V3_BATT")
- )
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- (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 215 "MKM_CONTROL_AVR_ENA")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 3 3V3_BATT))
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 214 MKM_CONTROL_AVR_ENA))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#335: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10593.4252mil|Y=3923.8583mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=8|SOURCEDESIGNATOR=R81|SOURCEUNIQUEID=\FRKKSKYA|SOURCEHIERARCHICALPATH=rev02_12|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=MKBPAQIE|JUMPERSVISIBLE=TRUE
-#$pads{335}
- (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 69.175 -35.150001)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R81" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R81 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 216 "MKM_CONTROL_FPGA_DIS")
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- (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 215 MKM_CONTROL_FPGA_DIS))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#336: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10634mil|Y=3966.37mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=13|SOURCEDESIGNATOR=R82|SOURCEUNIQUEID=\FIRAUOXY|SOURCEHIERARCHICALPATH=rev02_11|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=RHHFAERO|JUMPERSVISIBLE=TRUE
-#$pads{336}
- (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 70.2056 -36.229798)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R82" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R82 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988)
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- (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 38 "AVR_PANIC")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 3 3V3_BATT))
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 37 AVR_PANIC))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#337: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9332.5984mil|Y=5138.4252mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=1|SOURCEDESIGNATOR=R83|SOURCEUNIQUEID=\KFGLIMFW|SOURCEHIERARCHICALPATH=rev02_20|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0603|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=DNRHMEEQ|JUMPERSVISIBLE=TRUE
-#$pads{337}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 37.149999 -66)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R83" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R83 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (pad "1" smd rect (at -0.50000 -0.00000) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 127 "FPGA_CFG_MOSI")
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- (layers F.Cu F.Mask F.Paste) (net 126 "FPGA_CFG_MOSI1")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 126 FPGA_CFG_MOSI))
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 125 FPGA_CFG_MOSI1))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#338: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9332.5984mil|Y=5081.7586mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=2|SOURCEDESIGNATOR=R84|SOURCEUNIQUEID=\CYSJVWIS|SOURCEHIERARCHICALPATH=rev02_20|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0603|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=GWDEWYAF|JUMPERSVISIBLE=TRUE
-#$pads{338}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 37.149999 -64.560668)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R84" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R84 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (pad "2" smd rect (at 0.50000 -0.00000) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 124 "FPGA_CFG_MISO1")
- )
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- (layers F.Cu F.Mask F.Paste) (net 125 "FPGA_CFG_MISO")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 123 FPGA_CFG_MISO1))
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 124 FPGA_CFG_MISO))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#339: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9332.5984mil|Y=5022.2835mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=3|SOURCEDESIGNATOR=R85|SOURCEUNIQUEID=\TONFTCKK|SOURCEHIERARCHICALPATH=rev02_20|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0603|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=DCAKXCHI|JUMPERSVISIBLE=TRUE
-#$pads{339}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 37.149999 -63.050001)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R85" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R85 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 121 "FPGA_CFG_CS_N")
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- (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 120 "FPGA_CFG_CS_N1")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 120 FPGA_CFG_CS_N))
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 119 FPGA_CFG_CS_N1))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#340: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8529.5394mil|Y=3179.3701mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=27|SOURCEDESIGNATOR=R86|SOURCEUNIQUEID=\LGNIISVQ|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=UCDXFBNH|JUMPERSVISIBLE=TRUE
-#$pads{340}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 16.752301 -16.240001)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R86" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R86 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (pad "2" smd rect (at -0.00000 0.50000 270) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 197 "FT_TXD1")
- )
-#1309 counter:502 pos:104391(0x197C7) type:2 net:196
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- (pad "1" smd rect (at -0.00000 -0.50000 270) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 198 "FT_TXD")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 196 FT_TXD1))
+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 197 FT_TXD))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#341: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8480.0394mil|Y=3179.3701mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=28|SOURCEDESIGNATOR=R87|SOURCEUNIQUEID=\ULGBWCWU|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=KYKBTAXW|JUMPERSVISIBLE=TRUE
-#$pads{341}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 15.495001 -16.240001)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R87" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R87 (at 0 0) (layer F.SilkS) hide
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)
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-#1365
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+ (pad 1 smd rect (at 0 -0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 195 FT_RXD))
+ (pad 2 smd rect (at 0 0.5 270) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 194 FT_RXD1))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
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)
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)
-#Components#342: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11516.0001mil|Y=3135.7401mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=27|SOURCEDESIGNATOR=R88|SOURCEUNIQUEID=\EUPIIQMN|SOURCEHIERARCHICALPATH=rev02_10|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=OVWFUIDV|JUMPERSVISIBLE=TRUE
-#$pads{342}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 92.608403 -15.131799)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R88" (at 0 0) (layer F.SilkS) hide
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-#1365
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+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 183 FT_MGMT_TXD1))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 184 FT_MGMT_TXD))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
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)
-#Components#343: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11516.0001mil|Y=3193.7401mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=28|SOURCEDESIGNATOR=R89|SOURCEUNIQUEID=\GPFFAIEB|SOURCEHIERARCHICALPATH=rev02_10|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=QJQTFYLW|JUMPERSVISIBLE=TRUE
-#$pads{343}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 92.608403 -16.604999)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R89" (at 0 0) (layer F.SilkS) hide
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-#1365
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+ (pad 1 smd rect (at 0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 182 FT_MGMT_RXD))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 181 FT_MGMT_RXD1))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
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)
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)
-#Components#344: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11516mil|Y=3076.7401mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=29|SOURCEDESIGNATOR=R90|SOURCEUNIQUEID=\ILKIVIXK|SOURCEHIERARCHICALPATH=rev02_10|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=LCAJOKUS|JUMPERSVISIBLE=TRUE
-#$pads{344}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 92.6084 -13.633199)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R90" (at 0 0) (layer F.SilkS) hide
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-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 2 smd rect (at 0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 184 FT_MGMT_TXD))
+ (pad 1 smd rect (at -0.5 0) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
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)
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)
-#Components#345: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8579.0394mil|Y=3179.37mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=29|SOURCEDESIGNATOR=R91|SOURCEUNIQUEID=\LYQVLVGE|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=HUKGWUJO|JUMPERSVISIBLE=TRUE
-#$pads{345}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 18.009601 -16.239998)
(path /539EEC0F)
(attr smd)
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-#1365
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+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 197 FT_TXD))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
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)
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)
-#Components#346: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9720.3936mil|Y=2835.2755mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=13|SOURCEDESIGNATOR=R92|SOURCEUNIQUEID=\GVDYEFOE|SOURCEHIERARCHICALPATH=rev02_3|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=YNSGLOCY|JUMPERSVISIBLE=TRUE
-#$pads{346}
- (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 46.999997 -7.49999799999999)
+
+ (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (at 46.999997 -7.499998)
(path /539EEC0F)
(attr smd)
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-#1365
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+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 14 ARM_LED2))
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 245 NetLED1_1))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
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)
-#Components#347: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9484.1731mil|Y=2835.2755mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=14|SOURCEDESIGNATOR=R93|SOURCEUNIQUEID=\DCWEBXUA|SOURCEHIERARCHICALPATH=rev02_3|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=EILVVBWB|JUMPERSVISIBLE=TRUE
-#$pads{347}
- (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 40.999997 -7.49999799999999)
+
+ (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (at 40.999997 -7.499998)
(path /539EEC0F)
(attr smd)
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-#1365
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+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 247 NetLED3_1))
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 13 ARM_LED1))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
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)
-#Components#348: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9562.9133mil|Y=2835.2755mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=15|SOURCEDESIGNATOR=R94|SOURCEUNIQUEID=\DXOGUFNY|SOURCEHIERARCHICALPATH=rev02_3|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=DXYQCVFP|JUMPERSVISIBLE=TRUE
-#$pads{348}
- (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 42.999998 -7.49999799999999)
+
+ (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (at 42.999998 -7.499998)
(path /539EEC0F)
(attr smd)
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- (pad "1" smd rect (at -0.00000 0.50000 90) (size 0.4499991 0.5999988)
- (layers B.Cu B.Mask B.Paste) (net 247 "NetLED2_1")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 16 ARM_LED4))
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 246 NetLED2_1))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#349: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9051.1024mil|Y=2835.2755mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=14|SOURCEDESIGNATOR=R95|SOURCEUNIQUEID=\RSFRAQVH|SOURCEHIERARCHICALPATH=rev02_11|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=MIYDIYEG|JUMPERSVISIBLE=TRUE
-#$pads{349}
- (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 30.000001 -7.49999799999999)
+
+ (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (at 30.000001 -7.499998)
(path /539EEC0F)
(attr smd)
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- (layers B.Cu B.Mask B.Paste) (net 35 "AVR_LED2")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 249 NetLED9_1))
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 34 AVR_LED2))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#350: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8814.8819mil|Y=2835.2755mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=15|SOURCEDESIGNATOR=R96|SOURCEUNIQUEID=\OKQTOVVE|SOURCEHIERARCHICALPATH=rev02_11|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=AXUUPANC|JUMPERSVISIBLE=TRUE
-#$pads{350}
- (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 24 -7.49999799999999)
+
+ (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (at 24 -7.499998)
(path /539EEC0F)
(attr smd)
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 33 AVR_LED1))
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 251 NetLED11_1))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#351: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8893.6221mil|Y=2835.2755mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=16|SOURCEDESIGNATOR=R97|SOURCEUNIQUEID=\PWTBQUHW|SOURCEHIERARCHICALPATH=rev02_11|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=MVANMSPH|JUMPERSVISIBLE=TRUE
-#$pads{351}
- (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 26.000001 -7.49999799999999)
+
+ (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (at 26.000001 -7.499998)
(path /539EEC0F)
(attr smd)
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)
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- (layers B.Cu B.Mask B.Paste) (net 37 "AVR_LED4")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 250 NetLED10_1))
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 36 AVR_LED4))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
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)
-#Components#352: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10980.2362mil|Y=2815.5906mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=7|SOURCEDESIGNATOR=R98|SOURCEUNIQUEID=\UPQTUJVL|SOURCEHIERARCHICALPATH=rev02_19|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=TLTDRVSS|JUMPERSVISIBLE=TRUE
-#$pads{352}
- (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 78.999999 -7.000001)
(path /539EEC0F)
(attr smd)
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)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- (layers B.Cu B.Mask B.Paste) (net 257 "NetLED16_1")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 151 FPGA_GPIO_LED_2))
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 256 NetLED16_1))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
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)
-#Components#353: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10901.4961mil|Y=2815.5906mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=8|SOURCEDESIGNATOR=R99|SOURCEUNIQUEID=\BYOEOKRC|SOURCEHIERARCHICALPATH=rev02_19|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=LNPRFJDA|JUMPERSVISIBLE=TRUE
-#$pads{353}
- (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 77.000001 -7.000001)
(path /539EEC0F)
(attr smd)
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)
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 254 NetLED14_1))
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 152 FPGA_GPIO_LED_3))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
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)
-#Components#354: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10822.7559mil|Y=2815.5906mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=9|SOURCEDESIGNATOR=R100|SOURCEUNIQUEID=\BDKMEVMJ|SOURCEHIERARCHICALPATH=rev02_19|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=JKAPAYIP|JUMPERSVISIBLE=TRUE
-#$pads{354}
- (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 75 -7.000001)
(path /539EEC0F)
(attr smd)
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)
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 149 FPGA_GPIO_LED_0))
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 257 NetLED17_1))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
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)
-#Components#355: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11170mil|Y=5994.5433mil|PATTERN=WE-SHC_36103205_NO_CREAM|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=9|SOURCEDESIGNATOR=S1|SOURCEUNIQUEID=\UYGDFWMR|SOURCEHIERARCHICALPATH=rev02_2|SOURCEFOOTPRINTLIBRARY=rev02.PcbLib|SOURCECOMPONENTLIBRARY=rev02_1.SCHLIB|SOURCELIBREFERENCE=WE-SHC|SOURCEDESCRIPTION=WE-SHC Shielding cabinet|FOOTPRINTDESCRIPTION=WE-SHC_36103205_NO_CREAM|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=HQEJCXNP|JUMPERSVISIBLE=TRUE
-#$pads{355}
- (module "WE-SHC_36103205_NO_CREAM" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module WE-SHC_36103205_NO_CREAM (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 83.82 -87.7454)
(path /539EEC0F)
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-#Components#358: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10215.7872mil|Y=6389mil|PATTERN=PLD-16|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=10|SOURCEDESIGNATOR=SV2|SOURCEUNIQUEID=\MAUTDFNU|SOURCEHIERARCHICALPATH=rev02_19|SOURCEFOOTPRINTLIBRARY=Connectors.PcbLib|SOURCECOMPONENTLIBRARY=con-lstb.IntLib|SOURCELIBREFERENCE=MA08-2|SOURCEDESCRIPTION=PIN HEADER 0.1"|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=FJTEEOHJ|JUMPERSVISIBLE=TRUE
-#$pads{358}
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-#$pads{359}
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- )
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- )
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- )
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- (layers F.Cu B.Cu F.Mask F.Paste B.Mask B.Paste) (net 149 "FPGA_GPIO_B_7")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/B280C847-2543.wrl"
+ (fp_text reference SV3 (at 0 0) (layer F.SilkS) hide
+ (effects (font (thickness 0.05)))
+ )
+ (fp_text value "" (at 0 0) (layer F.SilkS) hide
+ (effects (font (thickness 0.05)))
+ )
+ (pad 1 thru_hole rect (at 8.89 -1.27 180) (size 1.5 1.5) (drill 1.000001) (layers F&B.Cu *.Paste *.Mask)
+ (net 302 VCCO_3V3))
+ (pad 2 thru_hole circle (at 8.89 1.27 180) (size 1.5 1.5) (drill 1.000001) (layers F&B.Cu *.Paste *.Mask)
+ (net 302 VCCO_3V3))
+ (pad 3 thru_hole circle (at 6.35 -1.27 180) (size 1.5 1.5) (drill 1.000001) (layers F&B.Cu *.Paste *.Mask)
+ (net 302 VCCO_3V3))
+ (pad 4 thru_hole circle (at 6.35 1.27 180) (size 1.5 1.5) (drill 1.000001) (layers F&B.Cu *.Paste *.Mask)
+ (net 302 VCCO_3V3))
+ (pad 5 thru_hole circle (at 3.81 -1.27 180) (size 1.5 1.5) (drill 1.000001) (layers F&B.Cu *.Paste *.Mask)
+ (net 6 GND))
+ (pad 6 thru_hole circle (at 3.81 1.27 180) (size 1.5 1.5) (drill 1.000001) (layers F&B.Cu *.Paste *.Mask)
+ (net 6 GND))
+ (pad 7 thru_hole circle (at 1.27 -1.27 180) (size 1.5 1.5) (drill 1.000001) (layers F&B.Cu *.Paste *.Mask)
+ (net 141 FPGA_GPIO_B_0))
+ (pad 8 thru_hole circle (at 1.27 1.27 180) (size 1.5 1.5) (drill 1.000001) (layers F&B.Cu *.Paste *.Mask)
+ (net 142 FPGA_GPIO_B_1))
+ (pad 9 thru_hole circle (at -1.27 -1.27 180) (size 1.5 1.5) (drill 1.000001) (layers F&B.Cu *.Paste *.Mask)
+ (net 143 FPGA_GPIO_B_2))
+ (pad 10 thru_hole circle (at -1.27 1.27 180) (size 1.5 1.5) (drill 1.000001) (layers F&B.Cu *.Paste *.Mask)
+ (net 144 FPGA_GPIO_B_3))
+ (pad 11 thru_hole circle (at -3.81 -1.27 180) (size 1.5 1.5) (drill 1.000001) (layers F&B.Cu *.Paste *.Mask)
+ (net 6 GND))
+ (pad 12 thru_hole circle (at -3.81 1.27 180) (size 1.5 1.5) (drill 1.000001) (layers F&B.Cu *.Paste *.Mask)
+ (net 6 GND))
+ (pad 13 thru_hole circle (at -6.35 -1.27 180) (size 1.5 1.5) (drill 1.000001) (layers F&B.Cu *.Paste *.Mask)
+ (net 145 FPGA_GPIO_B_4))
+ (pad 14 thru_hole circle (at -6.35 1.27 180) (size 1.5 1.5) (drill 1.000001) (layers F&B.Cu *.Paste *.Mask)
+ (net 146 FPGA_GPIO_B_5))
+ (pad 15 thru_hole circle (at -8.89 -1.27 180) (size 1.5 1.5) (drill 1.000001) (layers F&B.Cu *.Paste *.Mask)
+ (net 147 FPGA_GPIO_B_6))
+ (pad 16 thru_hole circle (at -8.89 1.27 180) (size 1.5 1.5) (drill 1.000001) (layers F&B.Cu *.Paste *.Mask)
+ (net 148 FPGA_GPIO_B_7))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/B280C847-2543.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#360: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11422mil|Y=6011mil|PATTERN=SOT-23|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 0.00000000000000E+0000|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=10|SOURCEDESIGNATOR=T1|SOURCEUNIQUEID=\FWCFUFTH|SOURCEHIERARCHICALPATH=rev02_2|SOURCEFOOTPRINTLIBRARY=CHIPS.PcbLib|SOURCECOMPONENTLIBRARY=rev02_1.SCHLIB|SOURCELIBREFERENCE=BC818*SMD|SOURCEDESCRIPTION=NPN Transistor|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=LFKSNJPL|JUMPERSVISIBLE=TRUE
-#$pads{360}
- (module "SOT-23" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module SOT-23 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 90.2208 -88.1634)
(path /539EEC0F)
(attr smd)
- (fp_text reference "T1" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference T1 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
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- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/04B9CA18-3B1B.wrl"
+ (pad 3 smd rect (at 0 1.1 270) (size 1.2 0.800001) (layers B.Cu B.Paste B.Mask)
+ (net 287 RAW_NOISE))
+ (pad 2 smd rect (at 0.95 -1.1 270) (size 1.2 0.800001) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at -0.95 -1.1 270) (size 1.2 0.800001) (layers B.Cu B.Paste B.Mask)
+ (net 276 NOISE_OUT))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/04B9CA18-3B1B.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#361: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11185mil|Y=5798mil|PATTERN=SOT-23|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=11|SOURCEDESIGNATOR=T2|SOURCEUNIQUEID=\IQENBPNP|SOURCEHIERARCHICALPATH=rev02_2|SOURCEFOOTPRINTLIBRARY=CHIPS.PcbLib|SOURCECOMPONENTLIBRARY=rev02_1.SCHLIB|SOURCELIBREFERENCE=BC818*SMD|SOURCEDESCRIPTION=NPN Transistor|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=GKCBLIQD|JUMPERSVISIBLE=TRUE
-#$pads{361}
- (module "SOT-23" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module SOT-23 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 84.201 -82.7532)
(path /539EEC0F)
(attr smd)
- (fp_text reference "T2" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference T2 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
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- (pad "1" smd rect (at 0.95000 1.10000 90) (size 1.2000001 0.8000009)
- (layers B.Cu B.Mask B.Paste) (net 8 "NetC15_2")
- )
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- (layers B.Cu B.Mask B.Paste) (net 9 "AMPLIFIED")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/04B9CA18-3B1B.wrl"
+ (pad 1 smd rect (at 0.95 1.1 90) (size 1.2 0.800001) (layers B.Cu B.Paste B.Mask)
+ (net 7 NetC15_2))
+ (pad 2 smd rect (at -0.95 1.1 90) (size 1.2 0.800001) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 3 smd rect (at 0 -1.1 90) (size 1.2 0.800001) (layers B.Cu B.Paste B.Mask)
+ (net 8 AMPLIFIED))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/04B9CA18-3B1B.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#362: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11347mil|Y=5892mil|PATTERN=B1,27|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=12|SOURCEDESIGNATOR=TP1|SOURCEUNIQUEID=\SMGQNSNP|SOURCEHIERARCHICALPATH=rev02_2|SOURCEFOOTPRINTLIBRARY=rev02.PcbLib|SOURCECOMPONENTLIBRARY=rev02_1.SCHLIB|SOURCELIBREFERENCE=TPB1,27|SOURCEDESCRIPTION=Test pad|FOOTPRINTDESCRIPTION=B1,27|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=HICGABLJ|JUMPERSVISIBLE=TRUE
-#$pads{362}
- (module "B1,27" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module B1,27 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 88.3158 -85.1408)
(path /539EEC0F)
(attr smd)
- (fp_text reference "TP1" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference TP1 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
- (fp_text value "B1,27" (at 0 0) (layer F.SilkS) hide
+ (fp_text value B1,27 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "TP" smd circle (at 0.00000 0.00000) (size 1.2700000 1.2700000)
- (layers B.Cu B.Mask B.Paste) (net 288 "RAW_NOISE")
- )
-
+ (pad TP smd circle (at 0 0) (size 1.27 1.27) (layers B.Cu B.Paste B.Mask)
+ (net 287 RAW_NOISE))
)
-#Components#363: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11104mil|Y=5892mil|PATTERN=B1,27|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=13|SOURCEDESIGNATOR=TP2|SOURCEUNIQUEID=\VWDALRKQ|SOURCEHIERARCHICALPATH=rev02_2|SOURCEFOOTPRINTLIBRARY=rev02.PcbLib|SOURCECOMPONENTLIBRARY=rev02_1.SCHLIB|SOURCELIBREFERENCE=TPB1,27|SOURCEDESCRIPTION=Test pad|FOOTPRINTDESCRIPTION=B1,27|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=JSOXBKIE|JUMPERSVISIBLE=TRUE
-#$pads{363}
- (module "B1,27" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module B1,27 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 82.1436 -85.1408)
(path /539EEC0F)
(attr smd)
- (fp_text reference "TP2" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference TP2 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
- (fp_text value "B1,27" (at 0 0) (layer F.SilkS) hide
+ (fp_text value B1,27 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- (pad "TP" smd circle (at 0.00000 0.00000) (size 1.2700000 1.2700000)
- (layers B.Cu B.Mask B.Paste) (net 9 "AMPLIFIED")
- )
-
+ (pad TP smd circle (at 0 0) (size 1.27 1.27) (layers B.Cu B.Paste B.Mask)
+ (net 8 AMPLIFIED))
)
-#Components#364: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8747mil|Y=5622mil|PATTERN=NDY|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=24|SOURCEDESIGNATOR=U1|SOURCEUNIQUEID=\APSJLYLQ|SOURCEHIERARCHICALPATH=rev02_1|SOURCEFOOTPRINTLIBRARY=Alpha-Power.PCBLIB|SOURCECOMPONENTLIBRARY=rev02_1.SCHLIB|SOURCELIBREFERENCE=LMZ13608|SOURCEDESCRIPTION=8-A SIMPLE SWITCHER® Power Module With 36-V Maximum Input Voltage|FOOTPRINTDESCRIPTION=NDY|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=USTIHBLR|JUMPERSVISIBLE=TRUE
-#$pads{364}
- (module "NDY" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module NDY (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 22.2758 -78.2828)
(path /539EEC0F)
(attr smd)
- (fp_text reference "U1" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference U1 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
- (fp_text value "NDY" (at 0 0) (layer F.SilkS) hide
+ (fp_text value NDY (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
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- (pad "4" smd rect (at 0.00000 -2.54000 180) (size 2.4130000 0.8636000)
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- (pad "5" smd rect (at 0.00000 -1.27000 180) (size 2.4130000 0.8636000)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
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- (pad "6" smd rect (at 0.00000 0.00000 180) (size 2.4130000 0.8636000)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
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+ (pad 126 smd oval (at 14.75 -2.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
+ (pad 125 smd oval (at 14.75 -2.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 124 smd oval (at 14.75 -3.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad 123 smd oval (at 14.75 -3.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 157 FPGA_IRQ_N_1))
+ (pad 122 smd oval (at 14.75 -4.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 156 FPGA_IRQ_N_0))
+ (pad 121 smd oval (at 14.75 -4.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
+ (pad 120 smd oval (at 14.75 -5.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 168 FPGA_PROGRAM_B))
+ (pad 119 smd oval (at 14.75 -5.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 155 FPGA_INIT_B))
+ (pad 118 smd oval (at 14.75 -6.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
+ (pad 117 smd oval (at 14.75 -6.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 71 FMC_D1))
+ (pad 116 smd oval (at 14.75 -7.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 70 FMC_D0))
+ (pad 115 smd oval (at 14.75 -7.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad 114 smd oval (at 14.75 -8.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 113 smd oval (at 14.75 -8.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 61 FMC_A18))
+ (pad 112 smd oval (at 14.75 -9.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 60 FMC_A17))
+ (pad 111 smd oval (at 14.75 -9.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 59 FMC_A16))
+ (pad 110 smd oval (at 14.75 -10.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 85 FMC_D15))
+ (pad 109 smd oval (at 14.75 -10.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 84 FMC_D14))
+ (pad 108 smd oval (at 14.75 -11.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 83 FMC_D13))
+ (pad 107 smd oval (at 14.75 -11.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 11 ARM_FPGA_CFG_MOSI))
+ (pad 106 smd oval (at 14.75 -12.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 10 ARM_FPGA_CFG_MISO))
+ (pad 105 smd oval (at 14.75 -12.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 12 ARM_FPGA_CFG_SCLK))
+ (pad 104 smd oval (at 12.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 9 ARM_FPGA_CFG_CS_N))
+ (pad 103 smd oval (at 12.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad 102 smd oval (at 11.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 90 FMC_D20))
+ (pad 101 smd oval (at 11.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 89 FMC_D19))
+ (pad 100 smd oval (at 10.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 88 FMC_D18))
+ (pad 99 smd oval (at 10.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 87 FMC_D17))
+ (pad 98 smd oval (at 9.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 86 FMC_D16))
+ (pad 97 smd oval (at 9.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 25 AVR_GPIO_ARM_0))
+ (pad 96 smd oval (at 8.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 26 AVR_GPIO_ARM_1))
+ (pad 95 smd oval (at 8.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
+ (pad 94 smd oval (at 7.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad 93 smd oval (at 7.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 92 smd oval (at 6.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 299 VCAP1))
+ (pad 91 smd oval (at 6.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 27 AVR_GPIO_ARM_2))
+ (pad 90 smd oval (at 5.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 28 AVR_GPIO_ARM_3))
+ (pad 89 smd oval (at 5.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 82 FMC_D12))
+ (pad 88 smd oval (at 4.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 81 FMC_D11))
+ (pad 87 smd oval (at 4.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 80 FMC_D10))
+ (pad 86 smd oval (at 3.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 79 FMC_D9))
+ (pad 85 smd oval (at 3.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 78 FMC_D8))
+ (pad 84 smd oval (at 2.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 77 FMC_D7))
+ (pad 83 smd oval (at 2.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad 82 smd oval (at 1.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 81 smd oval (at 1.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 76 FMC_D6))
+ (pad 80 smd oval (at 0.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 75 FMC_D5))
+ (pad 79 smd oval (at 0.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 74 FMC_D4))
+ (pad 78 smd oval (at -0.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 54 FMC_A11))
+ (pad 77 smd oval (at -0.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 53 FMC_A10))
+ (pad 76 smd oval (at -1.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 52 FMC_A9))
+ (pad 75 smd oval (at -1.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 51 FMC_A8))
+ (pad 74 smd oval (at -2.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 50 FMC_A7))
+ (pad 73 smd oval (at -2.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad 72 smd oval (at -3.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 71 smd oval (at -3.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 49 FMC_A6))
+ (pad 70 smd oval (at -4.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 117 FMC_SDNRAS))
+ (pad 69 smd oval (at -4.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
+ (pad 68 smd oval (at -5.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
+ (pad 67 smd oval (at -5.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
+ (pad 66 smd oval (at -6.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
+ (pad 65 smd oval (at -6.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
+ (pad 64 smd oval (at -7.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
+ (pad 63 smd oval (at -7.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
+ (pad 62 smd oval (at -8.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
+ (pad 61 smd oval (at -8.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 206 KSM_PROM_CS_N))
+ (pad 60 smd oval (at -9.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 59 smd oval (at -9.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad 58 smd oval (at -10.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
+ (pad 57 smd oval (at -10.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
+ (pad 56 smd oval (at -11.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 208 KSM_PROM_MOSI))
+ (pad 55 smd oval (at -11.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 207 KSM_PROM_MISO))
+ (pad 54 smd oval (at -12.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 209 KSM_PROM_SCLK))
+ (pad 53 smd oval (at -12.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 177 FT_DTR))
+ (pad 52 smd oval (at -14.75 -12.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad 51 smd oval (at -14.75 -12.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 50 smd oval (at -14.75 -11.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 197 FT_TXD))
+ (pad 49 smd oval (at -14.75 -11.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 290 RTC_SDA))
+ (pad 48 smd oval (at -14.75 -10.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 289 RTC_SCL))
+ (pad 47 smd oval (at -14.75 -10.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 288 RTC_MFP))
+ (pad 46 smd oval (at -14.75 -9.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
+ (pad 45 smd oval (at -14.75 -9.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 195 FT_RXD))
+ (pad 44 smd oval (at -14.75 -8.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 176 FT_CTS))
+ (pad 43 smd oval (at -14.75 -8.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 193 FT_RTS))
+ (pad 42 smd oval (at -14.75 -7.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad 41 smd oval (at -14.75 -7.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad 40 smd oval (at -14.75 -6.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 39 smd oval (at -14.75 -6.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad 38 smd oval (at -14.75 -5.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 111 FMC_SDCKE0))
+ (pad 37 smd oval (at -14.75 -5.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 115 FMC_SDNE0))
+ (pad 36 smd oval (at -14.75 -4.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
+ (pad 35 smd oval (at -14.75 -4.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 118 FMC_SDNWE))
+ (pad 34 smd oval (at -14.75 -3.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 277 NRST))
+ (pad 33 smd oval (at -14.75 -3.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 279 OSC_OUT))
+ (pad 32 smd oval (at -14.75 -2.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 278 OSC_IN))
+ (pad 31 smd oval (at -14.75 -2.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
+ (pad 30 smd oval (at -14.75 -1.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
+ (pad 29 smd oval (at -14.75 -1.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
+ (pad 28 smd oval (at -14.75 -0.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
+ (pad 27 smd oval (at -14.75 -0.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 121 FPGA_CFG_CTRL_ARM_ENA))
+ (pad 26 smd oval (at -14.75 0.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad 25 smd oval (at -14.75 0.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 24 smd oval (at -14.75 1.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 48 FMC_A5))
+ (pad 23 smd oval (at -14.75 1.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 47 FMC_A4))
+ (pad 22 smd oval (at -14.75 2.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 46 FMC_A3))
+ (pad 21 smd oval (at -14.75 2.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 122 FPGA_CFG_CTRL_FPGA_DIS))
+ (pad 20 smd oval (at -14.75 3.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
+ (pad 19 smd oval (at -14.75 3.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
+ (pad 18 smd oval (at -14.75 4.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 45 FMC_A2))
+ (pad 17 smd oval (at -14.75 4.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 44 FMC_A1))
+ (pad 16 smd oval (at -14.75 5.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 43 FMC_A0))
+ (pad 15 smd oval (at -14.75 5.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad 14 smd oval (at -14.75 6.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 13 smd oval (at -14.75 6.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
+ (pad 12 smd oval (at -14.75 7.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 101 FMC_D31))
+ (pad 11 smd oval (at -14.75 7.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 100 FMC_D30))
+ (pad 10 smd oval (at -14.75 8.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
+ (pad 9 smd oval (at -14.75 8.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
+ (pad 8 smd oval (at -14.75 9.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
+ (pad 7 smd oval (at -14.75 9.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
+ (pad 6 smd oval (at -14.75 10.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 266 NetR32_2))
+ (pad 5 smd oval (at -14.75 10.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 65 FMC_A22))
+ (pad 4 smd oval (at -14.75 11.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 64 FMC_A21))
+ (pad 3 smd oval (at -14.75 11.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 63 FMC_A20))
+ (pad 2 smd oval (at -14.75 12.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 62 FMC_A19))
+ (pad 1 smd oval (at -14.75 12.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 66 FMC_A23))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/1B9BC620-BA33.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
-
)
-#Components#368: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11262.5354mil|Y=4501.6693mil|PATTERN=TSSOP50P1180X120-86N|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|HEIGHT=47.2441mil|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=22|SOURCEDESIGNATOR=U5|SOURCEUNIQUEID=\UUPMSHXY|SOURCEHIERARCHICALPATH=rev02_6|SOURCEFOOTPRINTLIBRARY=rev02.PcbLib|SOURCECOMPONENTLIBRARY=Alpha-IC.IntLib|SOURCELIBREFERENCE=IS45S32160F|SOURCEDESCRIPTION=16Mx32, 512Mb SDRAM\nClock frequency: 166, 143 MHz|FOOTPRINTDESCRIPTION=TSSOP, 86-Leads, Body 22,22x10,16mm, Pitch 0,50mm, IPC Medium Density|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=YARXABVY|JUMPERSVISIBLE=TRUE
-#$pads{368}
- (module "TSSOP50P1180X120-86N" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module TSSOP50P1180X120-86N (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 86.170399 -49.8264)
(path /539EEC0F)
(attr smd)
- (fp_text reference "U5" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference U5 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "TSSOP, 86-Leads, Body 22,22x10,16mm, Pitch 0,50mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:589 pos:122139(0x1DD1B) type:1 net:5
-#010000000005000000047C267C300100000000AA000000010C000500FFFF7001FFFFFFFFE7FB930658FAED025ECD0100793507005ECD0100793507005ECD010079350700000000000101010000000000E070400100000000000000F200030004007980010079800100798001001BB3FFFFE54C00000000000101010101010100000000000000000000010000010000
- (pad "44" smd oval (at -5.75000 -10.50000 270) (size 0.2999994 1.2000001)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1309 counter:590 pos:122344(0x1DDE8) type:1 net:93
-#010000000005000000047C267C300100000000AA000000010C005D00FFFF7001FFFFFFFFE7FB930665F9EA025ECD0100793507005ECD0100793507005ECD010079350700000000000101010000000000E070400100000000000000F200030004007980010079800100798001001BB3FFFFE54C00000000000101010101010100000000000000000000010000010000
- (pad "45" smd oval (at -5.75000 -10.00000 270) (size 0.2999994 1.2000001)
- (layers F.Cu F.Mask F.Paste) (net 95 "FMC_D24")
- )
-#1309 counter:591 pos:122549(0x1DEB5) type:1 net:5
-#010000000005000000047C267C300100000000AA000000010C000500FFFF7001FFFFFFFFE7FB930673F8E7025ECD0100793507005ECD0100793507005ECD010079350700000000000101010000000000E070400100000000000000F200030004007980010079800100798001001BB3FFFFE54C00000000000101010101010100000000000000000000010000010000
- (pad "46" smd oval (at -5.75000 -9.50000 270) (size 0.2999994 1.2000001)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
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+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/D87FE1D2-D8B7.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#369: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11046mil|Y=4501.6693mil|PATTERN=TSSOP50P1180X120-86N|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|HEIGHT=47.2441mil|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=23|SOURCEDESIGNATOR=U6|SOURCEUNIQUEID=\VEVOGJRM|SOURCEHIERARCHICALPATH=rev02_6|SOURCEFOOTPRINTLIBRARY=rev02.PcbLib|SOURCECOMPONENTLIBRARY=Alpha-IC.IntLib|SOURCELIBREFERENCE=IS45S32160F|SOURCEDESCRIPTION=16Mx32, 512Mb SDRAM\nClock frequency: 166, 143 MHz|FOOTPRINTDESCRIPTION=TSSOP, 86-Leads, Body 22,22x10,16mm, Pitch 0,50mm, IPC Medium Density|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=CCJQKJXI|JUMPERSVISIBLE=TRUE
-#$pads{369}
- (module "TSSOP50P1180X120-86N" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module TSSOP50P1180X120-86N (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 80.6704 -49.8264)
(path /539EEC0F)
(attr smd)
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)
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(effects (font (thickness 0.05)))
)
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-#$pads{372}
- (module "LQFP-48" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
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+ (net 6 GND))
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+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/6B6B27F8-B7AC.wrl
(at (xyz 0 0 0))
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)
-
)
-#Components#373: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9959.8897mil|Y=4057.7165mil|PATTERN=LQFP-32|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|HEIGHT=62.9921mil|NAMEAUTOPOSITION=1|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=18|SOURCEDESIGNATOR=U10|SOURCEUNIQUEID=\GSFYSWJF|SOURCEHIERARCHICALPATH=rev02_11|SOURCEFOOTPRINTLIBRARY=CHIPS.PcbLib|SOURCECOMPONENTLIBRARY=ATMEL-ATTINY828R-AU.IntLib|SOURCELIBREFERENCE=ATTINY828R-AU|SOURCEDESCRIPTION=IC, MCU, 8KB, FLASH, 20MHZ, TQFP-32|FOOTPRINTDESCRIPTION=TQFP, 32-Leads, Body 9,0x9,0mm (max), Pitch 0,80mm, IPC Medium Density|UNIQUEID=LUWLRKTU|JUMPERSVISIBLE=TRUE
-#$pads{373}
- (module "LQFP-32" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module LQFP-32 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 53.083198 -38.549999)
(path /539EEC0F)
(attr smd)
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- )
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- )
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- )
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- )
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- (pad "26" smd rect (at -4.47500 -2.00000 90) (size 0.5499989 1.5499994)
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- )
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- (pad "27" smd rect (at -4.47500 -1.20000 90) (size 0.5499989 1.5499994)
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- )
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- (pad "28" smd rect (at -4.47500 -0.40000 90) (size 0.5499989 1.5499994)
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- )
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- (pad "29" smd rect (at -4.47500 0.40000 90) (size 0.5499989 1.5499994)
- (layers F.Cu F.Mask F.Paste) (net 39 "AVR_RESET")
- )
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- (pad "30" smd rect (at -4.47500 1.20000 90) (size 0.5499989 1.5499994)
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- )
-#1309 counter:857 pos:177023(0x2B37F) type:2 net:16
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- (pad "31" smd rect (at -4.47500 2.00000 90) (size 0.5499989 1.5499994)
- (layers F.Cu F.Mask F.Paste) (net 18 "AVR_GPIO_0")
- )
-#1309 counter:858 pos:177228(0x2B44C) type:2 net:17
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- (pad "32" smd rect (at -4.47500 2.80000 90) (size 0.5499989 1.5499994)
- (layers F.Cu F.Mask F.Paste) (net 19 "AVR_GPIO_1")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/590BE70C-A1C3.wrl"
+ (pad 1 smd oval (at -2.8 4.475 180) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
+ (net 19 AVR_GPIO_2))
+ (pad 2 smd rect (at -2 4.475 180) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
+ (net 20 AVR_GPIO_3))
+ (pad 3 smd rect (at -1.2 4.475 180) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
+ (net 21 AVR_GPIO_4))
+ (pad 4 smd rect (at -0.4 4.475 180) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
+ (net 3 3V3_BATT))
+ (pad 5 smd rect (at 0.4 4.475 180) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 6 smd rect (at 1.2 4.475 180) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
+ (net 22 AVR_GPIO_5))
+ (pad 7 smd rect (at 2 4.475 180) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
+ (net 23 AVR_GPIO_6))
+ (pad 8 smd rect (at 2.8 4.475 180) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
+ (net 24 AVR_GPIO_7))
+ (pad 9 smd rect (at 4.475 2.8 90) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
+ (net 33 AVR_LED1))
+ (pad 10 smd rect (at 4.475 2 90) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
+ (net 34 AVR_LED2))
+ (pad 11 smd rect (at 4.475 1.2 90) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
+ (net 35 AVR_LED3))
+ (pad 12 smd rect (at 4.475 0.4 90) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
+ (net 36 AVR_LED4))
+ (pad 13 smd rect (at 4.475 -0.4 90) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
+ (net 37 AVR_PANIC))
+ (pad 14 smd rect (at 4.475 -1.2 90) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
+ (net 210 MKM_AVR_CS_N))
+ (pad 15 smd rect (at 4.475 -2 90) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
+ (net 214 MKM_CONTROL_AVR_ENA))
+ (pad 16 smd rect (at 4.475 -2.8 90) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
+ (net 215 MKM_CONTROL_FPGA_DIS))
+ (pad 17 smd rect (at 2.8 -4.475 180) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
+ (net 25 AVR_GPIO_ARM_0))
+ (pad 18 smd rect (at 2 -4.475 180) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
+ (net 3 3V3_BATT))
+ (pad 19 smd rect (at 1.2 -4.475 180) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
+ (net 26 AVR_GPIO_ARM_1))
+ (pad 20 smd rect (at 0.4 -4.475 180) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
+ (net 27 AVR_GPIO_ARM_2))
+ (pad 21 smd rect (at -0.4 -4.475 180) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 22 smd rect (at -1.2 -4.475 180) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
+ (net 28 AVR_GPIO_ARM_3))
+ (pad 23 smd rect (at -2 -4.475 180) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
+ (net 29 AVR_GPIO_FPGA_0))
+ (pad 24 smd rect (at -2.8 -4.475 180) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
+ (net 30 AVR_GPIO_FPGA_1))
+ (pad 25 smd rect (at -4.475 -2.8 90) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
+ (net 31 AVR_GPIO_FPGA_2))
+ (pad 26 smd rect (at -4.475 -2 90) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
+ (net 32 AVR_GPIO_FPGA_3))
+ (pad 27 smd rect (at -4.475 -1.2 90) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
+ (net 212 MKM_AVR_MOSI))
+ (pad 28 smd rect (at -4.475 -0.4 90) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
+ (net 211 MKM_AVR_MISO))
+ (pad 29 smd rect (at -4.475 0.4 90) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
+ (net 38 AVR_RESET))
+ (pad 30 smd rect (at -4.475 1.2 90) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
+ (net 213 MKM_AVR_SCK))
+ (pad 31 smd rect (at -4.475 2 90) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
+ (net 17 AVR_GPIO_0))
+ (pad 32 smd rect (at -4.475 2.8 90) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
+ (net 18 AVR_GPIO_1))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/590BE70C-A1C3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
-#Components#374: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11037mil|Y=3749.37mil|PATTERN=SOIC127P600X175-8N|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=9|SOURCEDESIGNATOR=U12|SOURCEUNIQUEID=\EPNECCPT|SOURCEHIERARCHICALPATH=rev02_12|SOURCEFOOTPRINTLIBRARY=rev02.PcbLib|SOURCECOMPONENTLIBRARY=Microchip-23K640-I_SN.IntLib|SOURCELIBREFERENCE=23K640-I/SN|SOURCEDESCRIPTION=64K SPI Bus Low-Power Serial SRAM,SOIC-8|FOOTPRINTDESCRIPTION=SOIC127P600X175-8N|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=FFXHEEQK|JUMPERSVISIBLE=TRUE
-#$pads{374}
- (module "SOIC127P600X175-8N" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module SOIC127P600X175-8N (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 80.4418 -30.717998)
(path /539EEC0F)
(attr smd)
- (fp_text reference "U12" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference U12 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
- (fp_text value "SOIC127P600X175-8N" (at 0 0) (layer F.SilkS) hide
+ (fp_text value SOIC127P600X175-8N (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
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- )
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- (layers B.Cu B.Mask B.Paste) (net 4 "3V3_BATT")
- )
-
+ (pad 1 smd rect (at -1.905 -2.7178 270) (size 1.549999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 216 MKM_CS_N))
+ (pad 2 smd rect (at -0.635 -2.7178 270) (size 1.549999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 221 MKM_MISO))
+ (pad 3 smd rect (at 0.635 -2.7178 270) (size 1.549999 0.599999) (layers B.Cu B.Paste B.Mask))
+ (pad 4 smd rect (at 1.905 -2.7178 270) (size 1.549999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 5 smd rect (at 1.905 2.6924 270) (size 1.549999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 222 MKM_MOSI))
+ (pad 6 smd rect (at 0.635 2.6924 270) (size 1.549999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 223 MKM_SCK))
+ (pad 7 smd rect (at -0.635 2.6924 270) (size 1.549999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 267 NetR33_2))
+ (pad 8 smd rect (at -1.905 2.6924 270) (size 1.549999 0.599999) (layers B.Cu B.Paste B.Mask)
+ (net 3 3V3_BATT))
)
-#Components#375: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10092.5748mil|Y=5252mil|PATTERN=BGA484C100P22X22_2300X2300X254|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|HEIGHT=100mil|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=18|SOURCEDESIGNATOR=U13|SOURCEUNIQUEID=\QGLPCTNM|SOURCEHIERARCHICALPATH=rev02_13|SOURCEFOOTPRINTLIBRARY=rev02.PcbLib|SOURCECOMPONENTLIBRARY=Xilinx_XC7A200TFBG484.IntLib|SOURCELIBREFERENCE=XC7A200TFBG484|SOURCEDESCRIPTION=Xilinx FPGA: XC7A200TFBG484|FOOTPRINTDESCRIPTION=BGA, 484-Leads, Body 23,00x23,00mmx2,54mm, Pitch 1,00mm|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=QSNVORIN|JUMPERSVISIBLE=TRUE
-#$pads{375}
- (module "BGA484C100P22X22_2300X2300X254" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module BGA484C100P22X22_2300X2300X254 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 56.4534 -68.8848)
(path /539EEC0F)
(attr smd)
- (fp_text reference "U13" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference U13 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "BGA, 484-Leads, Body 23,00x23,00mmx2,54mm, Pitch 1,00mm" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:875 pos:180703(0x2C1DF) type:1 net:62
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- (pad "AB19" smd circle (at -7.50000 10.50000 180) (size 0.4499991 0.4499991)
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+ (pad AA5 smd circle (at 6.5 9.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 89 FMC_D19))
+ (pad AA4 smd circle (at 7.5 9.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 92 FMC_D22))
+ (pad AA3 smd circle (at 8.5 9.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 88 FMC_D18))
+ (pad AA2 smd circle (at 9.5 9.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad AA1 smd circle (at 10.5 9.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 83 FMC_D13))
+ (pad Y22 smd circle (at -10.5 8.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 66 FMC_A23))
+ (pad Y21 smd circle (at -9.5 8.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 65 FMC_A22))
+ (pad Y20 smd circle (at -8.5 8.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad Y19 smd circle (at -7.5 8.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad Y18 smd circle (at -6.5 8.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 78 FMC_D8))
+ (pad Y17 smd circle (at -5.5 8.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 43 FMC_A0))
+ (pad Y16 smd circle (at -4.5 8.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 46 FMC_A3))
+ (pad Y15 smd circle (at -3.5 8.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad Y14 smd circle (at -2.5 8.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 54 FMC_A11))
+ (pad Y13 smd circle (at -1.5 8.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 52 FMC_A9))
+ (pad Y12 smd circle (at -0.5 8.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 77 FMC_D7))
+ (pad Y11 smd circle (at 0.5 8.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 76 FMC_D6))
+ (pad Y10 smd circle (at 1.5 8.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad Y9 smd circle (at 2.5 8.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad Y8 smd circle (at 3.5 8.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad Y7 smd circle (at 4.5 8.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 61 FMC_A18))
+ (pad Y6 smd circle (at 5.5 8.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 109 FMC_NWAIT))
+ (pad Y5 smd circle (at 6.5 8.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad Y4 smd circle (at 7.5 8.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 91 FMC_D21))
+ (pad Y3 smd circle (at 8.5 8.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 87 FMC_D17))
+ (pad Y2 smd circle (at 9.5 8.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad Y1 smd circle (at 10.5 8.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 218 MKM_FPGA_MISO))
+ (pad W22 smd circle (at -10.5 7.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 151 FPGA_GPIO_LED_2))
+ (pad W21 smd circle (at -9.5 7.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad W20 smd circle (at -8.5 7.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 80 FMC_D10))
+ (pad W19 smd circle (at -7.5 7.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 42 DIGITIZED_NOISE))
+ (pad W18 smd circle (at -6.5 7.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad W17 smd circle (at -5.5 7.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 107 FMC_NL))
+ (pad W16 smd circle (at -4.5 7.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 108 FMC_NOE))
+ (pad W15 smd circle (at -3.5 7.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad W14 smd circle (at -2.5 7.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 97 FMC_D27))
+ (pad W13 smd circle (at -1.5 7.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad W12 smd circle (at -0.5 7.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 96 FMC_D26))
+ (pad W11 smd circle (at 0.5 7.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 69 FMC_CLK))
+ (pad W10 smd circle (at 1.5 7.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 94 FMC_D24))
+ (pad W9 smd circle (at 2.5 7.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad W8 smd circle (at 3.5 7.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad W7 smd circle (at 4.5 7.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad W6 smd circle (at 5.5 7.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad W5 smd circle (at 6.5 7.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad W4 smd circle (at 7.5 7.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad W3 smd circle (at 8.5 7.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad W2 smd circle (at 9.5 7.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 217 MKM_FPGA_CS_N))
+ (pad W1 smd circle (at 10.5 7.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 219 MKM_FPGA_MOSI))
+ (pad V22 smd circle (at -10.5 6.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad V21 smd circle (at -9.5 6.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad V20 smd circle (at -8.5 6.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 98 FMC_D28))
+ (pad V19 smd circle (at -7.5 6.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad V18 smd circle (at -6.5 6.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 99 FMC_D29))
+ (pad V17 smd circle (at -5.5 6.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad V16 smd circle (at -4.5 6.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad V15 smd circle (at -3.5 6.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad V14 smd circle (at -2.5 6.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad V13 smd circle (at -1.5 6.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad V12 smd circle (at -0.5 6.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 160 FPGA_JTAG_TCK))
+ (pad V11 smd circle (at 0.5 6.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad V10 smd circle (at 1.5 6.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad V9 smd circle (at 2.5 6.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad V8 smd circle (at 3.5 6.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad V7 smd circle (at 4.5 6.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad V6 smd circle (at 5.5 6.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad V5 smd circle (at 6.5 6.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 106 FMC_NE1))
+ (pad V4 smd circle (at 7.5 6.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 93 FMC_D23))
+ (pad V3 smd circle (at 8.5 6.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 220 MKM_FPGA_SCK))
+ (pad V2 smd circle (at 9.5 6.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 56 FMC_A13))
+ (pad V1 smd circle (at 10.5 6.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad U22 smd circle (at -10.5 5.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 272 NetR65_1))
+ (pad U21 smd circle (at -9.5 5.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad U20 smd circle (at -8.5 5.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 82 FMC_D12))
+ (pad U19 smd circle (at -7.5 5.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad U18 smd circle (at -6.5 5.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad U17 smd circle (at -5.5 5.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad U16 smd circle (at -4.5 5.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad U15 smd circle (at -3.5 5.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad U14 smd circle (at -2.5 5.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad U13 smd circle (at -1.5 5.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 162 FPGA_JTAG_TDO))
+ (pad U12 smd circle (at -0.5 5.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 153 FPGA_INIT_B_INT1))
+ (pad U11 smd circle (at 0.5 5.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 164 FPGA_M0))
+ (pad U10 smd circle (at 1.5 5.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 165 FPGA_M1))
+ (pad U9 smd circle (at 2.5 5.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 166 FPGA_M2))
+ (pad U8 smd circle (at 3.5 5.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad U7 smd circle (at 4.5 5.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad U6 smd circle (at 5.5 5.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad U5 smd circle (at 6.5 5.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad U4 smd circle (at 7.5 5.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad U3 smd circle (at 8.5 5.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 149 FPGA_GPIO_LED_0))
+ (pad U2 smd circle (at 9.5 5.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 73 FMC_D3))
+ (pad U1 smd circle (at 10.5 5.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 72 FMC_D2))
+ (pad T22 smd circle (at -10.5 4.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad T21 smd circle (at -9.5 4.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad T20 smd circle (at -8.5 4.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad T19 smd circle (at -7.5 4.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 119 FPGA_CFG_CS_N1))
+ (pad T18 smd circle (at -6.5 4.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad T17 smd circle (at -5.5 4.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad T16 smd circle (at -4.5 4.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad T15 smd circle (at -3.5 4.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad T14 smd circle (at -2.5 4.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad T13 smd circle (at -1.5 4.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 163 FPGA_JTAG_TMS))
+ (pad T12 smd circle (at -0.5 4.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad T11 smd circle (at 0.5 4.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad T10 smd circle (at 1.5 4.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 175 FPGA_VCCINT_1V0))
+ (pad T9 smd circle (at 2.5 4.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad T8 smd circle (at 3.5 4.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 175 FPGA_VCCINT_1V0))
+ (pad T7 smd circle (at 4.5 4.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad T6 smd circle (at 5.5 4.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad T5 smd circle (at 6.5 4.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad T4 smd circle (at 7.5 4.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad T3 smd circle (at 8.5 4.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad T2 smd circle (at 9.5 4.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad T1 smd circle (at 10.5 4.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 150 FPGA_GPIO_LED_1))
+ (pad R22 smd circle (at -10.5 3.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 123 FPGA_CFG_MISO1))
+ (pad R21 smd circle (at -9.5 3.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 100 FMC_D30))
+ (pad R20 smd circle (at -8.5 3.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad R19 smd circle (at -7.5 3.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad R18 smd circle (at -6.5 3.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad R17 smd circle (at -5.5 3.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad R16 smd circle (at -4.5 3.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad R15 smd circle (at -3.5 3.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad R14 smd circle (at -2.5 3.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad R13 smd circle (at -1.5 3.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 161 FPGA_JTAG_TDI))
+ (pad R12 smd circle (at -0.5 3.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad R11 smd circle (at 0.5 3.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 174 FPGA_VCCAUX_1V8))
+ (pad R10 smd circle (at 1.5 3.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad R9 smd circle (at 2.5 3.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 175 FPGA_VCCINT_1V0))
+ (pad R8 smd circle (at 3.5 3.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad R7 smd circle (at 4.5 3.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 175 FPGA_VCCINT_1V0))
+ (pad R6 smd circle (at 5.5 3.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad R5 smd circle (at 6.5 3.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad R4 smd circle (at 7.5 3.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 95 FMC_D25))
+ (pad R3 smd circle (at 8.5 3.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad R2 smd circle (at 9.5 3.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad R1 smd circle (at 10.5 3.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad P22 smd circle (at -10.5 2.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 125 FPGA_CFG_MOSI1))
+ (pad P21 smd circle (at -9.5 2.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 101 FMC_D31))
+ (pad P20 smd circle (at -8.5 2.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad P19 smd circle (at -7.5 2.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad P18 smd circle (at -6.5 2.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad P17 smd circle (at -5.5 2.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad P16 smd circle (at -4.5 2.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad P15 smd circle (at -3.5 2.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad P14 smd circle (at -2.5 2.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad P13 smd circle (at -1.5 2.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad P12 smd circle (at -0.5 2.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 174 FPGA_VCCAUX_1V8))
+ (pad P11 smd circle (at 0.5 2.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad P10 smd circle (at 1.5 2.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 175 FPGA_VCCINT_1V0))
+ (pad P9 smd circle (at 2.5 2.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad P8 smd circle (at 3.5 2.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 175 FPGA_VCCINT_1V0))
+ (pad P7 smd circle (at 4.5 2.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad P6 smd circle (at 5.5 2.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad P5 smd circle (at 6.5 2.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
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+ (pad P3 smd circle (at 8.5 2.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
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+ (pad P1 smd circle (at 10.5 2.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
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+ (pad N21 smd circle (at -9.5 1.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
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+ (pad N16 smd circle (at -4.5 1.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
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+ (pad N15 smd circle (at -3.5 1.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 81 FMC_D11))
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+ (pad N13 smd circle (at -1.5 1.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad N12 smd circle (at -0.5 1.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
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+ (pad N9 smd circle (at 2.5 1.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
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+ (pad N8 smd circle (at 3.5 1.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
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+ (pad N7 smd circle (at 4.5 1.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 175 FPGA_VCCINT_1V0))
+ (pad N6 smd circle (at 5.5 1.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
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+ (pad N4 smd circle (at 7.5 1.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
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+ (pad N1 smd circle (at 10.5 1.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
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+ (pad M19 smd circle (at -7.5 0.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
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+ (pad M17 smd circle (at -5.5 0.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
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+ (pad M14 smd circle (at -2.5 0.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
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+ (pad M12 smd circle (at -0.5 0.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
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+ (pad M11 smd circle (at 0.5 0.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad M10 smd circle (at 1.5 0.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
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+ (pad M9 smd circle (at 2.5 0.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad M8 smd circle (at 3.5 0.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
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+ (pad M7 smd circle (at 4.5 0.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
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+ (pad M6 smd circle (at 5.5 0.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad M5 smd circle (at 6.5 0.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad M4 smd circle (at 7.5 0.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
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+ (pad M2 smd circle (at 9.5 0.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
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+ (pad L22 smd circle (at -10.5 -0.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
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+ (pad L21 smd circle (at -9.5 -0.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad L20 smd circle (at -8.5 -0.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad L19 smd circle (at -7.5 -0.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad L18 smd circle (at -6.5 -0.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad L17 smd circle (at -5.5 -0.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
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+ (pad L16 smd circle (at -4.5 -0.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad L15 smd circle (at -3.5 -0.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad L14 smd circle (at -2.5 -0.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad L13 smd circle (at -1.5 -0.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad L12 smd circle (at -0.5 -0.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
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+ (pad L11 smd circle (at 0.5 -0.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
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+ (pad L9 smd circle (at 2.5 -0.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad L8 smd circle (at 3.5 -0.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad L7 smd circle (at 4.5 -0.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
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+ (pad L6 smd circle (at 5.5 -0.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad L5 smd circle (at 6.5 -0.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad L4 smd circle (at 7.5 -0.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad L3 smd circle (at 8.5 -0.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad L2 smd circle (at 9.5 -0.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
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+ (pad L1 smd circle (at 10.5 -0.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad K22 smd circle (at -10.5 -1.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad K21 smd circle (at -9.5 -1.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad K20 smd circle (at -8.5 -1.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
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+ (pad K18 smd circle (at -6.5 -1.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
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+ (pad K16 smd circle (at -4.5 -1.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad K15 smd circle (at -3.5 -1.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
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+ (pad K13 smd circle (at -1.5 -1.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad K12 smd circle (at -0.5 -1.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
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+ (pad K11 smd circle (at 0.5 -1.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
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+ (pad K10 smd circle (at 1.5 -1.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
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+ (pad K9 smd circle (at 2.5 -1.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
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+ (pad K8 smd circle (at 3.5 -1.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
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+ (pad K7 smd circle (at 4.5 -1.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
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+ (pad K5 smd circle (at 6.5 -1.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
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+ (pad K4 smd circle (at 7.5 -1.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad K3 smd circle (at 8.5 -1.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad K2 smd circle (at 9.5 -1.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
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+ (pad J18 smd circle (at -6.5 -2.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
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+ (pad J16 smd circle (at -4.5 -2.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
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+ (pad J13 smd circle (at -1.5 -2.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
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+ (pad J7 smd circle (at 4.5 -2.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
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+ (pad J3 smd circle (at 8.5 -2.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
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+ (pad H22 smd circle (at -10.5 -3.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad H21 smd circle (at -9.5 -3.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
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+ (pad H19 smd circle (at -7.5 -3.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
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+ (pad H16 smd circle (at -4.5 -3.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
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+ (pad H1 smd circle (at 10.5 -3.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
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+ (pad G19 smd circle (at -7.5 -4.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
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+ (pad G14 smd circle (at -2.5 -4.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
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+ (pad G13 smd circle (at -1.5 -4.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad G12 smd circle (at -0.5 -4.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
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+ (pad G11 smd circle (at 0.5 -4.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 129 FPGA_DONE_INT))
+ (pad G10 smd circle (at 1.5 -4.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
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+ (pad G9 smd circle (at 2.5 -4.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
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+ (pad G8 smd circle (at 3.5 -4.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
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+ (pad G7 smd circle (at 4.5 -4.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad G6 smd circle (at 5.5 -4.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
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+ (pad G5 smd circle (at 6.5 -4.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
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+ (pad G4 smd circle (at 7.5 -4.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad G3 smd circle (at 8.5 -4.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad G2 smd circle (at 9.5 -4.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad G1 smd circle (at 10.5 -4.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad F22 smd circle (at -10.5 -5.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
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+ (pad F21 smd circle (at -9.5 -5.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad F20 smd circle (at -8.5 -5.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad F19 smd circle (at -7.5 -5.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad F18 smd circle (at -6.5 -5.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad F17 smd circle (at -5.5 -5.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad F16 smd circle (at -4.5 -5.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 157 FPGA_IRQ_N_1))
+ (pad F15 smd circle (at -3.5 -5.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad F14 smd circle (at -2.5 -5.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 156 FPGA_IRQ_N_0))
+ (pad F13 smd circle (at -1.5 -5.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad F12 smd circle (at -0.5 -5.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad F11 smd circle (at 0.5 -5.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad F10 smd circle (at 1.5 -5.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad F9 smd circle (at 2.5 -5.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad F8 smd circle (at 3.5 -5.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad F7 smd circle (at 4.5 -5.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad F6 smd circle (at 5.5 -5.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad F5 smd circle (at 6.5 -5.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad F4 smd circle (at 7.5 -5.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad F3 smd circle (at 8.5 -5.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad F2 smd circle (at 9.5 -5.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad F1 smd circle (at 10.5 -5.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad E22 smd circle (at -10.5 -6.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad E21 smd circle (at -9.5 -6.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad E20 smd circle (at -8.5 -6.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad E19 smd circle (at -7.5 -6.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad E18 smd circle (at -6.5 -6.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad E17 smd circle (at -5.5 -6.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 158 FPGA_IRQ_N_2))
+ (pad E16 smd circle (at -4.5 -6.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad E15 smd circle (at -3.5 -6.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad E14 smd circle (at -2.5 -6.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 133 FPGA_GPIO_A_0))
+ (pad E13 smd circle (at -1.5 -6.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 134 FPGA_GPIO_A_1))
+ (pad E12 smd circle (at -0.5 -6.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad E11 smd circle (at 0.5 -6.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad E10 smd circle (at 1.5 -6.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad E9 smd circle (at 2.5 -6.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad E8 smd circle (at 3.5 -6.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad E7 smd circle (at 4.5 -6.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad E6 smd circle (at 5.5 -6.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad E5 smd circle (at 6.5 -6.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad E4 smd circle (at 7.5 -6.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad E3 smd circle (at 8.5 -6.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad E2 smd circle (at 9.5 -6.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad E1 smd circle (at 10.5 -6.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad D22 smd circle (at -10.5 -7.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad D21 smd circle (at -9.5 -7.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad D20 smd circle (at -8.5 -7.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad D19 smd circle (at -7.5 -7.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad D18 smd circle (at -6.5 -7.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad D17 smd circle (at -5.5 -7.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 132 FPGA_GCLK))
+ (pad D16 smd circle (at -4.5 -7.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad D15 smd circle (at -3.5 -7.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad D14 smd circle (at -2.5 -7.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 144 FPGA_GPIO_B_3))
+ (pad D13 smd circle (at -1.5 -7.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad D12 smd circle (at -0.5 -7.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad D11 smd circle (at 0.5 -7.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad D10 smd circle (at 1.5 -7.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad D9 smd circle (at 2.5 -7.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad D8 smd circle (at 3.5 -7.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad D7 smd circle (at 4.5 -7.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad D6 smd circle (at 5.5 -7.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad D5 smd circle (at 6.5 -7.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad D4 smd circle (at 7.5 -7.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad D3 smd circle (at 8.5 -7.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad D2 smd circle (at 9.5 -7.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad D1 smd circle (at 10.5 -7.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad C22 smd circle (at -10.5 -8.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 148 FPGA_GPIO_B_7))
+ (pad C21 smd circle (at -9.5 -8.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad C20 smd circle (at -8.5 -8.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 147 FPGA_GPIO_B_6))
+ (pad C19 smd circle (at -7.5 -8.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad C18 smd circle (at -6.5 -8.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 145 FPGA_GPIO_B_4))
+ (pad C17 smd circle (at -5.5 -8.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad C16 smd circle (at -4.5 -8.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad C15 smd circle (at -3.5 -8.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 142 FPGA_GPIO_B_1))
+ (pad C14 smd circle (at -2.5 -8.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 159 FPGA_IRQ_N_3))
+ (pad C13 smd circle (at -1.5 -8.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 137 FPGA_GPIO_A_4))
+ (pad C12 smd circle (at -0.5 -8.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad C11 smd circle (at 0.5 -8.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad C10 smd circle (at 1.5 -8.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad C9 smd circle (at 2.5 -8.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad C8 smd circle (at 3.5 -8.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad C7 smd circle (at 4.5 -8.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad C6 smd circle (at 5.5 -8.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad C5 smd circle (at 6.5 -8.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad C4 smd circle (at 7.5 -8.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad C3 smd circle (at 8.5 -8.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad C2 smd circle (at 9.5 -8.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad C1 smd circle (at 10.5 -8.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad B22 smd circle (at -10.5 -9.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad B21 smd circle (at -9.5 -9.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad B20 smd circle (at -8.5 -9.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 29 AVR_GPIO_FPGA_0))
+ (pad B19 smd circle (at -7.5 -9.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad B18 smd circle (at -6.5 -9.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 131 FPGA_ENTROPY_DISABLE))
+ (pad B17 smd circle (at -5.5 -9.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad B16 smd circle (at -4.5 -9.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 143 FPGA_GPIO_B_2))
+ (pad B15 smd circle (at -3.5 -9.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 140 FPGA_GPIO_A_7))
+ (pad B14 smd circle (at -2.5 -9.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad B13 smd circle (at -1.5 -9.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 138 FPGA_GPIO_A_5))
+ (pad B12 smd circle (at -0.5 -9.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad B11 smd circle (at 0.5 -9.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad B10 smd circle (at 1.5 -9.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad B9 smd circle (at 2.5 -9.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad B8 smd circle (at 3.5 -9.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad B7 smd circle (at 4.5 -9.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad B6 smd circle (at 5.5 -9.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad B5 smd circle (at 6.5 -9.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad B4 smd circle (at 7.5 -9.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad B3 smd circle (at 8.5 -9.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad B2 smd circle (at 9.5 -9.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad B1 smd circle (at 10.5 -9.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad A22 smd circle (at -10.5 -10.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad A21 smd circle (at -9.5 -10.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 146 FPGA_GPIO_B_5))
+ (pad A20 smd circle (at -8.5 -10.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 30 AVR_GPIO_FPGA_1))
+ (pad A19 smd circle (at -7.5 -10.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 32 AVR_GPIO_FPGA_3))
+ (pad A18 smd circle (at -6.5 -10.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 31 AVR_GPIO_FPGA_2))
+ (pad A17 smd circle (at -5.5 -10.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 302 VCCO_3V3))
+ (pad A16 smd circle (at -4.5 -10.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 141 FPGA_GPIO_B_0))
+ (pad A15 smd circle (at -3.5 -10.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 139 FPGA_GPIO_A_6))
+ (pad A14 smd circle (at -2.5 -10.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 136 FPGA_GPIO_A_3))
+ (pad A13 smd circle (at -1.5 -10.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 135 FPGA_GPIO_A_2))
+ (pad A12 smd circle (at -0.5 -10.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad A11 smd circle (at 0.5 -10.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad A10 smd circle (at 1.5 -10.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad A9 smd circle (at 2.5 -10.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad A8 smd circle (at 3.5 -10.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad A7 smd circle (at 4.5 -10.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad A6 smd circle (at 5.5 -10.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad A5 smd circle (at 6.5 -10.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad A4 smd circle (at 7.5 -10.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (pad A3 smd circle (at 8.5 -10.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad A2 smd circle (at 9.5 -10.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad A1 smd circle (at 10.5 -10.5 180) (size 0.449999 0.449999) (layers B.Cu B.Paste B.Mask))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/041B98A5-F02D.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
-
)
-#Components#376: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9266mil|Y=5554mil|PATTERN=QFN38|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|HEIGHT=39.3701mil|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=20|SOURCEDESIGNATOR=U14|SOURCEUNIQUEID=\MUJFAXKM|SOURCEHIERARCHICALPATH=rev02_18|SOURCEFOOTPRINTLIBRARY=rev02.PcbLib|SOURCECOMPONENTLIBRARY=rev02_1.SCHLIB|SOURCELIBREFERENCE=EN6347QI|SOURCEDESCRIPTION=3A PowerSoC\nVoltage Mode Synchronous PWM Buck with Integrated Inductor|FOOTPRINTDESCRIPTION=QFN38_4X7X1.85|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=UCBHQMRI|JUMPERSVISIBLE=TRUE
-#$pads{376}
- (module "QFN38" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module QFN38 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 35.4584 -76.5556)
(path /539EEC0F)
(attr smd)
- (fp_text reference "U14" (at 0 0) (layer F.SilkS) hide
- (effects (font (thickness 0.05)))
- )
- (fp_text value "QFN38_4X7X1.85" (at 0 0) (layer F.SilkS) hide
- (effects (font (thickness 0.05)))
- )
-
- #1309 counter:1771 pos:391328(0x5F8A0) type:1 net:5
-#010000000005000000047C267C300100000000AA000000200C000500FFFF7801FFFFFFFF20E1850561E74703869E0F0084A70B00869E0F0084A70B00869E0F0084A70B000000000001010100000000008066400100000000000000F2000300040079800100798001007980010088F6E1FF000000000000000101010102020100000000000000000000FFFF00010000
- (pad "PAD39" smd oval (at 0.00000 1.26000 180) (size 2.5999999 1.9400012)
- (layers B.Cu B.Mask B.Paste) (net 7 "GND")
- )
-#1309 counter:1772 pos:392187(0x5FBFB) type:1 net:-1
-#010000000005000000047C267C300100000000AA000000200C00FFFFFFFF7801FFFFFFFF706F7A05CE7E610380A90300A086010080A90300A086010080A90300A08601000000000001010100000000000000000100000000000000F200030004007980010079800100798001001BB3FFFFE54C00000000000101010101010100000000000000000000FFFF00010000
- (pad "38" smd oval (at -1.90500 -3.00000) (size 0.6096000 0.2540000)
- (layers B.Cu B.Mask B.Paste)
- )
-#1309 counter:1773 pos:393043(0x5FF53) type:1 net:-1
-#010000000005000000047C267C300100000000AA000000200C00FFFFFFFF7801FFFFFFFF706F7A05DC7D5E0380A90300A086010080A90300A086010080A90300A08601000000000001010100000000000000000100000000000000F200030004007980010079800100798001001BB3FFFFE54C00000000000101010101010100000000000000000000FFFF00010000
- (pad "37" smd oval (at -1.90500 -2.50000) (size 0.6096000 0.2540000)
- (layers B.Cu B.Mask B.Paste)
- )
-#1309 counter:1774 pos:393899(0x602AB) type:1 net:-1
-#010000000005000000047C267C300100000000AA000000200C00FFFFFFFF7801FFFFFFFF706F7A05EA7C5B0380A90300A086010080A90300A086010080A90300A08601000000000001010100000000000000000100000000000000F200030004007980010079800100798001001BB3FFFFE54C00000000000101010101010100000000000000000000FFFF00010000
- (pad "36" smd oval (at -1.90500 -2.00000) (size 0.6096000 0.2540000)
- (layers B.Cu B.Mask B.Paste)
- )
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-#Components#378: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8893mil|Y=4803mil|PATTERN=QFN68|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=12|SOURCEDESIGNATOR=U16|SOURCEUNIQUEID=\QPFPXFKB|SOURCEHIERARCHICALPATH=rev02_24|SOURCEFOOTPRINTLIBRARY=rev02.PcbLib|SOURCECOMPONENTLIBRARY=rev02_1.SCHLIB|SOURCELIBREFERENCE=EN5364QI|SOURCEDESCRIPTION=6A PowerSoC\nVoltage Mode Synchronous Buck PWM DC-DC Converter\nWith Integrated Inductor|FOOTPRINTDESCRIPTION=QFN68_8X11X1.85|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=ITTNYHOU|JUMPERSVISIBLE=TRUE
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+ (pad 8 smd oval (at 5.5 0 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 241 NetC208_1))
+ (pad 9 smd oval (at 5.5 0.5 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 241 NetC208_1))
+ (pad 10 smd oval (at 5.5 1 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 241 NetC208_1))
+ (pad 11 smd oval (at 5.5 1.5 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 241 NetC208_1))
+ (pad 12 smd oval (at 5.5 2 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 241 NetC208_1))
+ (pad 13 smd oval (at 5.5 2.5 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 241 NetC208_1))
+ (pad 14 smd oval (at 5.5 3 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
+ (pad 15 smd oval (at 5.5 3.5 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
+ (pad 16 smd oval (at 4.5 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
+ (pad 17 smd oval (at 4 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
+ (pad 18 smd oval (at 3.5 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
+ (pad 19 smd oval (at 3 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
+ (pad 20 smd oval (at 2.5 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
+ (pad 21 smd oval (at 2 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
+ (pad 22 smd oval (at 1.5 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
+ (pad 23 smd oval (at 1 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
+ (pad 24 smd oval (at 0.5 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
+ (pad 25 smd oval (at 0 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
+ (pad 26 smd oval (at -0.508 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
+ (pad 27 smd oval (at -1.016 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 28 smd oval (at -1.524 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 29 smd oval (at -2.0066 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 30 smd oval (at -2.5146 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 31 smd oval (at -3.0226 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 32 smd oval (at -3.5052 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 33 smd oval (at -4.0132 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 34 smd oval (at -4.5212 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 301 VCC_5V0))
+ (pad 35 smd oval (at -5.5118 3.5) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 301 VCC_5V0))
+ (pad 36 smd oval (at -5.5118 3) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 301 VCC_5V0))
+ (pad 37 smd oval (at -5.5118 2.5) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 301 VCC_5V0))
+ (pad 38 smd oval (at -5.5118 2) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 301 VCC_5V0))
+ (pad 39 smd oval (at -5.5118 1.5) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 301 VCC_5V0))
+ (pad 40 smd oval (at -5.5118 1) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 301 VCC_5V0))
+ (pad 41 smd oval (at -5.5118 0.5) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 301 VCC_5V0))
+ (pad 42 smd oval (at -5.5118 0) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 301 VCC_5V0))
+ (pad 43 smd oval (at -5.5118 -0.508) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 301 VCC_5V0))
+ (pad 44 smd oval (at -5.5118 -1.016) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
+ (pad 45 smd oval (at -5.5118 -1.524) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
+ (pad 46 smd oval (at -5.5118 -2.0066) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
+ (pad 47 smd oval (at -5.5118 -2.5146) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
+ (pad 48 smd oval (at -5.5118 -3.0226) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
+ (pad 49 smd oval (at -5.5118 -3.5052) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
+ (pad 50 smd oval (at -4.5212 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
+ (pad 51 smd oval (at -4.0132 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 273 NetR66_1))
+ (pad 52 smd oval (at -3.5052 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 285 PWR_ENA_VCCINT))
+ (pad 53 smd oval (at -3.0226 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 301 VCC_5V0))
+ (pad 54 smd oval (at -2.5146 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 281 POK_VCCINT))
+ (pad 55 smd oval (at -2.0066 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 56 smd oval (at -1.524 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 242 NetC208_2))
+ (pad 57 smd oval (at -1.016 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
+ (pad 58 smd oval (at -0.508 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
+ (pad 59 smd oval (at 0 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 240 NetC207_1))
+ (pad 60 smd oval (at 0.5 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
+ (pad 61 smd oval (at 1 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
+ (pad 62 smd oval (at 1.5 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
+ (pad 63 smd oval (at 2 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 274 NetR67_1))
+ (pad 64 smd oval (at 2.5 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 65 smd oval (at 3 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 66 smd oval (at 3.5 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 67 smd oval (at 4 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad 68 smd oval (at 4.5 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad PAD6 smd oval (at -2.175 0.625 90) (size 5.35 2.35) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ (pad PAD7 smd oval (at 3.55 -2.65 180) (size 2.5 1.3) (layers B.Cu B.Paste B.Mask)
+ (net 6 GND))
+ )
+
+ (module XTAL3215 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 19.275001 -45.6)
(path /539EEC0F)
(attr smd)
- (fp_text reference "X1" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference X1 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
- (fp_text value "XTAL3215" (at 0 0) (layer F.SilkS) hide
+ (fp_text value XTAL3215 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:825 pos:170470(0x299E6) type:2 net:227
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- (pad "P$1" smd rect (at -0.00000 -1.21920 90) (size 1.1176000 1.9050000)
- (layers F.Cu F.Mask F.Paste) (net 229 "NetC70_2")
- )
-#1309 counter:826 pos:170676(0x29AB4) type:2 net:228
-#010000000005000000047C267C300100000000AA000000010C00E400FFFF7B01FFFFFFFFC7A824053B4D8E02C0B60600B0710B00C0B60600B0710B00C0B60600B0710B00000000000202020000000000E070400100000000000000F200030004007980010079800100798001001BB3FFFFE54C00000000000101010101010100000000000000000000010000010000
- (pad "P$2" smd rect (at -0.00000 1.20000 270) (size 1.1176000 1.9050000)
- (layers F.Cu F.Mask F.Paste) (net 230 "NetC71_2")
- )
-
+ (pad P$1 smd rect (at 0 -1.2192 90) (size 1.1176 1.905) (layers F.Cu F.Paste F.Mask)
+ (net 228 NetC70_2))
+ (pad P$2 smd rect (at 0 1.2 270) (size 1.1176 1.905) (layers F.Cu F.Paste F.Mask)
+ (net 229 NetC71_2))
)
-#Components#380: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8778.4646mil|Y=2756.5354mil|PATTERN=CRYSTAL_3.2X2.5|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=31|SOURCEDESIGNATOR=Y1|SOURCEUNIQUEID=\TQPGQFUU|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=rev02.PcbLib|SOURCECOMPONENTLIBRARY=rev02_1.SCHLIB|SOURCELIBREFERENCE=CRYSTALTHIN|SOURCEDESCRIPTION=Crystal 12MHz|FOOTPRINTDESCRIPTION=CRYSTAL_3.2X2.5|UNIQUEID=EJSQWBWH|JUMPERSVISIBLE=TRUE
-#$pads{380}
- (module "CRYSTAL_3.2X2.5" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 23.075001 -5.49999899999999)
+
+ (module CRYSTAL_3.2X2.5 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (at 23.075001 -5.499999)
(path /539EEC0F)
(attr smd)
- (fp_text reference "Y1" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference Y1 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
- (fp_text value "CRYSTAL_3.2X2.5" (at 0 0) (layer F.SilkS) hide
+ (fp_text value CRYSTAL_3.2X2.5 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:473 pos:98475(0x180AB) type:2 net:230
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- (pad "1" smd rect (at -0.83820 -1.11760 270) (size 1.3970000 1.1938000)
- (layers F.Cu F.Mask F.Paste) (net 232 "NetC78_2")
- )
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- (pad "2" smd rect (at -0.83820 1.09220 270) (size 1.3970000 1.1938000)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1309 counter:475 pos:98883(0x18243) type:2 net:229
-#010000000005000000047C267C300100000000AA000000010C00E500FFFF7C01FFFFFFFFE6AC40057A0D9E0170640800F02B070070640800F02B070070640800F02B07000000000002020200000000008056400100000000000000F200030004007980010079800100798001001BB3FFFFE54C00000000000101010101010100000000000000000000010000010000
- (pad "3" smd rect (at 0.86360 1.09220 90) (size 1.3970000 1.1938000)
- (layers F.Cu F.Mask F.Paste) (net 231 "NetC75_2")
- )
-#1309 counter:476 pos:99087(0x1830F) type:2 net:5
-#010000000005000000047C267C300100000000AA000000010C000500FFFF7C01FFFFFFFFE6AC4005EA53AB0170640800F02B070070640800F02B070070640800F02B07000000000002020200000000008056400100000000000000F200030004007980010079800100798001001BB3FFFFE54C00000000000101010101010100000000000000000000010000010000
- (pad "4" smd rect (at 0.86360 -1.11760 90) (size 1.3970000 1.1938000)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-
+ (pad 1 smd rect (at -0.8382 -1.1176 270) (size 1.397 1.1938) (layers F.Cu F.Paste F.Mask)
+ (net 231 NetC78_2))
+ (pad 2 smd rect (at -0.8382 1.0922 270) (size 1.397 1.1938) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 3 smd rect (at 0.8636 1.0922 90) (size 1.397 1.1938) (layers F.Cu F.Paste F.Mask)
+ (net 230 NetC75_2))
+ (pad 4 smd rect (at 0.8636 -1.1176 90) (size 1.397 1.1938) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
)
-#Components#381: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11119.0157mil|Y=2886.4567mil|PATTERN=CRYSTAL_3.2X2.5|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=31|SOURCEDESIGNATOR=Y2|SOURCEUNIQUEID=\KVHEJVNX|SOURCEHIERARCHICALPATH=rev02_10|SOURCEFOOTPRINTLIBRARY=rev02.PcbLib|SOURCECOMPONENTLIBRARY=rev02_1.SCHLIB|SOURCELIBREFERENCE=CRYSTALTHIN|SOURCEDESCRIPTION=Crystal 12MHz|FOOTPRINTDESCRIPTION=CRYSTAL_3.2X2.5|UNIQUEID=XVOCBUHN|JUMPERSVISIBLE=TRUE
-#$pads{381}
- (module "CRYSTAL_3.2X2.5" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module CRYSTAL_3.2X2.5 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 82.524999 -8.8)
(path /539EEC0F)
(attr smd)
- (fp_text reference "Y2" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference Y2 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
- (fp_text value "CRYSTAL_3.2X2.5" (at 0 0) (layer F.SilkS) hide
+ (fp_text value CRYSTAL_3.2X2.5 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:469 pos:97659(0x17D7B) type:2 net:5
-#010000000005000000047C267C300100000000AA000000010C000500FFFF7D01FFFFFFFF4D57A7061740B30170640800F02B070070640800F02B070070640800F02B07000000000002020200000000000000000100000000000000F200030004007980010079800100798001001BB3FFFFE54C00000000000101010101010100000000000000000000010000010000
- (pad "4" smd rect (at 1.11760 0.86360) (size 1.3970000 1.1938000)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1309 counter:470 pos:97863(0x17E47) type:2 net:231
-#010000000005000000047C267C300100000000AA000000010C00E700FFFF7D01FFFFFFFFDD109A061740B30170640800F02B070070640800F02B070070640800F02B07000000000002020200000000000000000100000000000000F200030004007980010079800100798001001BB3FFFFE54C00000000000101010101010100000000000000000000010000010000
- (pad "3" smd rect (at -1.09220 0.86360) (size 1.3970000 1.1938000)
- (layers F.Cu F.Mask F.Paste) (net 233 "NetC90_2")
- )
-#1309 counter:471 pos:98067(0x17F13) type:2 net:5
-#010000000005000000047C267C300100000000AA000000010C000500FFFF7D01FFFFFFFFDD109A064779BD0170640800F02B070070640800F02B070070640800F02B07000000000002020200000000008066400100000000000000F200030004007980010079800100798001001BB3FFFFE54C00000000000101010101010100000000000000000000010000010000
- (pad "2" smd rect (at -1.09220 -0.83820 180) (size 1.3970000 1.1938000)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1309 counter:472 pos:98271(0x17FDF) type:2 net:232
-#010000000005000000047C267C300100000000AA000000010C00E800FFFF7D01FFFFFFFF4D57A7064779BD0170640800F02B070070640800F02B070070640800F02B07000000000002020200000000008066400100000000000000F200030004007980010079800100798001001BB3FFFFE54C00000000000101010101010100000000000000000000010000010000
- (pad "1" smd rect (at 1.11760 -0.83820 180) (size 1.3970000 1.1938000)
- (layers F.Cu F.Mask F.Paste) (net 234 "NetC93_2")
- )
-
+ (pad 4 smd rect (at 1.1176 0.8636) (size 1.397 1.1938) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 3 smd rect (at -1.0922 0.8636) (size 1.397 1.1938) (layers F.Cu F.Paste F.Mask)
+ (net 232 NetC90_2))
+ (pad 2 smd rect (at -1.0922 -0.8382 180) (size 1.397 1.1938) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 1 smd rect (at 1.1176 -0.8382 180) (size 1.397 1.1938) (layers F.Cu F.Paste F.Mask)
+ (net 233 NetC93_2))
)
-#Components#382: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10208.5827mil|Y=4996.6929mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=3|SOURCEDESIGNATOR=R35|SOURCEUNIQUEID=\VUVKLPVD|SOURCEHIERARCHICALPATH=rev02_13|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=QHMCBUIH|JUMPERSVISIBLE=TRUE
-#$pads{382}
- (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+
+ (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
(at 59.400001 -62.4)
(path /539EEC0F)
(attr smd)
- (fp_text reference "R35" (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R35 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
-
- #1309 counter:489 pos:101739(0x18D6B) type:2 net:5
-#010000000005000000047C267C300100000000AA000000010C000500FFFF7E01FFFFFFFFC3B415065F6EF7020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000
- (pad "1" smd rect (at -0.00000 0.50000 90) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 7 "GND")
- )
-#1309 counter:490 pos:101943(0x18E37) type:2 net:165
-#010000000005000000047C267C300100000000AA000000010C00A500FFFF7E01FFFFFFFFC3B415064470FD020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000
- (pad "2" smd rect (at -0.00000 -0.50000 90) (size 0.4499991 0.5999988)
- (layers F.Cu F.Mask F.Paste) (net 167 "FPGA_M2")
- )
-#1365
- (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl"
+ (pad 1 smd rect (at 0 0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 6 GND))
+ (pad 2 smd rect (at 0 -0.5 90) (size 0.449999 0.599999) (layers F.Cu F.Paste F.Mask)
+ (net 166 FPGA_M2))
+ (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
-
)
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-#$pads{384}
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