path: root/rev03-KiCad/rev02_14.sch

EESchema Schematic File Version 4
EELAYER 26 0
EELAYER END
$Descr B 17000 11000
encoding utf-8
Sheet 16 27
Title "rev02_14"
Date "15 10 2016"
Rev ""
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
Text Notes 7500 4300 0    60   ~ 12
*) Temperature Sensor [NOT USED]
Text Notes 5200 4300 0    60   ~ 12
*) XADC [NOT USED]
Text Notes 1100 4200 0    60   ~ 12
*) Transceivers [NOT USED]
Text Notes 8810 10230 0    84   ~ 12
FPGA unused
Text Notes 6160 4990 0    60   ~ 12
C109
Text Notes 6160 5190 0    60   ~ 12
0.1~uF
$Comp
L power:GND GND_99
U 1 1 58023F57
P 8700 5000
F 0 "GND_99" H 8700 5000 20  0000 C CNN
F 1 "+GND" H 8700 4930 30  0000 C CNN
F 2 "" H 8700 5000 70  0000 C CNN
F 3 "" H 8700 5000 70  0000 C CNN
	1    8700 5000
	1    0    0    -1  
$EndComp
$Comp
L power:GND GND_100
U 1 1 58023F56
P 5700 5400
F 0 "GND_100" H 5700 5400 20  0000 C CNN
F 1 "+GND" H 5700 5330 30  0000 C CNN
F 2 "" H 5700 5400 70  0000 C CNN
F 3 "" H 5700 5400 70  0000 C CNN
	1    5700 5400
	1    0    0    -1  
$EndComp
$Comp
L power:GND GND_101
U 1 1 58023F55
P 6100 5400
F 0 "GND_101" H 6100 5400 20  0000 C CNN
F 1 "+GND" H 6100 5330 30  0000 C CNN
F 2 "" H 6100 5400 70  0000 C CNN
F 3 "" H 6100 5400 70  0000 C CNN
	1    6100 5400
	1    0    0    -1  
$EndComp
$Comp
L Cryptech_Alpha:FPGA_VCCAUX_1V8 FPGA_VCCAUX_1V8
U 1 1 58023F54
P 6100 4500
F 0 "FPGA_VCCAUX_1V8" H 6100 4500 20  0000 C CNN
F 1 "+FPGA_VCCAUX_1V8" H 6100 4430 30  0000 C CNN
F 2 "" H 6100 4500 70  0000 C CNN
F 3 "" H 6100 4500 70  0000 C CNN
	1    6100 4500
	1    0    0    -1  
$EndComp
Wire Wire Line
	5700 5200 5500 5200
Wire Wire Line
	5700 5200 5700 5400
Wire Wire Line
	5700 5100 5500 5100
Wire Wire Line
	5700 5100 5700 5200
Wire Wire Line
	5700 5000 5500 5000
Wire Wire Line
	5700 5000 5700 5100
Wire Wire Line
	6100 5200 6100 5400
Wire Wire Line
	8700 4800 8500 4800
Wire Wire Line
	8700 4800 8700 5000
Wire Wire Line
	8700 4700 8500 4700
Wire Wire Line
	8700 4700 8700 4800
Wire Wire Line
	6100 4700 5500 4700
Wire Wire Line
	6100 4700 6100 4900
Wire Wire Line
	6100 4500 6100 4700
$Comp
L Cryptech_Alpha:C-EUC0402 C109
U 1 1 58023F53
P 6100 5000
F 0 "C109" H 6180 4810 60  0000 L BNN
F 1 "0.1uF" H 6420 5020 60  0000 L BNN
F 2 "Cryptech_Alpha_Footprints:C_0402" H 6420 5020 60  0001 C CNN
F 3 "" H 6420 5020 60  0000 C CNN
	1    6100 5000
	1    0    0    -1
$EndComp
$Comp
L Cryptech_Alpha:XC7A200TFBG484_8 U13_2
U 1 1 58023F52
P 1900 7900
F 0 "U13_2" H 1490 6690 60  0000 L BNN
	1    1900 7900
	1    0    0    -1
F 2 "Cryptech_Alpha_Footprints:BGA484C100P22X22_2300X2300X254" H 1490 6690 60  0001 C CNN
$EndComp
$Comp
L Cryptech_Alpha:XC7A200TFBG484_11 U13_3
U 1 1 58023F51
P 1900 5000
F 0 "U13_3" H 1490 4590 60  0000 L BNN
	1    1900 5000
	1    0    0    -1
F 2 "Cryptech_Alpha_Footprints:BGA484C100P22X22_2300X2300X254" H 1490 4590 60  0001 C CNN
$EndComp
$Comp
L Cryptech_Alpha:XC7A200TFBG484_12 U13_4
U 1 1 58023F50
P 1900 6000
F 0 "U13_4" H 1490 5490 60  0000 L BNN
	1    1900 6000
	1    0    0    -1
F 2 "Cryptech_Alpha_Footprints:BGA484C100P22X22_2300X2300X254" H 1490 5490 60  0001 C CNN
$EndComp
$Comp
L Cryptech_Alpha:XC7A200TFBG484_13 U13_5
U 1 1 58023F4F
P 8300 4700
F 0 "U13_5" H 7890 4390 60  0000 L BNN
	1    8300 4700
	1    0    0    -1
F 2 "Cryptech_Alpha_Footprints:BGA484C100P22X22_2300X2300X254" H 7890 4390 60  0001 C CNN
$EndComp
$Comp
L Cryptech_Alpha:XC7A200TFBG484_17 U13_6
U 1 1 58023F4E
P 5300 4900
F 0 "U13_6" H 4890 4390 60  0000 L BNN
	1    5300 4900
	1    0    0    -1
F 2 "Cryptech_Alpha_Footprints:BGA484C100P22X22_2300X2300X254" H 4890 4390 60  0001 C CNN
$EndComp
$EndSCHEMATC