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-rw-r--r--rtl/src/verilog/core_selector.v1
1 files changed, 1 insertions, 0 deletions
diff --git a/rtl/src/verilog/core_selector.v b/rtl/src/verilog/core_selector.v
index eef0a75..093830a 100644
--- a/rtl/src/verilog/core_selector.v
+++ b/rtl/src/verilog/core_selector.v
@@ -255,6 +255,7 @@ module core_selector
//
endcase
+
endmodule
//======================================================================