Age | Commit message (Collapse) | Author | |
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2016-05-19 | Refactor FPGA bitstream upload code. | Fredrik Thulin | |
Move the N25Q128 code to it's own file in order to be able to reuse it for the keystore memory code. | |||
2016-05-18 | Add FPGA bitstream upload command to cli-test. | Fredrik Thulin | |
This code needs more error checking etc. but together with the Python script 'filetransfer', a new bitstream may be loaded into the FPGA config memory like this: filetransfer --fpga /path/to/bitstream The bitstream is identified by 'file' e.g. like this: alpha_test_top.bit: Xilinx BIT data - from alpha_test_top.ncd;UserID=0xFFFFFFFF - for 7a200tfbg484 - built 2016/05/12(13:59:24) - data length 0xe0164 | |||
2016-05-18 | FPGA config memory access code from Pavel. | Fredrik Thulin | |