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AgeCommit message (Collapse)Author
2017-05-02Merge branch 'init_cleanup' into no-rtosPaul Selkirk
Clean up Makefiles and initialization code.
2017-02-22Refactor flash code.Paul Selkirk
2017-02-20Move dangerous auto_erase functionality to where it's actually used.Paul Selkirk
2017-02-19Remove unnecessary delays in flash code.Paul Selkirk
2016-09-16Revised ks_flash. Compiles, not yet tested.Rob Austein
2016-05-21Bugfix erasing sector 0.Fredrik Thulin
2016-05-20Add code to reset FPGA using FPGA_PROGRAM_B and FPGA_INIT_B.Fredrik Thulin
Also add code to erase FPGA config memory and check status of FPGA_DONE.
2016-05-19Refactor FPGA bitstream upload code.Fredrik Thulin
Move the N25Q128 code to it's own file in order to be able to reuse it for the keystore memory code.
2016-05-18Add FPGA bitstream upload command to cli-test.Fredrik Thulin
This code needs more error checking etc. but together with the Python script 'filetransfer', a new bitstream may be loaded into the FPGA config memory like this: filetransfer --fpga /path/to/bitstream The bitstream is identified by 'file' e.g. like this: alpha_test_top.bit: Xilinx BIT data - from alpha_test_top.ncd;UserID=0xFFFFFFFF - for 7a200tfbg484 - built 2016/05/12(13:59:24) - data length 0xe0164
2016-05-18FPGA config memory access code from Pavel.Fredrik Thulin