sw/stm32 - Cryptech HSM on STM-32 ARM processor

Age	Commit message (Collapse)	Author
2017-10-11	Cleanup 'unused parameter' warnings, a couple of which are actual coding errors.	Paul Selkirk

2017-10-11	Cleanup: signed/unsigned mismatches, mostly in loop counters	Paul Selkirk

2017-04-29	cli-test doesn't use the tasker, even though it might have previously used a ↵	Paul Selkirk
	semaphore from the rtos
2017-04-29	Port cli-test to the new task API.	Paul Selkirk

2016-10-07	strcasecmp() is not a standard function.	Rob Austein

2016-07-21	Use a fresh port of libcli, which retains more of the original API.	Paul Selkirk

2016-07-12	re-enable masterkey	Fredrik Thulin

2016-07-09	Merge more code from projects/hsm.	Fredrik Thulin

2016-07-08	merge test code from projects/hsm/	Fredrik Thulin

2016-06-07	Don't reboot when CLI logout is intended.	Paul Selkirk

2016-06-02	Use DMA for UART RX instead of interrupts.	Fredrik Thulin
	DMA is more efficient and less prone to miss characters than interrupts. An open question is if circular mode is really the best. If someone copy-pastes more than the RX buffer size of configuration into the CLI, we risk the DMA controller catching up with the reader and overwriting data not yet read. Since we don't have flow control back to the users terminal, we will always fail if too much data is entered before we can process it. The question is if failing to stuff new data at the end of a buffer might be better than data being overwritten - thus messing up the commands in unpredictable ways.
2016-06-01	Implement circular buffer UART RX using interrupts.	Fredrik Thulin

2016-05-24	non-working code to upload an application and jump to it	Fredrik Thulin
	Committing my work in progress in case someone else wants to help.
2016-05-23	SDRAM initialization and test code from Pavel.	Fredrik Thulin
	Integrated into the cli-test program as such: cryptech> test sdram Initializing SDRAM Starting SDRAM test (n = 0) Run sequential write-then-read test for the first chip Run random write-then-read test for the first chip Run sequential write-then-read test for the second chip Run random write-then-read test for the second chip Run interleaved write-then-read test for both chips at once SDRAM test (n = 0) completed SDRAM test completed successfully cryptech>
2016-05-18	put some generic CLI code in mgmt-cli.c	Fredrik Thulin