Age | Commit message (Collapse) | Author | |
---|---|---|---|
2016-05-24 | non-working code to upload an application and jump to it | Fredrik Thulin | |
Committing my work in progress in case someone else wants to help. | |||
2016-05-18 | Add FPGA bitstream upload command to cli-test. | Fredrik Thulin | |
This code needs more error checking etc. but together with the Python script 'filetransfer', a new bitstream may be loaded into the FPGA config memory like this: filetransfer --fpga /path/to/bitstream The bitstream is identified by 'file' e.g. like this: alpha_test_top.bit: Xilinx BIT data - from alpha_test_top.ncd;UserID=0xFFFFFFFF - for 7a200tfbg484 - built 2016/05/12(13:59:24) - data length 0xe0164 | |||
2016-05-18 | A little more robust file transfer | Fredrik Thulin | |
2016-05-18 | Write in 4k-chunks, with acks for flow control. | Fredrik Thulin | |
2016-05-16 | Use baud rate 921600 instead of 115200. | Fredrik Thulin | |
Don't want to wait longer than necessary for firmware file transfers. | |||
2016-05-15 | add simple filetransfer poc | Fredrik Thulin | |