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2017-07-31Add a generic SysTick hook, to call a function on every 1ms tick, because ↵Paul Selkirk
it's easier than setting up a dedicated timer.
2017-04-29Remove exception handlders that I probably shouldn't have defined in the ↵Paul Selkirk
first place.
2017-04-29Remove rtos source files.Paul Selkirk
2017-04-17Use default SysTick interrupt priority.Paul Selkirk
We really don't want SysTick_Handler, which runs the task scheduler, to run at a higher priority than SVC_Handler, which runs supposedly-atomic operations like mutex locking and unlocking. I've seen a mutex lock/unlock mismatch which I think is due to interrupting rt_mut_release at a particularly inopportune moment.
2017-04-01Change RPC UART to have a high-priority thread monitoring a large(ish) DMAPaul Selkirk
buffer, because we've observed out-of-order receives under load.
2016-09-20Still some problem with uart receive under heavy load, so change to a 2-byte ↵Paul Selkirk
receive buffer with half-complete callbacks, and raise the dma priority.
2016-07-06Fix the way code is commented out, to avoid compiler warnings.Paul Selkirk
2016-06-13Only the HSM project needs the RTOS; most of the test projects can use the ↵Paul Selkirk
STM32 HAL code directly.
2016-06-13Add __end symbols for CCMRAM and SDRAM sections.Paul Selkirk
This lets us, say, use these sections for stack or heap.
2016-06-13SDRAM is for uninitialized data only.Paul Selkirk
We don't plan to put initialized data in SDRAM, and we don't have startup code to copy initialized data, so don't even bother. Further, the linker will reserve space in FLASH, even for uninitialized data, so just don't.
2016-06-09Put thread stack buffers in SDRAM, because pkey uses a lot of stack.Paul Selkirk
Also rearchitect the way we handle RPC requests - have a bunch of waiting dispatch threads rather than continually creating and deleting threads.
2016-06-07fix some commentsFredrik Thulin
2016-06-06Split HAL_UART_RxCpltCallback into uart-specific callbacks.Paul Selkirk
2016-06-06Refactor HAL_UART_MspInit, link DMA in MX_USART*_UART_Init so ↵Paul Selkirk
HAL_UART_MspInit doesn't have to.
2016-06-06Fix UART pin assignments. (It uses the Alternate in any case.)Paul Selkirk
2016-06-06Fix definition of LED_RED in mbed_die.Paul Selkirk
2016-06-02Use DMA for UART RX instead of interrupts.Fredrik Thulin
DMA is more efficient and less prone to miss characters than interrupts. An open question is if circular mode is really the best. If someone copy-pastes more than the RX buffer size of configuration into the CLI, we risk the DMA controller catching up with the reader and overwriting data not yet read. Since we don't have flow control back to the users terminal, we will always fail if too much data is entered before we can process it. The question is if failing to stuff new data at the end of a buffer might be better than data being overwritten - thus messing up the commands in unpredictable ways.
2016-06-01Implement circular buffer UART RX using interrupts.Fredrik Thulin
2016-05-26Implement a bootloader.Fredrik Thulin
This bootloader is now the application at 0x08000000 (FLASH start), which the STM32 will execute upon reset. The other applications are now loaded at 0x08030000 (128 KB into the flash) and will never get started unless the bootloader has been programmed into flash too.
2016-05-25More DFU code. This might actually work.Fredrik Thulin
The applications to be uploaded using 'dfu upload' have to have another FLASH defined in their linker script. Have to recompile some firmware tomorrow and test if this actually works.
2016-05-25remove non-free files we're not using anywaysFredrik Thulin
2016-05-24non-working code to upload an application and jump to itFredrik Thulin
Committing my work in progress in case someone else wants to help.
2016-05-23SDRAM initialization and test code from Pavel.Fredrik Thulin
Integrated into the cli-test program as such: cryptech> test sdram Initializing SDRAM Starting SDRAM test (n = 0) Run sequential write-then-read test for the first chip Run random write-then-read test for the first chip Run sequential write-then-read test for the second chip Run random write-then-read test for the second chip Run interleaved write-then-read test for both chips at once SDRAM test (n = 0) completed SDRAM test completed successfully cryptech>
2016-05-23commit bugfix from Pavel fixing initialization of the second SDRAM chipFredrik Thulin
2016-05-21Add code to access the keystore memory (SPI flash).Fredrik Thulin
2016-05-18Add FPGA bitstream upload command to cli-test.Fredrik Thulin
This code needs more error checking etc. but together with the Python script 'filetransfer', a new bitstream may be loaded into the FPGA config memory like this: filetransfer --fpga /path/to/bitstream The bitstream is identified by 'file' e.g. like this: alpha_test_top.bit: Xilinx BIT data - from alpha_test_top.ncd;UserID=0xFFFFFFFF - for 7a200tfbg484 - built 2016/05/12(13:59:24) - data length 0xe0164
2016-05-18FPGA config memory access code from Pavel.Fredrik Thulin
2016-05-16Add code to talk with the external RTC chip.Fredrik Thulin
2016-05-12Add build target for the alphaFredrik Thulin
2016-04-24This time for sure - async receive, and everything that flows from that.Paul Selkirk
2016-04-14import mbed rtos libraryPaul Selkirk