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2016-06-06Use refactored slip/serial code.Paul Selkirk
Client daemon sends client ID, echo it back in response.
2016-06-06Split HAL_UART_RxCpltCallback into uart-specific callbacks.Paul Selkirk
2016-06-06Refactor HAL_UART_MspInit, link DMA in MX_USART*_UART_Init so ↵Paul Selkirk
HAL_UART_MspInit doesn't have to.
2016-06-06Fix UART pin assignments. (It uses the Alternate in any case.)Paul Selkirk
2016-06-06Fix definition of LED_RED in mbed_die.Paul Selkirk
2016-06-06Change enum stm_uart_port port to a typedef.Paul Selkirk
2016-06-06Restore LED definitions for dev-bridge board.Paul Selkirk
2016-06-06Remove the 6-second blue blink for alpha board.Paul Selkirk
2016-06-06Remove unused hex file.Paul Selkirk
2016-06-06Remove unused projects.Paul Selkirk
2016-06-06Don't break builds for dev-bridge board.Paul Selkirk
2016-06-02Merge branch 'ft-uart_it'Fredrik Thulin
2016-06-02Use DMA for UART RX instead of interrupts.Fredrik Thulin
DMA is more efficient and less prone to miss characters than interrupts. An open question is if circular mode is really the best. If someone copy-pastes more than the RX buffer size of configuration into the CLI, we risk the DMA controller catching up with the reader and overwriting data not yet read. Since we don't have flow control back to the users terminal, we will always fail if too much data is entered before we can process it. The question is if failing to stuff new data at the end of a buffer might be better than data being overwritten - thus messing up the commands in unpredictable ways.
2016-06-02Move the rest of the CLI commands out of cli-test.c.Fredrik Thulin
2016-06-01Implement circular buffer UART RX using interrupts.Fredrik Thulin
2016-06-01Move FPGA related commands to mgmt-fpga.cFredrik Thulin
2016-06-01Wait for FPGA_DONE on startup (available on Alpha board)Fredrik Thulin
2016-05-31Update huart names to reflect change in stm-uart.Fredrik Thulin
2016-05-27Merge branch 'ft-dfu-code-loading'Fredrik Thulin
2016-05-27formattingFredrik Thulin
2016-05-27Merge branch 'master' of git.cryptech.is.:sw/stm32Fredrik Thulin
2016-05-27DFU working - but no signature validation for now.Fredrik Thulin
2016-05-27cli_command_root_node: bugfix missing command callbackFredrik Thulin
2016-05-26Figure out if the user (me) has a NUCLEO board.Fredrik Thulin
2016-05-26Implement a bootloader.Fredrik Thulin
This bootloader is now the application at 0x08000000 (FLASH start), which the STM32 will execute upon reset. The other applications are now loaded at 0x08030000 (128 KB into the flash) and will never get started unless the bootloader has been programmed into flash too.
2016-05-25More DFU code. This might actually work.Fredrik Thulin
The applications to be uploaded using 'dfu upload' have to have another FLASH defined in their linker script. Have to recompile some firmware tomorrow and test if this actually works.
2016-05-25Merge remote-tracking branch 'origin/master' into ft-dfu-code-loadingFredrik Thulin
2016-05-25remove non-free files we're not using anywaysFredrik Thulin
2016-05-24Try harder to pick up updates from our submodules.Paul Selkirk
2016-05-24#include stm32f4xx_hal.h since stm-fmc.h now references HAL symbols.Paul Selkirk
This has a knock-on effect in hal_io_fmc.c, but that's in another repo.
2016-05-24Merge branch 'master' of git.cryptech.is:sw/stm32Paul Selkirk
2016-05-24Add test-mkmifPaul Selkirk
2016-05-24Remove unused linker scriptsPaul Selkirk
2016-05-24Remove duplicate cli-test targetPaul Selkirk
2016-05-24non-working code to upload an application and jump to itFredrik Thulin
Committing my work in progress in case someone else wants to help.
2016-05-24make 'test sdram' take number of iterations as argumentFredrik Thulin
2016-05-23SDRAM initialization and test code from Pavel.Fredrik Thulin
Integrated into the cli-test program as such: cryptech> test sdram Initializing SDRAM Starting SDRAM test (n = 0) Run sequential write-then-read test for the first chip Run random write-then-read test for the first chip Run sequential write-then-read test for the second chip Run random write-then-read test for the second chip Run interleaved write-then-read test for both chips at once SDRAM test (n = 0) completed SDRAM test completed successfully cryptech>
2016-05-23commit bugfix from Pavel fixing initialization of the second SDRAM chipFredrik Thulin
2016-05-22reindent/reformat to closer resemble rest of code baseFredrik Thulin
2016-05-21Bugfix erasing sector 0.Fredrik Thulin
2016-05-21Add code to test reading, writing and erasing keystore data.Fredrik Thulin
2016-05-21Add code to access the keystore memory (SPI flash).Fredrik Thulin
2016-05-21Add some exciting defines to define commans in the CLI.Fredrik Thulin
Hopefully, having this excitement now makes adding commands a little bit less exciting from here on.
2016-05-20Add code to reset FPGA using FPGA_PROGRAM_B and FPGA_INIT_B.Fredrik Thulin
Also add code to erase FPGA config memory and check status of FPGA_DONE.
2016-05-20make really-clean was renamed to make distcleanFredrik Thulin
2016-05-19Fix a warning.Fredrik Thulin
2016-05-19Refactor FPGA bitstream upload code.Fredrik Thulin
Move the N25Q128 code to it's own file in order to be able to reuse it for the keystore memory code.
2016-05-18Add a small script to reset the STM32 CPU.Fredrik Thulin
2016-05-18Add FPGA bitstream upload command to cli-test.Fredrik Thulin
This code needs more error checking etc. but together with the Python script 'filetransfer', a new bitstream may be loaded into the FPGA config memory like this: filetransfer --fpga /path/to/bitstream The bitstream is identified by 'file' e.g. like this: alpha_test_top.bit: Xilinx BIT data - from alpha_test_top.ncd;UserID=0xFFFFFFFF - for 7a200tfbg484 - built 2016/05/12(13:59:24) - data length 0xe0164
2016-05-18Fix warningsFredrik Thulin