| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2016-05-26 | Figure out if the user (me) has a NUCLEO board. | Fredrik Thulin | |
| 2016-05-26 | Implement a bootloader. | Fredrik Thulin | |
| This bootloader is now the application at 0x08000000 (FLASH start), which the STM32 will execute upon reset. The other applications are now loaded at 0x08030000 (128 KB into the flash) and will never get started unless the bootloader has been programmed into flash too. | |||
| 2016-05-25 | More DFU code. This might actually work. | Fredrik Thulin | |
| The applications to be uploaded using 'dfu upload' have to have another FLASH defined in their linker script. Have to recompile some firmware tomorrow and test if this actually works. | |||
| 2016-05-25 | Merge remote-tracking branch 'origin/master' into ft-dfu-code-loading | Fredrik Thulin | |
| 2016-05-25 | remove non-free files we're not using anyways | Fredrik Thulin | |
| 2016-05-24 | Try harder to pick up updates from our submodules. | Paul Selkirk | |
| 2016-05-24 | #include stm32f4xx_hal.h since stm-fmc.h now references HAL symbols. | Paul Selkirk | |
| This has a knock-on effect in hal_io_fmc.c, but that's in another repo. | |||
| 2016-05-24 | Merge branch 'master' of git.cryptech.is:sw/stm32 | Paul Selkirk | |
| 2016-05-24 | Add test-mkmif | Paul Selkirk | |
| 2016-05-24 | Remove unused linker scripts | Paul Selkirk | |
| 2016-05-24 | Remove duplicate cli-test target | Paul Selkirk | |
| 2016-05-24 | non-working code to upload an application and jump to it | Fredrik Thulin | |
| Committing my work in progress in case someone else wants to help. | |||
| 2016-05-24 | make 'test sdram' take number of iterations as argument | Fredrik Thulin | |
| 2016-05-23 | SDRAM initialization and test code from Pavel. | Fredrik Thulin | |
| Integrated into the cli-test program as such: cryptech> test sdram Initializing SDRAM Starting SDRAM test (n = 0) Run sequential write-then-read test for the first chip Run random write-then-read test for the first chip Run sequential write-then-read test for the second chip Run random write-then-read test for the second chip Run interleaved write-then-read test for both chips at once SDRAM test (n = 0) completed SDRAM test completed successfully cryptech> | |||
| 2016-05-23 | commit bugfix from Pavel fixing initialization of the second SDRAM chip | Fredrik Thulin | |
| 2016-05-22 | reindent/reformat to closer resemble rest of code base | Fredrik Thulin | |
| 2016-05-21 | Bugfix erasing sector 0. | Fredrik Thulin | |
| 2016-05-21 | Add code to test reading, writing and erasing keystore data. | Fredrik Thulin | |
| 2016-05-21 | Add code to access the keystore memory (SPI flash). | Fredrik Thulin | |
| 2016-05-21 | Add some exciting defines to define commans in the CLI. | Fredrik Thulin | |
| Hopefully, having this excitement now makes adding commands a little bit less exciting from here on. | |||
| 2016-05-20 | Add code to reset FPGA using FPGA_PROGRAM_B and FPGA_INIT_B. | Fredrik Thulin | |
| Also add code to erase FPGA config memory and check status of FPGA_DONE. | |||
| 2016-05-20 | make really-clean was renamed to make distclean | Fredrik Thulin | |
| 2016-05-19 | Fix a warning. | Fredrik Thulin | |
| 2016-05-19 | Refactor FPGA bitstream upload code. | Fredrik Thulin | |
| Move the N25Q128 code to it's own file in order to be able to reuse it for the keystore memory code. | |||
| 2016-05-18 | Add a small script to reset the STM32 CPU. | Fredrik Thulin | |
| 2016-05-18 | Add FPGA bitstream upload command to cli-test. | Fredrik Thulin | |
| This code needs more error checking etc. but together with the Python script 'filetransfer', a new bitstream may be loaded into the FPGA config memory like this: filetransfer --fpga /path/to/bitstream The bitstream is identified by 'file' e.g. like this: alpha_test_top.bit: Xilinx BIT data - from alpha_test_top.ncd;UserID=0xFFFFFFFF - for 7a200tfbg484 - built 2016/05/12(13:59:24) - data length 0xe0164 | |||
| 2016-05-18 | Fix warnings | Fredrik Thulin | |
| 2016-05-18 | A little more robust file transfer | Fredrik Thulin | |
| 2016-05-18 | put some generic CLI code in mgmt-cli.c | Fredrik Thulin | |
| 2016-05-18 | Add reboot command. | Fredrik Thulin | |
| 2016-05-18 | Write in 4k-chunks, with acks for flow control. | Fredrik Thulin | |
| 2016-05-18 | FPGA config memory access code from Pavel. | Fredrik Thulin | |
| 2016-05-18 | correct LED pinouts for the Alpha | Fredrik Thulin | |
| 2016-05-18 | build libcli | Paul Selkirk | |
| 2016-05-18 | Use master branch on libhal. | Paul Selkirk | |
| 2016-05-16 | Use baud rate 921600 instead of 115200. | Fredrik Thulin | |
| Don't want to wait longer than necessary for firmware file transfers. | |||
| 2016-05-16 | Add code to talk with the external RTC chip. | Fredrik Thulin | |
| 2016-05-15 | add simple filetransfer poc | Fredrik Thulin | |
| 2016-05-14 | rename some defines | Fredrik Thulin | |
| 2016-05-14 | found paul is setting up HSE in TARGET_CRYPTECH_ALPHA | Fredrik Thulin | |
| 2016-05-14 | update FMC test for alpha | Fredrik Thulin | |
| 2016-05-13 | make cli-test | Fredrik Thulin | |
| 2016-05-13 | rename huart1 and huart2 to huart_mgmt and huart_user | Fredrik Thulin | |
| reduces risk of using the wrong one | |||
| 2016-05-13 | Add test program for libcli based CLI. | Fredrik Thulin | |
| 2016-05-13 | Implement support for the two UARTs on the alpha board. | Fredrik Thulin | |
| 2016-05-12 | Update LED pinouts, don't think the colors are right yet though. | Fredrik Thulin | |
| 2016-05-12 | Enable HSE (external clock oscillator). | Fredrik Thulin | |
| 2016-05-12 | Test both UARTs, and also test receiving data. | Fredrik Thulin | |
| 2016-05-12 | Add build target for the alpha | Fredrik Thulin | |
| 2016-04-24 | This time for sure - async receive, and everything that flows from that. | Paul Selkirk | |
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index : sw/stm32 | |
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