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Diffstat (limited to 'projects/cli-test/mgmt-fpga.c')
-rw-r--r--projects/cli-test/mgmt-fpga.c39
1 files changed, 31 insertions, 8 deletions
diff --git a/projects/cli-test/mgmt-fpga.c b/projects/cli-test/mgmt-fpga.c
index b1b0973..b913316 100644
--- a/projects/cli-test/mgmt-fpga.c
+++ b/projects/cli-test/mgmt-fpga.c
@@ -3,7 +3,7 @@
* -----------
* CLI code to manage the FPGA configuration etc.
*
- * Copyright (c) 2016, NORDUnet A/S All rights reserved.
+ * Copyright (c) 2016-2017, NORDUnet A/S All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
@@ -47,14 +47,21 @@ static volatile uint32_t dfu_offset = 0;
-static int _flash_write_callback(uint8_t *buf, size_t len)
+static HAL_StatusTypeDef _flash_write_callback(uint8_t *buf, size_t len)
{
+ HAL_StatusTypeDef res;
+
if ((dfu_offset % FPGACFG_SECTOR_SIZE) == 0)
/* first page in sector, need to erase sector */
- if (fpgacfg_erase_sector(dfu_offset / FPGACFG_SECTOR_SIZE) != 1)
- return CLI_ERROR;
+ if ((res = fpgacfg_erase_sector(dfu_offset / FPGACFG_SECTOR_SIZE)) != HAL_OK)
+ return res;
- int res = fpgacfg_write_data(dfu_offset, buf, BITSTREAM_UPLOAD_CHUNK_SIZE) == 1;
+ /* fpgacfg_write_data (a thin wrapper around n25q128_write_data)
+ * requires the offset and length to be page-aligned. The last chunk
+ * will be short, so we pad it out to the full chunk size.
+ */
+ len = len;
+ res = fpgacfg_write_data(dfu_offset, buf, BITSTREAM_UPLOAD_CHUNK_SIZE);
dfu_offset += BITSTREAM_UPLOAD_CHUNK_SIZE;
return res;
}
@@ -63,12 +70,16 @@ static int cmd_fpga_bitstream_upload(struct cli_def *cli, const char *command, c
{
uint8_t buf[BITSTREAM_UPLOAD_CHUNK_SIZE];
+ command = command;
+ argv = argv;
+ argc = argc;
+
dfu_offset = 0;
fpgacfg_access_control(ALLOW_ARM);
cli_print(cli, "Checking if FPGA config memory is accessible");
- if (fpgacfg_check_id() != 1) {
+ if (fpgacfg_check_id() != HAL_OK) {
cli_print(cli, "ERROR: FPGA config memory not accessible. Check that jumpers JP7 and JP8 are installed.");
return CLI_ERROR;
}
@@ -83,10 +94,14 @@ static int cmd_fpga_bitstream_upload(struct cli_def *cli, const char *command, c
static int cmd_fpga_bitstream_erase(struct cli_def *cli, const char *command, char *argv[], int argc)
{
+ command = command;
+ argv = argv;
+ argc = argc;
+
fpgacfg_access_control(ALLOW_ARM);
cli_print(cli, "Checking if FPGA config memory is accessible");
- if (fpgacfg_check_id() != 1) {
+ if (fpgacfg_check_id() != HAL_OK) {
cli_print(cli, "ERROR: FPGA config memory not accessible. Check that jumpers JP7 and JP8 are installed.");
return CLI_ERROR;
}
@@ -97,7 +112,7 @@ static int cmd_fpga_bitstream_erase(struct cli_def *cli, const char *command, ch
*
* This command could be made to accept an argument indicating the whole memory should be erased.
*/
- if (fpgacfg_erase_sector(0) != 0) {
+ if (fpgacfg_erase_sector(0) != HAL_OK) {
cli_print(cli, "Erasing first sector in FPGA config memory failed");
return CLI_ERROR;
}
@@ -110,6 +125,10 @@ static int cmd_fpga_bitstream_erase(struct cli_def *cli, const char *command, ch
static int cmd_fpga_reset(struct cli_def *cli, const char *command, char *argv[], int argc)
{
+ command = command;
+ argv = argv;
+ argc = argc;
+
fpgacfg_access_control(ALLOW_FPGA);
fpgacfg_reset_fpga(RESET_FULL);
cli_print(cli, "FPGA has been reset");
@@ -119,6 +138,10 @@ static int cmd_fpga_reset(struct cli_def *cli, const char *command, char *argv[]
static int cmd_fpga_reset_registers(struct cli_def *cli, const char *command, char *argv[], int argc)
{
+ command = command;
+ argv = argv;
+ argc = argc;
+
fpgacfg_access_control(ALLOW_FPGA);
fpgacfg_reset_fpga(RESET_REGISTERS);
cli_print(cli, "FPGA registers have been reset");