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| author | Rob Austein <sra@hactrn.net> | 2018-05-23 01:40:05 -0400 |
|---|---|---|
| committer | Rob Austein <sra@hactrn.net> | 2018-05-23 01:40:05 -0400 |
| commit | 9c603069e41bfe56b9a7f37e1e939db2f25bf710 (patch) | |
| tree | 42a47af4f06eeac252203af33ac693957c500442 /spiflash_n25q128.h | |
| parent | 85f1e04bdc3676c33d0534093ea89fc655b63500 (diff) | |
Simplify FMC I/O code.
We're no longer using a preemptive multitasker, and we're on the
Alpha, not the old bridge board, so all we really need to do is read
or write one word at a time via a pointer then wait for the GPIO idle
pin to light. Well, other than needing to read twice because of a
known hardware problem with the STM32.
So we dont need to fiddle with IRQ, or use the CMSIS SRAM lock, or....
Diffstat (limited to 'spiflash_n25q128.h')
0 files changed, 0 insertions, 0 deletions