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authorPaul Selkirk <paul@psgd.org>2016-08-23 11:02:49 -0400
committerPaul Selkirk <paul@psgd.org>2016-08-23 11:02:49 -0400
commit99c0a0a3b7e2b9f3222e93190564724e6177a6f2 (patch)
tree5e978c2a6786a7c8071b32b30c725472d2aec3b9 /projects/rtos-test/Makefile
parent6f00eb15959b916f725a1768c6ce71c02e43909e (diff)
Reset table of cores after resetting FPGA from CLI.
Diffstat (limited to 'projects/rtos-test/Makefile')
0 files changed, 0 insertions, 0 deletions