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authorPaul Selkirk <paul@psgd.org>2016-07-06 14:49:06 -0400
committerPaul Selkirk <paul@psgd.org>2016-07-06 14:49:06 -0400
commitd60fa7aea472a53315189af2a21419b210833f36 (patch)
treef61cc3a8f19e053d6bffeef303e2db47f4876304 /projects/hsm/mgmt-fpga.c
parent7edf6494434008d6c0330d413ccdc00eeb956cd9 (diff)
Add 'show fpga status' and 'show fpga cores'.
Diffstat (limited to 'projects/hsm/mgmt-fpga.c')
-rw-r--r--projects/hsm/mgmt-fpga.c27
1 files changed, 27 insertions, 0 deletions
diff --git a/projects/hsm/mgmt-fpga.c b/projects/hsm/mgmt-fpga.c
index b74392e..45bd33c 100644
--- a/projects/hsm/mgmt-fpga.c
+++ b/projects/hsm/mgmt-fpga.c
@@ -133,10 +133,37 @@ static int cmd_fpga_reset_registers(struct cli_def *cli, const char *command, ch
return CLI_OK;
}
+static int cmd_fpga_show_status(struct cli_def *cli, const char *command, char *argv[], int argc)
+{
+ cli_print(cli, "FPGA has %sloaded a bitstream", fpgacfg_check_done() ? "":"NOT ");
+ return CLI_OK;
+}
+
+static int cmd_fpga_show_cores(struct cli_def *cli, const char *command, char *argv[], int argc)
+{
+ const hal_core_t *core;
+ const hal_core_info_t *info;
+
+ for (core = hal_core_iterate(NULL); core != NULL; core = hal_core_iterate(core)) {
+ info = hal_core_info(core);
+ cli_print(cli, "%04x: %8.8s %4.4s",
+ (unsigned int)info->base, info->name, info->version);
+ }
+
+ return CLI_OK;
+}
+
void configure_cli_fpga(struct cli_def *cli)
{
/* fpga */
cli_command_root(fpga);
+
+ cli_command_branch(fpga, show);
+ /* show fpga status*/
+ cli_command_node(fpga_show, status, "Show status about the FPGA");
+ /* show fpga cores*/
+ cli_command_node(fpga_show, cores, "Show FPGA core names and versions");
+
/* fpga reset */
cli_command_node(fpga, reset, "Reset FPGA (config reset)");
/* fpga reset registers */