diff options
author | Paul Selkirk <paul@psgd.org> | 2017-10-15 21:34:00 -0400 |
---|---|---|
committer | Paul Selkirk <paul@psgd.org> | 2017-10-15 21:34:00 -0400 |
commit | 5af4a915edf3e77705fa2625081200b61f8dda26 (patch) | |
tree | 46d8e3cc6e27627e9f3e78c5a0b4a3573d1b1de3 | |
parent | b159bf0bb24a99c7d3ff1b3855f840add63198e5 (diff) |
Cleanup: All drivers return HAL_StatusTypeDef rather than magic values.
Note: This affects libhal/ks_token.c, which uses the keystore driver directly.
-rw-r--r-- | projects/board-test/keystore-perf.c | 22 | ||||
-rw-r--r-- | projects/board-test/spiflash-perf.c | 16 | ||||
-rw-r--r-- | projects/cli-test/mgmt-fpga.c | 16 | ||||
-rw-r--r-- | projects/cli-test/mgmt-keystore.c | 6 | ||||
-rw-r--r-- | projects/cli-test/mgmt-misc.c | 6 | ||||
-rw-r--r-- | projects/cli-test/mgmt-misc.h | 2 | ||||
-rw-r--r-- | projects/cli-test/mgmt-show.c | 14 | ||||
-rw-r--r-- | projects/cli-test/test-mkmif.c | 32 | ||||
-rw-r--r-- | projects/hsm/mgmt-bootloader.c | 7 | ||||
-rw-r--r-- | projects/hsm/mgmt-firmware.c | 1 | ||||
-rw-r--r-- | projects/hsm/mgmt-fpga.c | 18 | ||||
-rw-r--r-- | projects/hsm/mgmt-keystore.c | 4 | ||||
-rw-r--r-- | projects/hsm/mgmt-misc.c | 2 | ||||
-rw-r--r-- | projects/hsm/mgmt-misc.h | 3 | ||||
-rw-r--r-- | spiflash_n25q128.c | 166 | ||||
-rw-r--r-- | spiflash_n25q128.h | 14 | ||||
-rw-r--r-- | stm-flash.c | 39 | ||||
-rw-r--r-- | stm-flash.h | 7 | ||||
-rw-r--r-- | stm-fmc.c | 32 | ||||
-rw-r--r-- | stm-fmc.h | 4 | ||||
-rw-r--r-- | stm-fpgacfg.c | 11 | ||||
-rw-r--r-- | stm-fpgacfg.h | 8 | ||||
-rw-r--r-- | stm-keystore.c | 26 | ||||
-rw-r--r-- | stm-keystore.h | 15 | ||||
-rw-r--r-- | stm-rtc.c | 2 |
25 files changed, 210 insertions, 263 deletions
diff --git a/projects/board-test/keystore-perf.c b/projects/board-test/keystore-perf.c index 09528a2..3552d30 100644 --- a/projects/board-test/keystore-perf.c +++ b/projects/board-test/keystore-perf.c @@ -16,11 +16,11 @@ static void test_read_data(void) { uint8_t read_buf[KEYSTORE_SUBSECTOR_SIZE]; uint32_t i; - int err; + HAL_StatusTypeDef err; for (i = 0; i < KEYSTORE_NUM_SUBSECTORS; ++i) { err = keystore_read_data(i * KEYSTORE_SUBSECTOR_SIZE, read_buf, KEYSTORE_SUBSECTOR_SIZE); - if (err != 1) { + if (err != HAL_OK) { uart_send_string("ERROR: keystore_read_data returned "); uart_send_integer(err, 0); uart_send_string("\r\n"); @@ -36,11 +36,11 @@ static void _read_verify(uint8_t *vrfy_buf) { uint8_t read_buf[KEYSTORE_SUBSECTOR_SIZE]; uint32_t i; - int err; + HAL_StatusTypeDef err; for (i = 0; i < KEYSTORE_NUM_SUBSECTORS; ++i) { err = keystore_read_data(i * KEYSTORE_SUBSECTOR_SIZE, read_buf, KEYSTORE_SUBSECTOR_SIZE); - if (err != 1) { + if (err != HAL_OK) { uart_send_string("ERROR: keystore_read_data returned "); uart_send_integer(err, 0); uart_send_string("\r\n"); @@ -61,11 +61,11 @@ static void _read_verify(uint8_t *vrfy_buf) static void test_erase_sector(void) { uint32_t i; - int err; + HAL_StatusTypeDef err; for (i = 0; i < KEYSTORE_NUM_SECTORS; ++i) { err = keystore_erase_sector(i); - if (err != 1) { + if (err != HAL_OK) { uart_send_string("ERROR: keystore_erase_sector returned "); uart_send_integer(err, 0); uart_send_string("\r\n"); @@ -80,11 +80,11 @@ static void test_erase_sector(void) static void test_erase_subsector(void) { uint32_t i; - int err; + HAL_StatusTypeDef err; for (i = 0; i < KEYSTORE_NUM_SUBSECTORS; ++i) { err = keystore_erase_subsector(i); - if (err != 1) { + if (err != HAL_OK) { uart_send_string("ERROR: keystore_erase_subsector returned "); uart_send_integer(err, 0); uart_send_string("\r\n"); @@ -114,14 +114,14 @@ static void test_write_data(void) { uint8_t write_buf[KEYSTORE_SUBSECTOR_SIZE]; uint32_t i; - int err; + HAL_StatusTypeDef err; for (i = 0; i < sizeof(write_buf); ++i) write_buf[i] = i & 0xFF; for (i = 0; i < KEYSTORE_NUM_SUBSECTORS; ++i) { err = keystore_write_data(i * KEYSTORE_SUBSECTOR_SIZE, write_buf, KEYSTORE_SUBSECTOR_SIZE); - if (err != 1) { + if (err != HAL_OK) { uart_send_string("ERROR: keystore_write_data returned "); uart_send_integer(err, 0); uart_send_string(" for subsector "); @@ -179,7 +179,7 @@ int main(void) stm_init(); uart_set_default(STM_UART_MGMT); - if (keystore_check_id() != 1) { + if (keystore_check_id() != HAL_OK) { uart_send_string("ERROR: keystore_check_id failed\r\n"); return 0; } diff --git a/projects/board-test/spiflash-perf.c b/projects/board-test/spiflash-perf.c index 53f29cb..2691504 100644 --- a/projects/board-test/spiflash-perf.c +++ b/projects/board-test/spiflash-perf.c @@ -33,7 +33,7 @@ static void test_read_page(void) for (i = 0; i < N25Q128_NUM_PAGES; ++i) { err = n25q128_read_page(ctx, i, read_buf); - if (err != 1) { + if (err != HAL_OK) { uart_send_string("ERROR: n25q128_read_page returned "); uart_send_integer(err, 0); uart_send_string("\r\n"); @@ -53,7 +53,7 @@ static void test_read_subsector(void) for (i = 0; i < N25Q128_NUM_SUBSECTORS; ++i) { err = n25q128_read_subsector(ctx, i, read_buf); - if (err != 1) { + if (err != HAL_OK) { uart_send_string("ERROR: n25q128_read_subsector returned "); uart_send_integer(err, 0); uart_send_string("\r\n"); @@ -75,7 +75,7 @@ static void _read_verify(uint8_t *vrfy_buf) for (i = 0; i < N25Q128_NUM_PAGES; ++i) { err = n25q128_read_page(ctx, i, read_buf); - if (err != 1) { + if (err != HAL_OK) { uart_send_string("ERROR: n25q128_read_page returned "); uart_send_integer(err, 0); uart_send_string("\r\n"); @@ -100,7 +100,7 @@ static void test_erase_sector(void) for (i = 0; i < N25Q128_NUM_SECTORS; ++i) { err = n25q128_erase_sector(ctx, i); - if (err != 1) { + if (err != HAL_OK) { uart_send_string("ERROR: n25q128_erase_sector returned "); uart_send_integer(err, 0); uart_send_string("\r\n"); @@ -119,7 +119,7 @@ static void test_erase_subsector(void) for (i = 0; i < N25Q128_NUM_SUBSECTORS; ++i) { err = n25q128_erase_subsector(ctx, i); - if (err != 1) { + if (err != HAL_OK) { uart_send_string("ERROR: n25q128_erase_subsector returned "); uart_send_integer(err, 0); uart_send_string("\r\n"); @@ -136,7 +136,7 @@ static void test_erase_bulk(void) int err; err = n25q128_erase_bulk(ctx); - if (err != 1) { + if (err != HAL_OK) { uart_send_string("ERROR: n25q128_erase_bulk returned "); uart_send_integer(err, 0); uart_send_string("\r\n"); @@ -171,7 +171,7 @@ static void test_write_page(void) for (i = 0; i < N25Q128_NUM_PAGES; ++i) { err = n25q128_write_page(ctx, i, write_buf); - if (err != 1) { + if (err != HAL_OK) { uart_send_string("ERROR: n25q128_write_page returned "); uart_send_integer(err, 0); uart_send_string(" for page "); @@ -229,7 +229,7 @@ int main(void) stm_init(); uart_set_default(STM_UART_MGMT); - if (n25q128_check_id(ctx) != 1) { + if (n25q128_check_id(ctx) != HAL_OK) { uart_send_string("ERROR: n25q128_check_id failed\r\n"); return 0; } diff --git a/projects/cli-test/mgmt-fpga.c b/projects/cli-test/mgmt-fpga.c index da539f1..a307436 100644 --- a/projects/cli-test/mgmt-fpga.c +++ b/projects/cli-test/mgmt-fpga.c @@ -47,14 +47,16 @@ static volatile uint32_t dfu_offset = 0; -static int _flash_write_callback(uint8_t *buf, size_t len) +static HAL_StatusTypeDef _flash_write_callback(uint8_t *buf, size_t len) { + HAL_StatusTypeDef res; + if ((dfu_offset % FPGACFG_SECTOR_SIZE) == 0) /* first page in sector, need to erase sector */ - if (fpgacfg_erase_sector(dfu_offset / FPGACFG_SECTOR_SIZE) != 1) - return CLI_ERROR; + if ((res = fpgacfg_erase_sector(dfu_offset / FPGACFG_SECTOR_SIZE)) != HAL_OK) + return res; - int res = fpgacfg_write_data(dfu_offset, buf, len) == 1; + res = fpgacfg_write_data(dfu_offset, buf, len); dfu_offset += len; return res; } @@ -72,7 +74,7 @@ static int cmd_fpga_bitstream_upload(struct cli_def *cli, const char *command, c fpgacfg_access_control(ALLOW_ARM); cli_print(cli, "Checking if FPGA config memory is accessible"); - if (fpgacfg_check_id() != 1) { + if (fpgacfg_check_id() != HAL_OK) { cli_print(cli, "ERROR: FPGA config memory not accessible. Check that jumpers JP7 and JP8 are installed."); return CLI_ERROR; } @@ -94,7 +96,7 @@ static int cmd_fpga_bitstream_erase(struct cli_def *cli, const char *command, ch fpgacfg_access_control(ALLOW_ARM); cli_print(cli, "Checking if FPGA config memory is accessible"); - if (fpgacfg_check_id() != 1) { + if (fpgacfg_check_id() != HAL_OK) { cli_print(cli, "ERROR: FPGA config memory not accessible. Check that jumpers JP7 and JP8 are installed."); return CLI_ERROR; } @@ -105,7 +107,7 @@ static int cmd_fpga_bitstream_erase(struct cli_def *cli, const char *command, ch * * This command could be made to accept an argument indicating the whole memory should be erased. */ - if (fpgacfg_erase_sector(0) != 0) { + if (fpgacfg_erase_sector(0) != HAL_OK) { cli_print(cli, "Erasing first sector in FPGA config memory failed"); return CLI_ERROR; } diff --git a/projects/cli-test/mgmt-keystore.c b/projects/cli-test/mgmt-keystore.c index ea1f263..8c16f35 100644 --- a/projects/cli-test/mgmt-keystore.c +++ b/projects/cli-test/mgmt-keystore.c @@ -228,12 +228,12 @@ static int cmd_keystore_show_data(struct cli_def *cli, const char *command, char argv = argv; argc = argc; - if (keystore_check_id() != 1) { + if (keystore_check_id() != CMSIS_HAL_OK) { cli_print(cli, "ERROR: The keystore memory is not accessible."); } memset(buf, 0, sizeof(buf)); - if ((i = keystore_read_data(0, buf, sizeof(buf))) != 1) { + if ((i = keystore_read_data(0, buf, sizeof(buf))) != CMSIS_HAL_OK) { cli_print(cli, "Failed reading first page from keystore memory: %li", i); return CLI_ERROR; } @@ -355,7 +355,7 @@ static int cmd_keystore_erase(struct cli_def *cli, const char *command, char *ar } cli_print(cli, "OK, erasing keystore, this might take a while..."); - if ((status = keystore_erase_bulk()) != 1) { + if ((status = keystore_erase_bulk()) != CMSIS_HAL_OK) { cli_print(cli, "Failed erasing token keystore: %i", status); return CLI_ERROR; } diff --git a/projects/cli-test/mgmt-misc.c b/projects/cli-test/mgmt-misc.c index 4be9a4b..1216bd5 100644 --- a/projects/cli-test/mgmt-misc.c +++ b/projects/cli-test/mgmt-misc.c @@ -49,9 +49,9 @@ static volatile hal_crc32_t demo_crc; -static int _count_bytes_callback(uint8_t *buf, size_t len) { +static HAL_StatusTypeDef _count_bytes_callback(uint8_t *buf, size_t len) { demo_crc = hal_crc32_update(demo_crc, buf, len); - return 1; + return CMSIS_HAL_OK; } int cli_receive_data(struct cli_def *cli, uint8_t *buf, size_t len, cli_data_callback data_callback) @@ -92,7 +92,7 @@ int cli_receive_data(struct cli_def *cli, uint8_t *buf, size_t len, cli_data_cal /* After reception of a chunk but before ACKing we have "all" the time in the world to * calculate CRC and invoke the data_callback. */ - if (data_callback != NULL && ! data_callback(buf, (size_t) n)) { + if (data_callback != NULL && data_callback(buf, n) != CMSIS_HAL_OK) { cli_print(cli, "Data processing failed"); goto fail; } diff --git a/projects/cli-test/mgmt-misc.h b/projects/cli-test/mgmt-misc.h index c549f63..c0581c9 100644 --- a/projects/cli-test/mgmt-misc.h +++ b/projects/cli-test/mgmt-misc.h @@ -39,7 +39,7 @@ #define FILETRANSFER_UPLOAD_CHUNK_SIZE 256 -typedef int (*cli_data_callback)(uint8_t *, size_t); +typedef HAL_StatusTypeDef (*cli_data_callback)(uint8_t *, size_t); extern int cli_receive_data(struct cli_def *cli, uint8_t *buf, size_t len, cli_data_callback data_callback); diff --git a/projects/cli-test/mgmt-show.c b/projects/cli-test/mgmt-show.c index e829744..e276b15 100644 --- a/projects/cli-test/mgmt-show.c +++ b/projects/cli-test/mgmt-show.c @@ -73,7 +73,7 @@ static int cmd_show_fpga_status(struct cli_def *cli, const char *command, char * argv = argv; argc = argc; - cli_print(cli, "FPGA has %sloaded a bitstream", fpgacfg_check_done() ? "":"NOT "); + cli_print(cli, "FPGA has %sloaded a bitstream", (fpgacfg_check_done() == CMSIS_HAL_OK) ? "":"NOT "); return CLI_OK; } @@ -86,7 +86,7 @@ static int cmd_show_fpga_cores(struct cli_def *cli, const char *command, char *a argv = argv; argc = argc; - if (! fpgacfg_check_done()) { + if (fpgacfg_check_done() != CMSIS_HAL_OK) { cli_print(cli, "FPGA has not loaded a bitstream"); return CLI_OK; } @@ -106,7 +106,7 @@ static int cmd_show_keystore_status(struct cli_def *cli, const char *command, ch argv = argv; argc = argc; - cli_print(cli, "Keystore memory is %sonline", (keystore_check_id() != 1) ? "NOT ":""); + cli_print(cli, "Keystore memory is %sonline", (keystore_check_id() == CMSIS_HAL_OK) ? "":"NOT "); return CLI_OK; } @@ -119,12 +119,12 @@ static int cmd_show_keystore_data(struct cli_def *cli, const char *command, char argv = argv; argc = argc; - if (keystore_check_id() != 1) { + if (keystore_check_id() != CMSIS_HAL_OK) { cli_print(cli, "ERROR: The keystore memory is not accessible."); } memset(buf, 0, sizeof(buf)); - if ((i = keystore_read_data(0, buf, sizeof(buf))) != 1) { + if ((i = keystore_read_data(0, buf, sizeof(buf))) != CMSIS_HAL_OK) { cli_print(cli, "Failed reading first page from keystore memory: %li", i); return CLI_ERROR; } @@ -145,14 +145,14 @@ static int cmd_show_keystore_data(struct cli_def *cli, const char *command, char if (buf[i] == 0xff) { cli_print(cli, "Tombstoning byte %li", i); buf[i] = 0x55; - if ((i = keystore_write_data(0, buf, sizeof(buf))) != 1) { + if ((i = keystore_write_data(0, buf, sizeof(buf))) != CMSIS_HAL_OK) { cli_print(cli, "Failed writing data at offset 0: %li", i); return CLI_ERROR; } } } else { cli_print(cli, "Erasing first sector since all the first 8 bytes are tombstones"); - if ((i = keystore_erase_sector(0)) != 1) { + if ((i = keystore_erase_sector(0)) != CMSIS_HAL_OK) { cli_print(cli, "Failed erasing the first sector: %li", i); return CLI_ERROR; } diff --git a/projects/cli-test/test-mkmif.c b/projects/cli-test/test-mkmif.c index 6321dde..cd71040 100644 --- a/projects/cli-test/test-mkmif.c +++ b/projects/cli-test/test-mkmif.c @@ -32,18 +32,18 @@ static hal_error_t sclk_test(struct cli_def *cli, hal_core_t *core, const uint32 uint32_t readback; hal_error_t err; - cli_print(cli, "Trying to adjust the clockspeed (divisor %x).\n", (unsigned int) divisor); + cli_print(cli, "Trying to adjust the clockspeed (divisor %x).", (unsigned int) divisor); if ((err = hal_mkmif_set_clockspeed(core, divisor)) != LIBHAL_OK) { - cli_print(cli, "hal_mkmif_set_clockspeed: %s\n", hal_error_string(err)); + cli_print(cli, "hal_mkmif_set_clockspeed: %s", hal_error_string(err)); return err; } if ((err = hal_mkmif_get_clockspeed(core, &readback)) != LIBHAL_OK) { - cli_print(cli, "hal_mkmif_get_clockspeed: %s\n", hal_error_string(err)); + cli_print(cli, "hal_mkmif_get_clockspeed: %s", hal_error_string(err)); return err; } if (readback != divisor) { - cli_print(cli, "expected %x, got %x\n", (unsigned int)divisor, (unsigned int)readback); + cli_print(cli, "expected %x, got %x", (unsigned int)divisor, (unsigned int)readback); return HAL_ERROR_IO_UNEXPECTED; } return LIBHAL_OK; @@ -53,10 +53,10 @@ static hal_error_t init_test(struct cli_def *cli, hal_core_t *core) { hal_error_t err; - cli_print(cli, "Trying to init to the memory in continuous mode.\n"); + cli_print(cli, "Trying to init to the memory in continuous mode."); if ((err = hal_mkmif_init(core)) != LIBHAL_OK) { - cli_print(cli, "hal_mkmif_init: %s\n", hal_error_string(err)); + cli_print(cli, "hal_mkmif_init: %s", hal_error_string(err)); return err; } @@ -74,11 +74,11 @@ static hal_error_t write_test(struct cli_def *cli, hal_core_t *core) i < 0x10; write_data += 0x01010101, write_address += 4, ++i) { - cli_print(cli, "Trying to write 0x%08x to memory address 0x%08x.\n", + cli_print(cli, "Trying to write 0x%08x to memory address 0x%08x.", (unsigned int)write_data, (unsigned int)write_address); if ((err = hal_mkmif_write_word(core, write_address, write_data)) != LIBHAL_OK) { - cli_print(cli, "hal_mkmif_write: %s\n", hal_error_string(err)); + cli_print(cli, "hal_mkmif_write: %s", hal_error_string(err)); return err; } } @@ -97,13 +97,13 @@ static hal_error_t read_test(struct cli_def *cli, hal_core_t *core) i < 0x10; read_address += 4, ++i) { - cli_print(cli, "Trying to read from memory address 0x%08x.\n", (unsigned int)read_address); + cli_print(cli, "Trying to read from memory address 0x%08x.", (unsigned int)read_address); if ((err = hal_mkmif_read_word(core, read_address, &read_data)) != LIBHAL_OK) { - cli_print(cli, "hal_mkmif_read: %s\n", hal_error_string(err)); + cli_print(cli, "hal_mkmif_read: %s", hal_error_string(err)); return err; } - cli_print(cli, "Data read: 0x%08x\n", (unsigned int)read_data); + cli_print(cli, "Data read: 0x%08x", (unsigned int)read_data); } return LIBHAL_OK; @@ -115,22 +115,22 @@ static hal_error_t write_read_test(struct cli_def *cli, hal_core_t *core) uint32_t readback; hal_error_t err; - cli_print(cli, "Trying to write 0xdeadbeef to the memory and then read back.\n"); + cli_print(cli, "Trying to write 0xdeadbeef to the memory and then read back."); data = 0xdeadbeef; if ((err = hal_mkmif_write_word(core, 0x00000000, data)) != LIBHAL_OK) { - cli_print(cli, "write error: %s\n", hal_error_string(err)); + cli_print(cli, "write error: %s", hal_error_string(err)); return err; } if ((err = hal_mkmif_read_word(core, 0x00000000, &readback)) != LIBHAL_OK) { - cli_print(cli, "read error: %s\n", hal_error_string(err)); + cli_print(cli, "read error: %s", hal_error_string(err)); return err; } if (readback != data) { - cli_print(cli, "read %08x, expected %08x\n", (unsigned int)readback, (unsigned int)data); + cli_print(cli, "read %08x, expected %08x", (unsigned int)readback, (unsigned int)data); return HAL_ERROR_IO_UNEXPECTED; } @@ -147,7 +147,7 @@ int cmd_test_mkmif(struct cli_def *cli, const char *command, char *argv[], int a argc = argc; if (core == NULL) { - cli_print(cli, "MKMIF core not present, not testing.\n"); + cli_print(cli, "MKMIF core not present, not testing."); return HAL_ERROR_CORE_NOT_FOUND; } diff --git a/projects/hsm/mgmt-bootloader.c b/projects/hsm/mgmt-bootloader.c index ce24560..1d8b8ad 100644 --- a/projects/hsm/mgmt-bootloader.c +++ b/projects/hsm/mgmt-bootloader.c @@ -50,12 +50,11 @@ extern hal_user_t user; static uint32_t dfu_offset; -static int _flash_write_callback(uint8_t *buf, size_t len) +static HAL_StatusTypeDef _flash_write_callback(uint8_t *buf, size_t len) { - if (stm_flash_write32(dfu_offset, (uint32_t *)buf, (uint32_t)len/4) != 1) - return 0; + HAL_StatusTypeDef status = stm_flash_write32(dfu_offset, (uint32_t *)buf, len/4); dfu_offset += DFU_UPLOAD_CHUNK_SIZE; - return 1; + return status; } static int cmd_bootloader_upload(struct cli_def *cli, const char *command, char *argv[], int argc) diff --git a/projects/hsm/mgmt-firmware.c b/projects/hsm/mgmt-firmware.c index 85eb78b..b6b3321 100644 --- a/projects/hsm/mgmt-firmware.c +++ b/projects/hsm/mgmt-firmware.c @@ -36,7 +36,6 @@ #define HAL_OK CMSIS_HAL_OK #include "stm-init.h" #include "stm-uart.h" -#include "stm-flash.h" #include "mgmt-cli.h" diff --git a/projects/hsm/mgmt-fpga.c b/projects/hsm/mgmt-fpga.c index f6c6f20..b535b1d 100644 --- a/projects/hsm/mgmt-fpga.c +++ b/projects/hsm/mgmt-fpga.c @@ -55,14 +55,16 @@ extern hal_user_t user; static volatile uint32_t dfu_offset = 0; -static int _flash_write_callback(uint8_t *buf, size_t len) +static HAL_StatusTypeDef _flash_write_callback(uint8_t *buf, size_t len) { + HAL_StatusTypeDef res; + if ((dfu_offset % FPGACFG_SECTOR_SIZE) == 0) /* first page in sector, need to erase sector */ - if (fpgacfg_erase_sector(dfu_offset / FPGACFG_SECTOR_SIZE) != 1) - return CLI_ERROR; + if ((res = fpgacfg_erase_sector(dfu_offset / FPGACFG_SECTOR_SIZE)) != CMSIS_HAL_OK) + return res; - int res = fpgacfg_write_data(dfu_offset, buf, len) == 1; + res = fpgacfg_write_data(dfu_offset, buf, len); dfu_offset += len; return res; } @@ -85,7 +87,7 @@ static int cmd_fpga_bitstream_upload(struct cli_def *cli, const char *command, c fpgacfg_access_control(ALLOW_ARM); cli_print(cli, "Checking if FPGA config memory is accessible"); - if (fpgacfg_check_id() != 1) { + if (fpgacfg_check_id() != CMSIS_HAL_OK) { cli_print(cli, "ERROR: FPGA config memory not accessible. Check that jumpers JP7 and JP8 are installed."); return CLI_ERROR; } @@ -107,7 +109,7 @@ static int cmd_fpga_bitstream_erase(struct cli_def *cli, const char *command, ch fpgacfg_access_control(ALLOW_ARM); cli_print(cli, "Checking if FPGA config memory is accessible"); - if (fpgacfg_check_id() != 1) { + if (fpgacfg_check_id() != CMSIS_HAL_OK) { cli_print(cli, "ERROR: FPGA config memory not accessible. Check that jumpers JP7 and JP8 are installed."); return CLI_ERROR; } @@ -118,7 +120,7 @@ static int cmd_fpga_bitstream_erase(struct cli_def *cli, const char *command, ch * * This command could be made to accept an argument indicating the whole memory should be erased. */ - if (fpgacfg_erase_sector(0) != 0) { + if (fpgacfg_erase_sector(0) != CMSIS_HAL_OK) { cli_print(cli, "Erasing first sector in FPGA config memory failed"); return CLI_ERROR; } @@ -152,7 +154,7 @@ static int cmd_fpga_show_cores(struct cli_def *cli, const char *command, char *a argv = argv; argc = argc; - if (! fpgacfg_check_done()) { + if (fpgacfg_check_done() != CMSIS_HAL_OK) { cli_print(cli, "FPGA has not loaded a bitstream"); return CLI_OK; } diff --git a/projects/hsm/mgmt-keystore.c b/projects/hsm/mgmt-keystore.c index 100c428..b79a5fe 100644 --- a/projects/hsm/mgmt-keystore.c +++ b/projects/hsm/mgmt-keystore.c @@ -303,7 +303,7 @@ static int cmd_keystore_show_keys(struct cli_def *cli, const char *command, char static int cmd_keystore_erase(struct cli_def *cli, const char *command, char *argv[], int argc) { hal_error_t err; - int status; + HAL_StatusTypeDef status; command = command; @@ -313,7 +313,7 @@ static int cmd_keystore_erase(struct cli_def *cli, const char *command, char *ar } cli_print(cli, "OK, erasing keystore, this will take about 45 seconds..."); - if ((status = keystore_erase_bulk()) != 1) { + if ((status = keystore_erase_bulk()) != CMSIS_HAL_OK) { cli_print(cli, "Failed erasing token keystore: %i", status); return CLI_ERROR; } diff --git a/projects/hsm/mgmt-misc.c b/projects/hsm/mgmt-misc.c index e834b7d..65da7ff 100644 --- a/projects/hsm/mgmt-misc.c +++ b/projects/hsm/mgmt-misc.c @@ -85,7 +85,7 @@ int cli_receive_data(struct cli_def *cli, uint8_t *buf, size_t len, cli_data_cal /* After reception of a chunk but before ACKing we have "all" the time in the world to * calculate CRC and invoke the data_callback. */ - if (data_callback != NULL && ! data_callback(buf, (size_t) n)) { + if (data_callback != NULL && data_callback(buf, n) != CMSIS_HAL_OK) { cli_print(cli, "Data processing failed"); goto okay; } diff --git a/projects/hsm/mgmt-misc.h b/projects/hsm/mgmt-misc.h index 862ca0c..ef63a9e 100644 --- a/projects/hsm/mgmt-misc.h +++ b/projects/hsm/mgmt-misc.h @@ -37,7 +37,8 @@ #include <libcli.h> -typedef int (*cli_data_callback)(uint8_t *, size_t); +/* Write a chunk of received data to flash. */ +typedef HAL_StatusTypeDef (*cli_data_callback)(uint8_t *, size_t); extern int cli_receive_data(struct cli_def *cli, uint8_t *buf, size_t len, cli_data_callback data_callback); diff --git a/spiflash_n25q128.c b/spiflash_n25q128.c index 5c4a3b2..5e10185 100644 --- a/spiflash_n25q128.c +++ b/spiflash_n25q128.c @@ -62,9 +62,6 @@ static inline int _n25q128_get_status_bit(struct spiflash_ctx *ctx, unsigned bit uint8_t spi_tx[2]; uint8_t spi_rx[2]; - // result - HAL_StatusTypeDef ok; - //assert(bitnum < sizeof(uint8_t)); // send READ STATUS command @@ -72,11 +69,12 @@ static inline int _n25q128_get_status_bit(struct spiflash_ctx *ctx, unsigned bit // send command, read response, deselect _n25q128_select(ctx); - ok = HAL_SPI_TransmitReceive(ctx->hspi, spi_tx, spi_rx, 2, N25Q128_SPI_TIMEOUT); + int ok = + HAL_SPI_TransmitReceive(ctx->hspi, spi_tx, spi_rx, 2, N25Q128_SPI_TIMEOUT) == HAL_OK; _n25q128_deselect(ctx); // check - if (ok != HAL_OK) return -1; + if (!ok) return -1; // done return ((spi_rx[1] >> bitnum) & 1); @@ -95,89 +93,85 @@ static inline int _n25q128_get_wip_flag(struct spiflash_ctx *ctx) } /* Wait until the flash memory is done writing */ -static int _n25q128_wait_while_wip(struct spiflash_ctx *ctx, uint32_t timeout) +static HAL_StatusTypeDef _n25q128_wait_while_wip(struct spiflash_ctx *ctx, uint32_t timeout) { uint32_t tick_end = HAL_GetTick() + timeout; - int i; do { - i = _n25q128_get_wip_flag(ctx); - if (i < 0) return 0; - if (! i) return 1; + switch (_n25q128_get_wip_flag(ctx)) { + case 0: + return HAL_OK; + case -1: + return HAL_ERROR; + default: + /* try again */ + continue; + } } while (HAL_GetTick() < tick_end); - return 0; + return HAL_TIMEOUT; } /* Send the Write Enable command */ -static int _n25q128_write_enable(struct spiflash_ctx *ctx) +static HAL_StatusTypeDef _n25q128_write_enable(struct spiflash_ctx *ctx) { // tx buffer uint8_t spi_tx[1]; - // result - HAL_StatusTypeDef ok; - // enable writing spi_tx[0] = N25Q128_COMMAND_WRITE_ENABLE; // activate, send command, deselect _n25q128_select(ctx); - ok = HAL_SPI_Transmit(ctx->hspi, spi_tx, 1, N25Q128_SPI_TIMEOUT); + int ok = + HAL_SPI_Transmit(ctx->hspi, spi_tx, 1, N25Q128_SPI_TIMEOUT) == HAL_OK; _n25q128_deselect(ctx); // check - if (ok != HAL_OK) return -1; + if (!ok) return HAL_ERROR; // make sure, that write enable did the job - return _n25q128_get_wel_flag(ctx); + return _n25q128_get_wel_flag(ctx) ? HAL_OK : HAL_ERROR; } -int n25q128_check_id(struct spiflash_ctx *ctx) +HAL_StatusTypeDef n25q128_check_id(struct spiflash_ctx *ctx) { // tx, rx buffers uint8_t spi_tx[4]; uint8_t spi_rx[4]; - // result - HAL_StatusTypeDef ok; - // send READ ID command spi_tx[0] = N25Q128_COMMAND_READ_ID; // select, send command & read response, deselect _n25q128_select(ctx); - ok = HAL_SPI_TransmitReceive(ctx->hspi, spi_tx, spi_rx, 4, N25Q128_SPI_TIMEOUT); + int ok = + HAL_SPI_TransmitReceive(ctx->hspi, spi_tx, spi_rx, 4, N25Q128_SPI_TIMEOUT) == HAL_OK; _n25q128_deselect(ctx); // check - if (ok != HAL_OK) return 0; + if (!ok) return HAL_ERROR; // parse response (note, that the very first byte was received during the // transfer of the command byte, so it contains garbage and should // be ignored here) - if (spi_rx[1] != N25Q128_ID_MANUFACTURER) return 0; - if (spi_rx[2] != N25Q128_ID_DEVICE_TYPE) return 0; - if (spi_rx[3] != N25Q128_ID_DEVICE_CAPACITY) return 0; - - // done - return 1; + return + (spi_rx[1] == N25Q128_ID_MANUFACTURER && + spi_rx[2] == N25Q128_ID_DEVICE_TYPE && + spi_rx[3] == N25Q128_ID_DEVICE_CAPACITY) ? HAL_OK : HAL_ERROR; } -int n25q128_write_page(struct spiflash_ctx *ctx, uint32_t page_offset, const uint8_t *page_buffer) +HAL_StatusTypeDef n25q128_write_page(struct spiflash_ctx *ctx, uint32_t page_offset, const uint8_t *page_buffer) { // tx buffer uint8_t spi_tx[4]; - // result - HAL_StatusTypeDef ok; - // check offset - if (page_offset >= N25Q128_NUM_PAGES) return 0; + if (page_offset >= N25Q128_NUM_PAGES) return HAL_ERROR; // enable writing - if (_n25q128_write_enable(ctx) != 1) return 0; + if (_n25q128_write_enable(ctx) != 0) return HAL_ERROR; // calculate byte address uint32_t byte_offset = page_offset * N25Q128_PAGE_SIZE; @@ -188,44 +182,31 @@ int n25q128_write_page(struct spiflash_ctx *ctx, uint32_t page_offset, const uin spi_tx[2] = (uint8_t)(byte_offset >> 8); spi_tx[3] = (uint8_t)(byte_offset >> 0); - // activate, send command + // activate, send command, send data, deselect _n25q128_select(ctx); - ok = HAL_SPI_Transmit(ctx->hspi, spi_tx, 4, N25Q128_SPI_TIMEOUT); - - // check - if (ok != HAL_OK) { - _n25q128_deselect(ctx); - return 0; - } - - // send data, deselect - ok = HAL_SPI_Transmit(ctx->hspi, (uint8_t *) page_buffer, N25Q128_PAGE_SIZE, N25Q128_SPI_TIMEOUT); + int ok = + HAL_SPI_Transmit(ctx->hspi, spi_tx, 4, N25Q128_SPI_TIMEOUT) == HAL_OK && + HAL_SPI_Transmit(ctx->hspi, (uint8_t *) page_buffer, N25Q128_PAGE_SIZE, N25Q128_SPI_TIMEOUT) == HAL_OK; _n25q128_deselect(ctx); // check - if (ok != HAL_OK) return 0; + if (!ok) return HAL_ERROR; // wait until write finishes - if (! _n25q128_wait_while_wip(ctx, 1000)) return 0; - - // done - return 1; + return _n25q128_wait_while_wip(ctx, 1000); } static int n25q128_erase_something(struct spiflash_ctx *ctx, uint8_t command, uint32_t byte_offset) { // check offset - if (byte_offset >= N25Q128_NUM_BYTES) return 0; + if (byte_offset >= N25Q128_NUM_BYTES) return HAL_ERROR; // tx buffer uint8_t spi_tx[4]; - // result - HAL_StatusTypeDef ok; - // enable writing - if (_n25q128_write_enable(ctx) != 1) return 0; + if (_n25q128_write_enable(ctx) != 0) return HAL_ERROR; // send command (ERASE SECTOR or ERASE SUBSECTOR) spi_tx[0] = command; @@ -235,70 +216,61 @@ static int n25q128_erase_something(struct spiflash_ctx *ctx, uint8_t command, ui // activate, send command, deselect _n25q128_select(ctx); - ok = HAL_SPI_Transmit(ctx->hspi, spi_tx, 4, N25Q128_SPI_TIMEOUT); + int ok = + HAL_SPI_Transmit(ctx->hspi, spi_tx, 4, N25Q128_SPI_TIMEOUT) == HAL_OK; _n25q128_deselect(ctx); // check - if (ok != HAL_OK) return 0; + if (!ok) return HAL_ERROR; // wait for erase to finish - - if (! _n25q128_wait_while_wip(ctx, 1000)) return 0; - - // done - return 1; + return _n25q128_wait_while_wip(ctx, 1000); } -int n25q128_erase_sector(struct spiflash_ctx *ctx, uint32_t sector_offset) +HAL_StatusTypeDef n25q128_erase_sector(struct spiflash_ctx *ctx, uint32_t sector_offset) { return n25q128_erase_something(ctx, N25Q128_COMMAND_ERASE_SECTOR, sector_offset * N25Q128_SECTOR_SIZE); } -int n25q128_erase_subsector(struct spiflash_ctx *ctx, uint32_t subsector_offset) +HAL_StatusTypeDef n25q128_erase_subsector(struct spiflash_ctx *ctx, uint32_t subsector_offset) { return n25q128_erase_something(ctx, N25Q128_COMMAND_ERASE_SUBSECTOR, subsector_offset * N25Q128_SUBSECTOR_SIZE); } -int n25q128_erase_bulk(struct spiflash_ctx *ctx) +HAL_StatusTypeDef n25q128_erase_bulk(struct spiflash_ctx *ctx) { // tx buffer uint8_t spi_tx[1]; - // result - HAL_StatusTypeDef ok; - // enable writing - if (_n25q128_write_enable(ctx) != 1) return 0; + if (_n25q128_write_enable(ctx) != 0) return HAL_ERROR; // send command spi_tx[0] = N25Q128_COMMAND_ERASE_BULK; // activate, send command, deselect _n25q128_select(ctx); - ok = HAL_SPI_Transmit(ctx->hspi, spi_tx, 1, N25Q128_SPI_TIMEOUT); + int ok = + HAL_SPI_Transmit(ctx->hspi, spi_tx, 1, N25Q128_SPI_TIMEOUT) == HAL_OK; _n25q128_deselect(ctx); // check - if (ok != HAL_OK) return 0; + if (!ok) return HAL_ERROR; // wait for erase to finish - - if (! _n25q128_wait_while_wip(ctx, 60000)) return 0; - - // done - return 1; + return _n25q128_wait_while_wip(ctx, 60000); } /* This function writes of a number of pages to the flash memory. * The caller is responsible for ensuring that the pages have been erased. */ -int n25q128_write_data(struct spiflash_ctx *ctx, uint32_t offset, const uint8_t *buf, const uint32_t len) +HAL_StatusTypeDef n25q128_write_data(struct spiflash_ctx *ctx, uint32_t offset, const uint8_t *buf, const uint32_t len) { uint32_t page; @@ -320,29 +292,25 @@ int n25q128_write_data(struct spiflash_ctx *ctx, uint32_t offset, const uint8_t * it anyway. */ - if ((offset % N25Q128_PAGE_SIZE) != 0) return -1; - if ((len % N25Q128_PAGE_SIZE) != 0) return -2; + if (offset % N25Q128_PAGE_SIZE != 0 || len % N25Q128_PAGE_SIZE != 0) return HAL_ERROR; for (page = 0; page < len / N25Q128_PAGE_SIZE; page++) { - if (! n25q128_write_page(ctx, offset / N25Q128_PAGE_SIZE, buf)) { - return -6; + if (n25q128_write_page(ctx, offset / N25Q128_PAGE_SIZE, buf) != 0) { + return HAL_ERROR; } buf += N25Q128_PAGE_SIZE; offset += N25Q128_PAGE_SIZE; } - return 1; + return HAL_OK; } /* This function reads zero or more pages from the SPI flash. */ -int n25q128_read_data(struct spiflash_ctx *ctx, uint32_t offset, uint8_t *buf, const uint32_t len) +HAL_StatusTypeDef n25q128_read_data(struct spiflash_ctx *ctx, uint32_t offset, uint8_t *buf, const uint32_t len) { // tx buffer uint8_t spi_tx[4]; - // result - HAL_StatusTypeDef ok; - /* * The data sheet says: * The addressed byte can be at any location, and the address @@ -356,7 +324,7 @@ int n25q128_read_data(struct spiflash_ctx *ctx, uint32_t offset, uint8_t *buf, c */ // avoid overflow - if (offset + len > N25Q128_NUM_BYTES) return -3; + if (offset + len > N25Q128_NUM_BYTES) return HAL_ERROR; // prepare READ command spi_tx[0] = N25Q128_COMMAND_READ; @@ -364,23 +332,13 @@ int n25q128_read_data(struct spiflash_ctx *ctx, uint32_t offset, uint8_t *buf, c spi_tx[2] = (uint8_t)(offset >> 8); spi_tx[3] = (uint8_t)(offset >> 0); - // activate, send command + // activate, send command, read response, deselect _n25q128_select(ctx); - ok = HAL_SPI_Transmit(ctx->hspi, spi_tx, 4, N25Q128_SPI_TIMEOUT); - - // check - if (ok != HAL_OK) { - _n25q128_deselect(ctx); - return 0; - } - - // read response, deselect - ok = HAL_SPI_Receive(ctx->hspi, buf, len, N25Q128_SPI_TIMEOUT); + int ok = + HAL_SPI_Transmit(ctx->hspi, spi_tx, 4, N25Q128_SPI_TIMEOUT) == HAL_OK && + HAL_SPI_Receive(ctx->hspi, buf, len, N25Q128_SPI_TIMEOUT) == HAL_OK; _n25q128_deselect(ctx); // check - if (ok != HAL_OK) return 0; - - // done - return 1; + return ok ? HAL_OK : HAL_ERROR; } diff --git a/spiflash_n25q128.h b/spiflash_n25q128.h index 50243bd..926be56 100644 --- a/spiflash_n25q128.h +++ b/spiflash_n25q128.h @@ -70,13 +70,13 @@ struct spiflash_ctx { uint16_t cs_n_pin; }; -extern int n25q128_check_id(struct spiflash_ctx *ctx); -extern int n25q128_read_data(struct spiflash_ctx *ctx, uint32_t offset, uint8_t *buf, const uint32_t len); -extern int n25q128_write_page(struct spiflash_ctx *ctx, uint32_t page_offset, const uint8_t *page_buffer); -extern int n25q128_write_data(struct spiflash_ctx *ctx, uint32_t offset, const uint8_t *buf, const uint32_t len); -extern int n25q128_erase_subsector(struct spiflash_ctx *ctx, uint32_t subsector_offset); -extern int n25q128_erase_sector(struct spiflash_ctx *ctx, uint32_t sector_offset); -extern int n25q128_erase_bulk(struct spiflash_ctx *ctx); +extern HAL_StatusTypeDef n25q128_check_id(struct spiflash_ctx *ctx); +extern HAL_StatusTypeDef n25q128_read_data(struct spiflash_ctx *ctx, uint32_t offset, uint8_t *buf, const uint32_t len); +extern HAL_StatusTypeDef n25q128_write_page(struct spiflash_ctx *ctx, uint32_t page_offset, const uint8_t *page_buffer); +extern HAL_StatusTypeDef n25q128_write_data(struct spiflash_ctx *ctx, uint32_t offset, const uint8_t *buf, const uint32_t len); +extern HAL_StatusTypeDef n25q128_erase_subsector(struct spiflash_ctx *ctx, uint32_t subsector_offset); +extern HAL_StatusTypeDef n25q128_erase_sector(struct spiflash_ctx *ctx, uint32_t sector_offset); +extern HAL_StatusTypeDef n25q128_erase_bulk(struct spiflash_ctx *ctx); #define n25q128_read_page(ctx, page_offset, page_buffer) \ n25q128_read_data(ctx, page_offset * N25Q128_PAGE_SIZE, page_buffer, N25Q128_PAGE_SIZE) diff --git a/stm-flash.c b/stm-flash.c index 7bbe0a0..952543f 100644 --- a/stm-flash.c +++ b/stm-flash.c @@ -69,29 +69,30 @@ uint32_t flash_sector_offsets[FLASH_NUM_SECTORS + 1] = { 0x08200000 /* first address *after* flash */ }; -static int stm_flash_sector_num(const uint32_t offset) +static uint32_t stm_flash_sector_num(const uint32_t offset) { - int i; + uint32_t i; if (offset < flash_sector_offsets[0]) - return -1; + return 0xFFFFFFFF; for (i = 0; i < FLASH_NUM_SECTORS; ++i) if (offset < flash_sector_offsets[i + 1]) return i; - return -1; + return 0xFFFFFFFF; } -int stm_flash_erase_sectors(const uint32_t start_offset, const uint32_t end_offset) +HAL_StatusTypeDef stm_flash_erase_sectors(const uint32_t start_offset, const uint32_t end_offset) { uint32_t start_sector = stm_flash_sector_num(start_offset); uint32_t end_sector = stm_flash_sector_num(end_offset); FLASH_EraseInitTypeDef FLASH_EraseInitStruct; uint32_t SectorError = 0; + HAL_StatusTypeDef err; - if (start_sector > end_sector) return -1; - if (end_sector > FLASH_NUM_SECTORS) return -2; + if (start_sector > end_sector || end_sector > FLASH_NUM_SECTORS) + return HAL_ERROR; FLASH_EraseInitStruct.Sector = start_sector; FLASH_EraseInitStruct.NbSectors = (end_sector - start_sector) + 1; @@ -99,40 +100,38 @@ int stm_flash_erase_sectors(const uint32_t start_offset, const uint32_t end_offs FLASH_EraseInitStruct.VoltageRange = VOLTAGE_RANGE_3; HAL_FLASH_Unlock(); - - if (HAL_FLASHEx_Erase(&FLASH_EraseInitStruct, &SectorError) != HAL_OK) { - return -3; - } - + err = HAL_FLASHEx_Erase(&FLASH_EraseInitStruct, &SectorError); HAL_FLASH_Lock(); - if (SectorError == 0xFFFFFFFF) return 0; + if (err != HAL_OK || SectorError != 0xFFFFFFFF) + return HAL_ERROR; - return -3; + return HAL_OK; } -int stm_flash_write32(uint32_t offset, const uint32_t *buf, const uint32_t elements) +HAL_StatusTypeDef stm_flash_write32(uint32_t offset, const uint32_t *buf, const size_t elements) { uint32_t sector = stm_flash_sector_num(offset); - uint32_t i, j; + size_t i; + HAL_StatusTypeDef err = HAL_OK; if (offset == flash_sector_offsets[sector]) { /* Request to write to beginning of a flash sector, erase it first. */ if (stm_flash_erase_sectors(offset, offset) != 0) { - return -1; + return HAL_ERROR; } } HAL_FLASH_Unlock(); for (i = 0; i < elements; i++) { - if ((j = HAL_FLASH_Program(FLASH_TYPEPROGRAM_WORD, offset, buf[i])) != HAL_OK) { - return -2; + if ((err = HAL_FLASH_Program(FLASH_TYPEPROGRAM_WORD, offset, buf[i])) != HAL_OK) { + break; } offset += 4; } HAL_FLASH_Lock(); - return 1; + return err; } diff --git a/stm-flash.h b/stm-flash.h index aecb87f..db7d327 100644 --- a/stm-flash.h +++ b/stm-flash.h @@ -1,7 +1,8 @@ /* * stm-flash.h * ----------- - * Functions and defines for accessing the flash memory. + * Functions for writing/erasing the STM32 internal flash memory. + * The flash is memory mapped, so no code is needed here to read it. * * Copyright (c) 2016, NORDUnet A/S All rights reserved. * @@ -35,7 +36,7 @@ #ifndef __STM32_FLASH_H #define __STM32_FLASH_H -extern int stm_flash_erase_sectors(const uint32_t start_offset, const uint32_t end_offset); -extern int stm_flash_write32(const uint32_t offset, const uint32_t *buf, const uint32_t elements); +extern HAL_StatusTypeDef stm_flash_erase_sectors(const uint32_t start_offset, const uint32_t end_offset); +extern HAL_StatusTypeDef stm_flash_write32(const uint32_t offset, const uint32_t *buf, const size_t elements); #endif /* __STM32_FLASH_H */ @@ -166,7 +166,7 @@ void fmc_init(void) } -static int _fmc_nwait_idle(void) +static HAL_StatusTypeDef _fmc_nwait_idle(void) { int cnt; @@ -175,41 +175,44 @@ static int _fmc_nwait_idle(void) { // read pin state if (HAL_GPIO_ReadPin(FMC_GPIO_PORT_NWAIT, FMC_GPIO_PIN_NWAIT) == FMC_NWAIT_IDLE) - return 0; + return HAL_OK; } - return -1; + return HAL_ERROR; } -int fmc_write_32(uint32_t addr, uint32_t *data) +HAL_StatusTypeDef fmc_write_32(uint32_t addr, uint32_t *data) { // calculate target fpga address uint32_t ptr = FMC_FPGA_BASE_ADDR + (addr & FMC_FPGA_ADDR_MASK); __disable_irq(); - int status = + HAL_StatusTypeDef status = // write data to fpga - (HAL_SRAM_Write_32b(&_fmc_fpga_inst, (uint32_t *)ptr, data, 1) != HAL_OK) || + HAL_SRAM_Write_32b(&_fmc_fpga_inst, (uint32_t *)ptr, data, 1); + if (status == HAL_OK) // wait for transaction to complete - _fmc_nwait_idle(); + status = _fmc_nwait_idle(); __enable_irq(); return status; } -static inline int _fmc_read_32(uint32_t *ptr, uint32_t *data) +static inline HAL_StatusTypeDef _fmc_read_32(uint32_t *ptr, uint32_t *data) { - return + HAL_StatusTypeDef status = // read data from fpga - (HAL_SRAM_Read_32b(&_fmc_fpga_inst, (uint32_t *)ptr, data, 1) != HAL_OK) || + HAL_SRAM_Read_32b(&_fmc_fpga_inst, (uint32_t *)ptr, data, 1); + if (status == HAL_OK) // wait for transaction to complete - _fmc_nwait_idle(); + status = _fmc_nwait_idle(); + return status; } -int fmc_read_32(uint32_t addr, uint32_t *data) +HAL_StatusTypeDef fmc_read_32(uint32_t addr, uint32_t *data) { // calculate target fpga address uint32_t ptr = FMC_FPGA_BASE_ADDR + (addr & FMC_FPGA_ADDR_MASK); @@ -232,9 +235,10 @@ int fmc_read_32(uint32_t addr, uint32_t *data) */ __disable_irq(); - int status = - _fmc_read_32((uint32_t *)ptr, data) || + HAL_StatusTypeDef status = _fmc_read_32((uint32_t *)ptr, data); + if (status == HAL_OK) + status = _fmc_read_32((uint32_t *)ptr, data); __enable_irq(); @@ -57,7 +57,7 @@ extern void fmc_init(void); -extern int fmc_write_32(uint32_t addr, uint32_t *data); -extern int fmc_read_32(uint32_t addr, uint32_t *data); +extern HAL_StatusTypeDef fmc_write_32(uint32_t addr, uint32_t *data); +extern HAL_StatusTypeDef fmc_read_32(uint32_t addr, uint32_t *data); #endif /* __STM_FMC_H */ diff --git a/stm-fpgacfg.c b/stm-fpgacfg.c index b2f09d0..54342bf 100644 --- a/stm-fpgacfg.c +++ b/stm-fpgacfg.c @@ -68,12 +68,12 @@ void fpgacfg_init(void) HAL_SPI_Init(&hspi_fpgacfg); } -int fpgacfg_check_id(void) +HAL_StatusTypeDef fpgacfg_check_id(void) { return n25q128_check_id(&fpgacfg_ctx); } -int fpgacfg_write_data(uint32_t offset, const uint8_t *buf, const uint32_t len) +HAL_StatusTypeDef fpgacfg_write_data(uint32_t offset, const uint8_t *buf, const uint32_t len) { return n25q128_write_data(&fpgacfg_ctx, offset, buf, len); } @@ -113,13 +113,12 @@ void fpgacfg_reset_fpga(enum fpgacfg_reset reset) } } -int fpgacfg_check_done(void) +HAL_StatusTypeDef fpgacfg_check_done(void) { - GPIO_PinState status = HAL_GPIO_ReadPin(FPGA_DONE_Port, FPGA_DONE_Pin); - return (status == GPIO_PIN_SET); + return (HAL_GPIO_ReadPin(FPGA_DONE_Port, FPGA_DONE_Pin) == GPIO_PIN_SET) ? HAL_OK : HAL_ERROR; } -int fpgacfg_erase_sector(uint32_t sector_offset) +HAL_StatusTypeDef fpgacfg_erase_sector(uint32_t sector_offset) { return n25q128_erase_sector(&fpgacfg_ctx, sector_offset); } diff --git a/stm-fpgacfg.h b/stm-fpgacfg.h index b31dee3..74cc683 100644 --- a/stm-fpgacfg.h +++ b/stm-fpgacfg.h @@ -86,13 +86,13 @@ enum fpgacfg_reset { }; extern void fpgacfg_init(void); -extern int fpgacfg_check_id(void); -extern int fpgacfg_write_data(uint32_t offset, const uint8_t *buf, const uint32_t len); -extern int fpgacfg_erase_sector(uint32_t sector_offset); +extern HAL_StatusTypeDef fpgacfg_check_id(void); +extern HAL_StatusTypeDef fpgacfg_write_data(uint32_t offset, const uint8_t *buf, const uint32_t len); +extern HAL_StatusTypeDef fpgacfg_erase_sector(uint32_t sector_offset); extern void fpgacfg_access_control(enum fpgacfg_access_ctrl access); /* Reset the FPGA */ extern void fpgacfg_reset_fpga(enum fpgacfg_reset reset); /* Check status of FPGA bitstream loading */ -extern int fpgacfg_check_done(void); +extern HAL_StatusTypeDef fpgacfg_check_done(void); #endif /* __STM32_FPGACFG_H */ diff --git a/stm-keystore.c b/stm-keystore.c index 2596373..7683f40 100644 --- a/stm-keystore.c +++ b/stm-keystore.c @@ -62,46 +62,32 @@ void keystore_init(void) HAL_SPI_Init(&hspi_keystore); } -int keystore_check_id(void) +HAL_StatusTypeDef keystore_check_id(void) { return n25q128_check_id(&keystore_ctx); } -int keystore_read_data(uint32_t offset, uint8_t *buf, const uint32_t len) +HAL_StatusTypeDef keystore_read_data(uint32_t offset, uint8_t *buf, const uint32_t len) { return n25q128_read_data(&keystore_ctx, offset, buf, len); } -int keystore_write_data(uint32_t offset, const uint8_t *buf, const uint32_t len) +HAL_StatusTypeDef keystore_write_data(uint32_t offset, const uint8_t *buf, const uint32_t len) { return n25q128_write_data(&keystore_ctx, offset, buf, len); } -int keystore_erase_subsector(uint32_t subsector_offset) +HAL_StatusTypeDef keystore_erase_subsector(uint32_t subsector_offset) { return n25q128_erase_subsector(&keystore_ctx, subsector_offset); } -int keystore_erase_sector(uint32_t sector_offset) +HAL_StatusTypeDef keystore_erase_sector(uint32_t sector_offset) { return n25q128_erase_sector(&keystore_ctx, sector_offset); } -int keystore_erase_bulk(void) +HAL_StatusTypeDef keystore_erase_bulk(void) { return n25q128_erase_bulk(&keystore_ctx); } - -/* - * Deprecated, will be removed when we fix libhal/ks_flash.c to use the - * new function. I love inter-dependent repos. - */ - -int keystore_erase_subsectors(uint32_t start, uint32_t stop) -{ - for (uint32_t i = start; i <= stop; ++i) { - if (keystore_erase_subsector(i) != 1) - return 0; - } - return 1; -} diff --git a/stm-keystore.h b/stm-keystore.h index f660790..9aa740c 100644 --- a/stm-keystore.h +++ b/stm-keystore.h @@ -56,14 +56,11 @@ extern void keystore_init(void); -extern int keystore_check_id(void); -extern int keystore_read_data(uint32_t offset, uint8_t *buf, const uint32_t len); -extern int keystore_write_data(uint32_t offset, const uint8_t *buf, const uint32_t len); -extern int keystore_erase_subsector(uint32_t subsector_offset); -extern int keystore_erase_sector(uint32_t sector_offset); -extern int keystore_erase_bulk(void); - -/* Deprecated, will be removed. */ -extern int keystore_erase_subsectors(uint32_t start, uint32_t stop); +extern HAL_StatusTypeDef keystore_check_id(void); +extern HAL_StatusTypeDef keystore_read_data(uint32_t offset, uint8_t *buf, const uint32_t len); +extern HAL_StatusTypeDef keystore_write_data(uint32_t offset, const uint8_t *buf, const uint32_t len); +extern HAL_StatusTypeDef keystore_erase_subsector(uint32_t subsector_offset); +extern HAL_StatusTypeDef keystore_erase_sector(uint32_t sector_offset); +extern HAL_StatusTypeDef keystore_erase_bulk(void); #endif /* __STM32_KEYSTORE_H */ @@ -60,7 +60,7 @@ HAL_StatusTypeDef rtc_device_ready(uint16_t i2c_addr) return HAL_I2C_IsDeviceReady (&hi2c_rtc, i2c_addr, 10, 1000); } -HAL_StatusTypeDef rtc_enable_oscillator() +HAL_StatusTypeDef rtc_enable_oscillator(void) { uint8_t buf[2]; HAL_StatusTypeDef res; |