Add code to access the keystore memory (SPI flash).

7 files changed, 191 insertions, 14 deletions

diff --git a/Makefile b/Makefile
index 2409723..9c0661b 100644
--- a/Makefile
+++ b/Makefile
@@ -56,6 +56,7 @@ export BOARD_OBJS = \
 	$(TOPLEVEL)/stm-rtc.o \
 	$(TOPLEVEL)/spiflash_n25q128.o \
 	$(TOPLEVEL)/stm-fpgacfg.o \
+	$(TOPLEVEL)/stm-keystore.o \
 	$(TOPLEVEL)/syscalls.o \
 	$(BOARD_DIR)/TOOLCHAIN_GCC_ARM/startup_stm32f429xx.o \
 	$(BOARD_DIR)/system_stm32f4xx.o \
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/stm32f4xx_hal_msp.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/stm32f4xx_hal_msp.c
index d0f814e..6d1d029 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/stm32f4xx_hal_msp.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/stm32f4xx_hal_msp.c
@@ -200,7 +200,6 @@ void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c)
 	/* Peripheral clock enable */
 	__I2C2_CLK_ENABLE();
     }
-
 }
 
 void HAL_I2C_MspDeInit(I2C_HandleTypeDef* hi2c)
@@ -214,10 +213,25 @@ void HAL_I2C_MspDeInit(I2C_HandleTypeDef* hi2c)
 void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
 {
     GPIO_InitTypeDef GPIO_InitStruct;
-    if (hspi->Instance == SPI2) {
-	/* Peripheral clock enable */
-	__SPI2_CLK_ENABLE();
+    if (hspi->Instance == SPI1) {
+	/* SPI1 is the keystore memory.
+	 *
+	 * SPI1 GPIO Configuration
+	 * PA5     ------> SPI2_SCK
+	 * PA6     ------> SPI2_MISO
+	 * PA7     ------> SPI2_MOSI
+	*/
+	__GPIOA_CLK_ENABLE();
+	GPIO_InitStruct.Pin = GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7;
+	GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+	GPIO_InitStruct.Pull = GPIO_NOPULL;
+	GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+	GPIO_InitStruct.Alternate = GPIO_AF5_SPI1;
+	HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 
+	/* Peripheral clock enable */
+	__SPI1_CLK_ENABLE();
+    } else if (hspi->Instance == SPI2) {
 	/* SPI2 is the FPGA config memory.
 	 *
 	 * SPI2 GPIO Configuration
@@ -225,19 +239,26 @@ void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
 	 * PB14     ------> SPI2_MISO
 	 * PB15     ------> SPI2_MOSI
 	*/
+	__GPIOB_CLK_ENABLE();
 	GPIO_InitStruct.Pin = GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_15;
 	GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 	GPIO_InitStruct.Pull = GPIO_NOPULL;
 	GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
 	GPIO_InitStruct.Alternate = GPIO_AF5_SPI2;
 	HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+	/* Peripheral clock enable */
+	__SPI2_CLK_ENABLE();
     }
 }
 
 void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi)
 {
-
-    if (hspi->Instance == SPI2) {
+    if (hspi->Instance == SPI1) {
+	/* Peripheral clock disable */
+	__HAL_RCC_SPI1_CLK_DISABLE();
+	HAL_GPIO_DeInit(GPIOB, GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7);
+    } else if (hspi->Instance == SPI2) {
 	/* Peripheral clock disable */
 	__HAL_RCC_SPI2_CLK_DISABLE();
 	HAL_GPIO_DeInit(GPIOB, GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_15);
diff --git a/projects/cli-test/cli-test.c b/projects/cli-test/cli-test.c
index b8d5388..6bc70dd 100644
--- a/projects/cli-test/cli-test.c
+++ b/projects/cli-test/cli-test.c
@@ -36,6 +36,7 @@
 #include "stm-led.h"
 #include "stm-uart.h"
 #include "stm-fpgacfg.h"
+#include "stm-keystore.h"
 #include "mgmt-cli.h"
 
 #include <string.h>
@@ -126,6 +127,12 @@ int cmd_show_fpga_status(struct cli_def *cli, const char *command, char *argv[],
     return CLI_OK;
 }
 
+int cmd_show_keystore_status(struct cli_def *cli, const char *command, char *argv[], int argc)
+{
+    cli_print(cli, "Keystore memory is %sonline", (keystore_check_id() != 1) ? "NOT ":"");
+    return CLI_OK;
+}
+
 /* The chunk size have to be a multiple of the SPI flash page size (256 bytes),
    and it has to match the chunk size in the program sending the bitstream over the UART.
 */
@@ -271,6 +278,10 @@ void configure_cli_show(struct cli_def *cli)
     cli_command_branch(show, fpga);
     /* show fpga status*/
     cli_command_node(show_fpga, status, "Show status about the FPGA");
+
+    cli_command_branch(show, keystore);
+    /* show keystore status*/
+    cli_command_node(show_keystore, status, "Show status of the keystore memory");
 }
 
 void configure_cli_fpga(struct cli_def *cli)
diff --git a/stm-fpgacfg.h b/stm-fpgacfg.h
index 367aa3d..0d5eeb9 100644
--- a/stm-fpgacfg.h
+++ b/stm-fpgacfg.h
@@ -69,8 +69,7 @@
     gpio_output(FPGA_INIT_Port, FPGA_INIT_Pin, GPIO_PIN_RESET);			   \
     gpio_output(FPGA_PROGRAM_Port, FPGA_PROGRAM_Pin, GPIO_PIN_SET);		   \
     /* Configure FPGA_DONE input pin */   					   \
-    //gpio_input(FPGA_DONE_Port, FPGA_DONE_Pin, GPIO_PULLUP) \
-    1
+    gpio_input(FPGA_DONE_Port, FPGA_DONE_Pin, GPIO_PULLUP)
 
 
 enum fpgacfg_access_ctrl {
diff --git a/stm-init.c b/stm-init.c
index 8711cc1..7ded2a6 100644
--- a/stm-init.c
+++ b/stm-init.c
@@ -49,6 +49,7 @@
 #endif
 #ifdef HAL_SPI_MODULE_ENABLED
 #include "stm-fpgacfg.h"
+#include "stm-keystore.h"
 #endif
 
 /* Private variables ---------------------------------------------------------*/
@@ -65,6 +66,7 @@ static void MX_USART2_UART_Init(void);
 static void MX_I2C2_Init(void);
 #endif
 #ifdef HAL_SPI_MODULE_ENABLED
+static void MX_SPI1_Init(void);
 static void MX_SPI2_Init(void);
 #endif
 
@@ -96,6 +98,7 @@ void stm_init(void)
   MX_I2C2_Init();
 #endif
 #ifdef HAL_SPI_MODULE_ENABLED
+  MX_SPI1_Init();
   MX_SPI2_Init();
 #endif
 }
@@ -173,13 +176,11 @@ static void MX_GPIO_Init(void)
   /* Set up GPIOs to manage access to the FPGA config memory.
    * FPGACFG_GPIO_INIT is defined in stm-fpgacfg.h.
    */
-  /* GPIO Ports Clock Enable */
   FPGACFG_GPIO_INIT();
-  /*
-  __GPIOJ_CLK_ENABLE();
-  gpio_output(FPGA_INIT_Port, FPGA_INIT_Pin, GPIO_PIN_RESET);
-  gpio_output(FPGA_PROGRAM_Port, FPGA_PROGRAM_Pin, GPIO_PIN_SET);
-  */
+  /* Set up GPIOs for the keystore memory.
+   * KEYSTORE_GPIO_INIT is defined in stm-keystore.h.
+   */
+  KEYSTORE_GPIO_INIT();
 #endif /* HAL_SPI_MODULE_ENABLED */
 }
 #undef gpio_output
@@ -206,6 +207,23 @@ void MX_I2C2_Init(void)
 #endif
 
 #ifdef HAL_SPI_MODULE_ENABLED
+/* SPI1 (keystore memory) init function */
+void MX_SPI1_Init(void)
+{
+    hspi_keystore.Instance = SPI1;
+    hspi_keystore.Init.Mode = SPI_MODE_MASTER;
+    hspi_keystore.Init.Direction = SPI_DIRECTION_2LINES;
+    hspi_keystore.Init.DataSize = SPI_DATASIZE_8BIT;
+    hspi_keystore.Init.CLKPolarity = SPI_POLARITY_LOW;
+    hspi_keystore.Init.CLKPhase = SPI_PHASE_1EDGE;
+    hspi_keystore.Init.NSS = SPI_NSS_SOFT;
+    hspi_keystore.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
+    hspi_keystore.Init.FirstBit = SPI_FIRSTBIT_MSB;
+    hspi_keystore.Init.TIMode = SPI_TIMODE_DISABLE;
+    hspi_keystore.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
+    hspi_keystore.Init.CRCPolynomial = 10;
+    HAL_SPI_Init(&hspi_keystore);
+}
 /* SPI2 (FPGA config memory) init function */
 void MX_SPI2_Init(void)
 {
diff --git a/stm-keystore.c b/stm-keystore.c
new file mode 100644
index 0000000..19c5ccc
--- /dev/null
+++ b/stm-keystore.c
@@ -0,0 +1,70 @@
+/*
+ * stm-keystore.c
+ * ----------
+ * Functions for accessing the keystore memory.
+ *
+ * Copyright (c) 2016, NORDUnet A/S All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ *
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ *
+ * - Neither the name of the NORDUnet nor the names of its contributors may
+ *   be used to endorse or promote products derived from this software
+ *   without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "stm32f4xx_hal.h"
+#include "stm-keystore.h"
+#include "stm-init.h"
+
+SPI_HandleTypeDef hspi_keystore;
+
+struct spiflash_ctx keystore_ctx = {&hspi_keystore, KSM_PROM_CS_N_GPIO_Port, KSM_PROM_CS_N_Pin};
+
+int keystore_check_id()
+{
+    return n25q128_check_id(&keystore_ctx);
+}
+
+int keystore_write_data(uint32_t offset, const uint8_t *buf, const uint32_t len)
+{
+    return n25q128_write_data(&keystore_ctx, offset, buf, len);
+}
+
+int keystore_erase_sectors(int num)
+{
+    if (num > N25Q128_NUM_SECTORS - 1 || num < 0) num = N25Q128_NUM_SECTORS - 1;
+    while (num) {
+	int timeout = 1000;
+	while (timeout--) {
+	    int i = n25q128_get_wip_flag(&keystore_ctx);
+	    if (i < 0) return 0;
+	    if (! i) break;
+	    HAL_Delay(10);
+	}
+
+	if (! n25q128_erase_sector(&keystore_ctx, num--)) {
+            return 0;
+        }
+    }
+    return 1;
+}
diff --git a/stm-keystore.h b/stm-keystore.h
new file mode 100644
index 0000000..9120340
--- /dev/null
+++ b/stm-keystore.h
@@ -0,0 +1,57 @@
+/*
+ * stm-keystore.h
+ * ---------
+ * Functions and defines for accessing the keystore memory.
+ *
+ * Copyright (c) 2016, NORDUnet A/S All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ *
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ *
+ * - Neither the name of the NORDUnet nor the names of its contributors may
+ *   be used to endorse or promote products derived from this software
+ *   without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __STM32_KEYSTORE_H
+#define __STM32_KEYSTORE_H
+
+#include "stm32f4xx_hal.h"
+#include "spiflash_n25q128.h"
+
+/* Pins connected to the FPGA config memory (SPI flash) */
+#define KSM_PROM_CS_N_Pin                  GPIO_PIN_0
+#define KSM_PROM_CS_N_GPIO_Port            GPIOB
+
+#define KEYSTORE_GPIO_INIT()		\
+    __GPIOB_CLK_ENABLE();		\
+    /* Configure GPIO pin for FPGA config memory chip select : KSM_PROM_CS_N */        \
+    gpio_output(KSM_PROM_CS_N_GPIO_Port, KSM_PROM_CS_N_Pin, GPIO_PIN_SET)
+
+
+extern SPI_HandleTypeDef hspi_keystore;
+
+extern int keystore_check_id(void);
+extern int keystore_write_data(uint32_t offset, const uint8_t *buf, const uint32_t len);
+extern int keystore_erase_sectors(int num);
+
+#endif /* __STM32_KEYSTORE_H */