stm32f4xx_hal_flash_ex.h « TARGET_STM32F4 « TARGET_STM « cmsis « targets « mbed « libraries - sw/stm32

blob: 7930977c734640d188d2e929f6a2323b89ac41ad (plain) (tree)

5
6

7
8
9
10
11
12
13
14
generated by cgit v1.2.3 (git 2.25.1) at 2024-09-19 13:15:34 +0000

> __HAL_UNLOCK(hcryp); /* Return function status */ return HAL_OK; } /** * @brief Computes the authentication TAG for AES CCM mode. * @note This API is called after HAL_AES_CCM_Encrypt()/HAL_AES_CCM_Decrypt() * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains * the configuration information for CRYP module * @param AuthTag: Pointer to the authentication buffer * @param Timeout: Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Finish(CRYP_HandleTypeDef *hcryp, uint8_t *AuthTag, uint32_t Timeout) { uint32_t tickstart = 0; uint32_t tagaddr = (uint32_t)AuthTag; uint32_t ctraddr = (uint32_t)hcryp->Init.pScratch; uint32_t temptag[4] = {0}; /* Temporary TAG (MAC) */ uint32_t loopcounter; /* Process Locked */ __HAL_LOCK(hcryp); /* Change the CRYP peripheral state */ hcryp->State = HAL_CRYP_STATE_BUSY; /* Check if initialization phase has already been performed */ if(hcryp->Phase == HAL_CRYP_PHASE_PROCESS) { /* Change the CRYP phase */ hcryp->Phase = HAL_CRYP_PHASE_FINAL; /* Disable CRYP to start the final phase */ __HAL_CRYP_DISABLE(hcryp); /* Select final phase */ __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_FINAL); /* Enable the CRYP peripheral */ __HAL_CRYP_ENABLE(hcryp); /* Write the counter block in the IN FIFO */ hcryp->Instance->DR = *(uint32_t*)ctraddr; ctraddr+=4; hcryp->Instance->DR = *(uint32_t*)ctraddr; ctraddr+=4; hcryp->Instance->DR = *(uint32_t*)ctraddr; ctraddr+=4; hcryp->Instance->DR = *(uint32_t*)ctraddr; /* Get tick */ tickstart = HAL_GetTick(); while(HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_OFNE)) { /* Check for the Timeout */ if(Timeout != HAL_MAX_DELAY) { if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) { /* Change state */ hcryp->State = HAL_CRYP_STATE_TIMEOUT; /* Process Unlocked */ __HAL_UNLOCK(hcryp); return HAL_TIMEOUT; } } } /* Read the Auth TAG in the IN FIFO */ temptag[0] = hcryp->Instance->DOUT; temptag[1] = hcryp->Instance->DOUT; temptag[2] = hcryp->Instance->DOUT; temptag[3] = hcryp->Instance->DOUT; } /* Copy temporary authentication TAG in user TAG buffer */ for(loopcounter = 0; loopcounter < hcryp->Init.TagSize ; loopcounter++) { /* Set the authentication TAG buffer */ *((uint8_t*)tagaddr+loopcounter) = *((uint8_t*)temptag+loopcounter); } /* Change the CRYP peripheral state */ hcryp->State = HAL_CRYP_STATE_READY; /* Process Unlocked */ __HAL_UNLOCK(hcryp); /* Return function status */ return HAL_OK; } /** * @brief Initializes the CRYP peripheral in AES CCM decryption mode then * decrypted pCypherData. The cypher data are available in pPlainData. * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains * the configuration information for CRYP module * @param pPlainData: Pointer to the plaintext buffer * @param Size: Length of the plaintext buffer, must be a multiple of 16 * @param pCypherData: Pointer to the cyphertext buffer * @param Timeout: Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout) { uint32_t tickstart = 0; uint32_t headersize = hcryp->Init.HeaderSize; uint32_t headeraddr = (uint32_t)hcryp->Init.Header; uint32_t loopcounter = 0; uint32_t bufferidx = 0; uint8_t blockb0[16] = {0};/* Block B0 */ uint8_t ctr[16] = {0}; /* Counter */ uint32_t b0addr = (uint32_t)blockb0; /* Process Locked */ __HAL_LOCK(hcryp); /* Change the CRYP peripheral state */ hcryp->State = HAL_CRYP_STATE_BUSY; /* Check if initialization phase has already been performed */ if(hcryp->Phase == HAL_CRYP_PHASE_READY) { /************************ Formatting the header block *********************/ if(headersize != 0) { /* Check that the associated data (or header) length is lower than 2^16 - 2^8 = 65536 - 256 = 65280 */ if(headersize < 65280) { hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize >> 8) & 0xFF); hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize) & 0xFF); headersize += 2; } else { /* Header is encoded as 0xff || 0xfe || [headersize]32, i.e., six octets */ hcryp->Init.pScratch[bufferidx++] = 0xFF; hcryp->Init.pScratch[bufferidx++] = 0xFE; hcryp->Init.pScratch[bufferidx++] = headersize & 0xff000000; hcryp->Init.pScratch[bufferidx++] = headersize & 0x00ff0000; hcryp->Init.pScratch[bufferidx++] = headersize & 0x0000ff00; hcryp->Init.pScratch[bufferidx++] = headersize & 0x000000ff; headersize += 6; } /* Copy the header buffer in internal buffer "hcryp->Init.pScratch" */ for(loopcounter = 0; loopcounter < headersize; loopcounter++) { hcryp->Init.pScratch[bufferidx++] = hcryp->Init.Header[loopcounter]; } /* Check if the header size is modulo 16 */ if ((headersize % 16) != 0) { /* Padd the header buffer with 0s till the hcryp->Init.pScratch length is modulo 16 */ for(loopcounter = headersize; loopcounter <= ((headersize/16) + 1) * 16; loopcounter++) { hcryp->Init.pScratch[loopcounter] = 0; } /* Set the header size to modulo 16 */ headersize = ((headersize/16) + 1) * 16; } /* Set the pointer headeraddr to hcryp->Init.pScratch */ headeraddr = (uint32_t)hcryp->Init.pScratch; } /*********************** Formatting the block B0 **************************/ if(headersize != 0) { blockb0[0] = 0x40; } /* Flags byte */ /* blockb0[0] |= 0u | (((( (uint8_t) hcryp->Init.TagSize - 2) / 2) & 0x07 ) << 3 ) | ( ( (uint8_t) (15 - hcryp->Init.IVSize) - 1) & 0x07) */ blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)(((uint8_t)(hcryp->Init.TagSize - (uint8_t)(2))) >> 1) & (uint8_t)0x07 ) << 3); blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)((uint8_t)(15) - hcryp->Init.IVSize) - (uint8_t)1) & (uint8_t)0x07); for (loopcounter = 0; loopcounter < hcryp->Init.IVSize; loopcounter++) { blockb0[loopcounter+1] = hcryp->Init.pInitVect[loopcounter]; } for ( ; loopcounter < 13; loopcounter++) { blockb0[loopcounter+1] = 0; } blockb0[14] = (Size >> 8); blockb0[15] = (Size & 0xFF); /************************* Formatting the initial counter *****************/ /* Byte 0: Bits 7 and 6 are reserved and shall be set to 0 Bits 3, 4, and 5 shall also be set to 0, to ensure that all the counter blocks are distinct from B0 Bits 0, 1, and 2 contain the same encoding of q as in B0 */ ctr[0] = blockb0[0] & 0x07; /* byte 1 to NonceSize is the IV (Nonce) */ for(loopcounter = 1; loopcounter < hcryp->Init.IVSize + 1; loopcounter++) { ctr[loopcounter] = blockb0[loopcounter]; } /* Set the LSB to 1 */ ctr[15] |= 0x01; /* Set the key */ CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize); /* Set the CRYP peripheral in AES CCM mode */ __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CCM_DECRYPT); /* Set the Initialization Vector */ CRYPEx_GCMCCM_SetInitVector(hcryp, ctr); /* Select init phase */ __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); b0addr = (uint32_t)blockb0; /* Write the blockb0 block in the IN FIFO */ hcryp->Instance->DR = *(uint32_t*)(b0addr); b0addr+=4; hcryp->Instance->DR = *(uint32_t*)(b0addr); b0addr+=4; hcryp->Instance->DR = *(uint32_t*)(b0addr); b0addr+=4; hcryp->Instance->DR = *(uint32_t*)(b0addr); /* Enable the CRYP peripheral */ __HAL_CRYP_ENABLE(hcryp); /* Get tick */ tickstart = HAL_GetTick(); while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN) { /* Check for the Timeout */ if(Timeout != HAL_MAX_DELAY) { if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) { /* Change state */ hcryp->State = HAL_CRYP_STATE_TIMEOUT; /* Process Unlocked */ __HAL_UNLOCK(hcryp); return HAL_TIMEOUT; } } } /***************************** Header phase *******************************/ if(headersize != 0) { /* Select header phase */ __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); /* Enable Crypto processor */ __HAL_CRYP_ENABLE(hcryp); for(loopcounter = 0; (loopcounter < headersize); loopcounter+=16) { /* Get tick */ tickstart = HAL_GetTick(); while(HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_IFEM)) { /* Check for the Timeout */ if(Timeout != HAL_MAX_DELAY) { if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) { /* Change state */ hcryp->State = HAL_CRYP_STATE_TIMEOUT; /* Process Unlocked */ __HAL_UNLOCK(hcryp); return HAL_TIMEOUT; } } } /* Write the header block in the IN FIFO */ hcryp->Instance->DR = *(uint32_t*)(headeraddr); headeraddr+=4; hcryp->Instance->DR = *(uint32_t*)(headeraddr); headeraddr+=4; hcryp->Instance->DR = *(uint32_t*)(headeraddr); headeraddr+=4; hcryp->Instance->DR = *(uint32_t*)(headeraddr); headeraddr+=4; } /* Get tick */ tickstart = HAL_GetTick(); while((hcryp->Instance->SR & CRYP_FLAG_BUSY) == CRYP_FLAG_BUSY) { /* Check for the Timeout */ if(Timeout != HAL_MAX_DELAY) { if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) { /* Change state */ hcryp->State = HAL_CRYP_STATE_TIMEOUT; /* Process Unlocked */ __HAL_UNLOCK(hcryp); return HAL_TIMEOUT; } } } } /* Save formatted counter into the scratch buffer pScratch */ for(loopcounter = 0; (loopcounter < 16); loopcounter++) { hcryp->Init.pScratch[loopcounter] = ctr[loopcounter]; } /* Reset bit 0 */ hcryp->Init.pScratch[15] &= 0xfe; /* Select payload phase once the header phase is performed */ __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); /* Flush FIFO */ __HAL_CRYP_FIFO_FLUSH(hcryp); /* Enable the CRYP peripheral */ __HAL_CRYP_ENABLE(hcryp); /* Set the phase */ hcryp->Phase = HAL_CRYP_PHASE_PROCESS; } /* Write Plain Data and Get Cypher Data */ if(CRYPEx_GCMCCM_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK) { return HAL_TIMEOUT; } /* Change the CRYP peripheral state */ hcryp->State = HAL_CRYP_STATE_READY; /* Process Unlocked */ __HAL_UNLOCK(hcryp); /* Return function status */ return HAL_OK; } /** * @brief Initializes the CRYP peripheral in AES GCM encryption mode using IT. * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains * the configuration information for CRYP module * @param pPlainData: Pointer to the plaintext buffer * @param Size: Length of the plaintext buffer, must be a multiple of 16 * @param pCypherData: Pointer to the cyphertext buffer * @retval HAL status */ HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData) { uint32_t tickstart = 0; uint32_t inputaddr; uint32_t outputaddr; if(hcryp->State == HAL_CRYP_STATE_READY) { /* Process Locked */ __HAL_LOCK(hcryp); /* Get the buffer addresses and sizes */ hcryp->CrypInCount = Size; hcryp->pCrypInBuffPtr = pPlainData; hcryp->pCrypOutBuffPtr = pCypherData; hcryp->CrypOutCount = Size; /* Change the CRYP peripheral state */ hcryp->State = HAL_CRYP_STATE_BUSY; /* Check if initialization phase has already been performed */ if(hcryp->Phase == HAL_CRYP_PHASE_READY) { /* Set the key */ CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize); /* Set the CRYP peripheral in AES GCM mode */ __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_GCM_ENCRYPT); /* Set the Initialization Vector */ CRYPEx_GCMCCM_SetInitVector(hcryp, hcryp->Init.pInitVect); /* Flush FIFO */ __HAL_CRYP_FIFO_FLUSH(hcryp); /* Enable CRYP to start the init phase */ __HAL_CRYP_ENABLE(hcryp); /* Get tick */ tickstart = HAL_GetTick(); while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN) { /* Check for the Timeout */ if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE) { /* Change state */ hcryp->State = HAL_CRYP_STATE_TIMEOUT; /* Process Unlocked */ __HAL_UNLOCK(hcryp); return HAL_TIMEOUT; } } /* Set the header phase */ if(CRYPEx_GCMCCM_SetHeaderPhase(hcryp, hcryp->Init.Header, hcryp->Init.HeaderSize, 1) != HAL_OK) { return HAL_TIMEOUT; } /* Disable the CRYP peripheral */ __HAL_CRYP_DISABLE(hcryp); /* Select payload phase once the header phase is performed */ __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); /* Flush FIFO */ __HAL_CRYP_FIFO_FLUSH(hcryp); /* Set the phase */ hcryp->Phase = HAL_CRYP_PHASE_PROCESS; } if(Size != 0) { /* Enable Interrupts */ __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI); /* Enable the CRYP peripheral */ __HAL_CRYP_ENABLE(hcryp); } else { /* Process Locked */ __HAL_UNLOCK(hcryp); /* Change the CRYP state and phase */ hcryp->State = HAL_CRYP_STATE_READY; } /* Return function status */ return HAL_OK; } else if (__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI)) { inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; /* Write the Input block in the IN FIFO */ hcryp->Instance->DR = *(uint32_t*)(inputaddr); inputaddr+=4; hcryp->Instance->DR = *(uint32_t*)(inputaddr); inputaddr+=4; hcryp->Instance->DR = *(uint32_t*)(inputaddr); inputaddr+=4; hcryp->Instance->DR = *(uint32_t*)(inputaddr); hcryp->pCrypInBuffPtr += 16; hcryp->CrypInCount -= 16; if(hcryp->CrypInCount == 0) { __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI); /* Call the Input data transfer complete callback */ HAL_CRYP_InCpltCallback(hcryp); } } else if (__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI)) { outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr; /* Read the Output block from the Output FIFO */ *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT; outputaddr+=4; *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT; outputaddr+=4; *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT; outputaddr+=4; *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT; hcryp->pCrypOutBuffPtr += 16; hcryp->CrypOutCount -= 16; if(hcryp->CrypOutCount == 0) { __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI); /* Process Unlocked */ __HAL_UNLOCK(hcryp); /* Change the CRYP peripheral state */ hcryp->State = HAL_CRYP_STATE_READY; /* Call Input transfer complete callback */ HAL_CRYP_OutCpltCallback(hcryp); } } /* Return function status */ return HAL_OK; } /** * @brief Initializes the CRYP peripheral in AES CCM encryption mode using interrupt. * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains * the configuration information for CRYP module * @param pPlainData: Pointer to the plaintext buffer * @param Size: Length of the plaintext buffer, must be a multiple of 16 * @param pCypherData: Pointer to the cyphertext buffer * @retval HAL status */ HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData) { uint32_t tickstart = 0; uint32_t inputaddr; uint32_t outputaddr; uint32_t headersize = hcryp->Init.HeaderSize; uint32_t headeraddr = (uint32_t)hcryp->Init.Header; uint32_t loopcounter = 0; uint32_t bufferidx = 0; uint8_t blockb0[16] = {0};/* Block B0 */ uint8_t ctr[16] = {0}; /* Counter */ uint32_t b0addr = (uint32_t)blockb0; if(hcryp->State == HAL_CRYP_STATE_READY) { /* Process Locked */ __HAL_LOCK(hcryp); hcryp->CrypInCount = Size; hcryp->pCrypInBuffPtr = pPlainData; hcryp->pCrypOutBuffPtr = pCypherData; hcryp->CrypOutCount = Size; /* Change the CRYP peripheral state */ hcryp->State = HAL_CRYP_STATE_BUSY; /* Check if initialization phase has already been performed */ if(hcryp->Phase == HAL_CRYP_PHASE_READY) { /************************ Formatting the header block *******************/ if(headersize != 0) { /* Check that the associated data (or header) length is lower than 2^16 - 2^8 = 65536 - 256 = 65280 */ if(headersize < 65280) { hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize >> 8) & 0xFF); hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize) & 0xFF); headersize += 2; } else { /* Header is encoded as 0xff || 0xfe || [headersize]32, i.e., six octets */ hcryp->Init.pScratch[bufferidx++] = 0xFF; hcryp->Init.pScratch[bufferidx++] = 0xFE; hcryp->Init.pScratch[bufferidx++] = headersize & 0xff000000; hcryp->Init.pScratch[bufferidx++] = headersize & 0x00ff0000; hcryp->Init.pScratch[bufferidx++] = headersize & 0x0000ff00; hcryp->Init.pScratch[bufferidx++] = headersize & 0x000000ff; headersize += 6; } /* Copy the header buffer in internal buffer "hcryp->Init.pScratch" */ for(loopcounter = 0; loopcounter < headersize; loopcounter++) { hcryp->Init.pScratch[bufferidx++] = hcryp->Init.Header[loopcounter]; } /* Check if the header size is modulo 16 */ if ((headersize % 16) != 0) { /* Padd the header buffer with 0s till the hcryp->Init.pScratch length is modulo 16 */ for(loopcounter = headersize; loopcounter <= ((headersize/16) + 1) * 16; loopcounter++) { hcryp->Init.pScratch[loopcounter] = 0; } /* Set the header size to modulo 16 */ headersize = ((headersize/16) + 1) * 16; } /* Set the pointer headeraddr to hcryp->Init.pScratch */ headeraddr = (uint32_t)hcryp->Init.pScratch; } /*********************** Formatting the block B0 ************************/ if(headersize != 0) { blockb0[0] = 0x40; } /* Flags byte */ /* blockb0[0] |= 0u | (((( (uint8_t) hcryp->Init.TagSize - 2) / 2) & 0x07 ) << 3 ) | ( ( (uint8_t) (15 - hcryp->Init.IVSize) - 1) & 0x07) */ blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)(((uint8_t)(hcryp->Init.TagSize - (uint8_t)(2))) >> 1) & (uint8_t)0x07 ) << 3); blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)((uint8_t)(15) - hcryp->Init.IVSize) - (uint8_t)1) & (uint8_t)0x07); for (loopcounter = 0; loopcounter < hcryp->Init.IVSize; loopcounter++) { blockb0[loopcounter+1] = hcryp->Init.pInitVect[loopcounter]; } for ( ; loopcounter < 13; loopcounter++) { blockb0[loopcounter+1] = 0; } blockb0[14] = (Size >> 8); blockb0[15] = (Size & 0xFF); /************************* Formatting the initial counter ***************/ /* Byte 0: Bits 7 and 6 are reserved and shall be set to 0 Bits 3, 4, and 5 shall also be set to 0, to ensure that all the counter blocks are distinct from B0 Bits 0, 1, and 2 contain the same encoding of q as in B0 */ ctr[0] = blockb0[0] & 0x07; /* byte 1 to NonceSize is the IV (Nonce) */ for(loopcounter = 1; loopcounter < hcryp->Init.IVSize + 1; loopcounter++) { ctr[loopcounter] = blockb0[loopcounter]; } /* Set the LSB to 1 */ ctr[15] |= 0x01; /* Set the key */ CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize); /* Set the CRYP peripheral in AES CCM mode */ __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CCM_ENCRYPT); /* Set the Initialization Vector */ CRYPEx_GCMCCM_SetInitVector(hcryp, ctr); /* Select init phase */ __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); b0addr = (uint32_t)blockb0; /* Write the blockb0 block in the IN FIFO */ hcryp->Instance->DR = *(uint32_t*)(b0addr); b0addr+=4; hcryp->Instance->DR = *(uint32_t*)(b0addr); b0addr+=4; hcryp->Instance->DR = *(uint32_t*)(b0addr); b0addr+=4; hcryp->Instance->DR = *(uint32_t*)(b0addr); /* Enable the CRYP peripheral */ __HAL_CRYP_ENABLE(hcryp); /* Get tick */ tickstart = HAL_GetTick(); while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN) { /* Check for the Timeout */ if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE) { /* Change state */ hcryp->State = HAL_CRYP_STATE_TIMEOUT; /* Process Unlocked */ __HAL_UNLOCK(hcryp); return HAL_TIMEOUT; } } /***************************** Header phase *****************************/ if(headersize != 0) { /* Select header phase */ __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); /* Enable Crypto processor */ __HAL_CRYP_ENABLE(hcryp); for(loopcounter = 0; (loopcounter < headersize); loopcounter+=16) { /* Get tick */ tickstart = HAL_GetTick(); while(HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_IFEM)) { /* Check for the Timeout */ if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE) { /* Change state */ hcryp->State = HAL_CRYP_STATE_TIMEOUT; /* Process Unlocked */ __HAL_UNLOCK(hcryp); return HAL_TIMEOUT; } } /* Write the header block in the IN FIFO */ hcryp->Instance->DR = *(uint32_t*)(headeraddr); headeraddr+=4; hcryp->Instance->DR = *(uint32_t*)(headeraddr); headeraddr+=4; hcryp->Instance->DR = *(uint32_t*)(headeraddr); headeraddr+=4; hcryp->Instance->DR = *(uint32_t*)(headeraddr); headeraddr+=4; } /* Get tick */ tickstart = HAL_GetTick(); while((hcryp->Instance->SR & CRYP_FLAG_BUSY) == CRYP_FLAG_BUSY) { /* Check for the Timeout */ if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE) { /* Change state */ hcryp->State = HAL_CRYP_STATE_TIMEOUT; /* Process Unlocked */ __HAL_UNLOCK(hcryp); return HAL_TIMEOUT; } } } /* Save formatted counter into the scratch buffer pScratch */ for(loopcounter = 0; (loopcounter < 16); loopcounter++) { hcryp->Init.pScratch[loopcounter] = ctr[loopcounter]; } /* Reset bit 0 */ hcryp->Init.pScratch[15] &= 0xfe; /* Select payload phase once the header phase is performed */ __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); /* Flush FIFO */ __HAL_CRYP_FIFO_FLUSH(hcryp); /* Set the phase */ hcryp->Phase = HAL_CRYP_PHASE_PROCESS; } if(Size != 0) { /* Enable Interrupts */ __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI); /* Enable the CRYP peripheral */ __HAL_CRYP_ENABLE(hcryp); } else { /* Change the CRYP state and phase */ hcryp->State = HAL_CRYP_STATE_READY; } /* Return function status */ return HAL_OK; } else if (__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI)) { inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; /* Write the Input block in the IN FIFO */ hcryp->Instance->DR = *(uint32_t*)(inputaddr); inputaddr+=4; hcryp->Instance->DR = *(uint32_t*)(inputaddr); inputaddr+=4; hcryp->Instance->DR = *(uint32_t*)(inputaddr); inputaddr+=4; hcryp->Instance->DR = *(uint32_t*)(inputaddr); hcryp->pCrypInBuffPtr += 16; hcryp->CrypInCount -= 16; if(hcryp->CrypInCount == 0) { __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI); /* Call Input transfer complete callback */ HAL_CRYP_InCpltCallback(hcryp); } } else if (__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI)) { outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr; /* Read the Output block from the Output FIFO */ *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT; outputaddr+=4; *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT; outputaddr+=4; *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT; outputaddr+=4; *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT; hcryp->pCrypOutBuffPtr += 16; hcryp->CrypOutCount -= 16; if(hcryp->CrypOutCount == 0) { __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI); /* Process Unlocked */ __HAL_UNLOCK(hcryp); /* Change the CRYP peripheral state */ hcryp->State = HAL_CRYP_STATE_READY; /* Call Input transfer complete callback */ HAL_CRYP_OutCpltCallback(hcryp); } } /* Return function status */ return HAL_OK; } /** * @brief Initializes the CRYP peripheral in AES GCM decryption mode using IT. * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains * the configuration information for CRYP module * @param pCypherData: Pointer to the cyphertext buffer * @param Size: Length of the cyphertext buffer, must be a multiple of 16 * @param pPlainData: Pointer to the plaintext buffer * @retval HAL status */ HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData) { uint32_t tickstart = 0; uint32_t inputaddr; uint32_t outputaddr; if(hcryp->State == HAL_CRYP_STATE_READY) { /* Process Locked */ __HAL_LOCK(hcryp); /* Get the buffer addresses and sizes */ hcryp->CrypInCount = Size; hcryp->pCrypInBuffPtr = pCypherData; hcryp->pCrypOutBuffPtr = pPlainData; hcryp->CrypOutCount = Size; /* Change the CRYP peripheral state */ hcryp->State = HAL_CRYP_STATE_BUSY; /* Check if initialization phase has already been performed */ if(hcryp->Phase == HAL_CRYP_PHASE_READY) { /* Set the key */ CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize); /* Set the CRYP peripheral in AES GCM decryption mode */ __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_GCM_DECRYPT); /* Set the Initialization Vector */ CRYPEx_GCMCCM_SetInitVector(hcryp, hcryp->Init.pInitVect); /* Flush FIFO */ __HAL_CRYP_FIFO_FLUSH(hcryp); /* Enable CRYP to start the init phase */ __HAL_CRYP_ENABLE(hcryp); /* Get tick */ tickstart = HAL_GetTick(); while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN) { /* Check for the Timeout */ if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE) { /* Change state */ hcryp->State = HAL_CRYP_STATE_TIMEOUT; /* Process Unlocked */ __HAL_UNLOCK(hcryp); return HAL_TIMEOUT; } } /* Set the header phase */ if(CRYPEx_GCMCCM_SetHeaderPhase(hcryp, hcryp->Init.Header, hcryp->Init.HeaderSize, 1) != HAL_OK) { return HAL_TIMEOUT; } /* Disable the CRYP peripheral */ __HAL_CRYP_DISABLE(hcryp); /* Select payload phase once the header phase is performed */ __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); /* Set the phase */ hcryp->Phase = HAL_CRYP_PHASE_PROCESS; } if(Size != 0) { /* Enable Interrupts */ __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI); /* Enable the CRYP peripheral */ __HAL_CRYP_ENABLE(hcryp); } else { /* Process Locked */ __HAL_UNLOCK(hcryp); /* Change the CRYP state and phase */ hcryp->State = HAL_CRYP_STATE_READY; } /* Return function status */ return HAL_OK; } else if (__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI)) { inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; /* Write the Input block in the IN FIFO */ hcryp->Instance->DR = *(uint32_t*)(inputaddr); inputaddr+=4; hcryp->Instance->DR = *(uint32_t*)(inputaddr); inputaddr+=4; hcryp->Instance->DR = *(uint32_t*)(inputaddr); inputaddr+=4; hcryp->Instance->DR = *(uint32_t*)(inputaddr); hcryp->pCrypInBuffPtr += 16; hcryp->CrypInCount -= 16; if(hcryp->CrypInCount == 0) { __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI); /* Call the Input data transfer complete callback */ HAL_CRYP_InCpltCallback(hcryp); } } else if (__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI)) { outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr; /* Read the Output block from the Output FIFO */ *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT; outputaddr+=4; *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT; outputaddr+=4; *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT; outputaddr+=4; *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT; hcryp->pCrypOutBuffPtr += 16; hcryp->CrypOutCount -= 16; if(hcryp->CrypOutCount == 0) { __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI); /* Process Unlocked */ __HAL_UNLOCK(hcryp); /* Change the CRYP peripheral state */ hcryp->State = HAL_CRYP_STATE_READY; /* Call Input transfer complete callback */ HAL_CRYP_OutCpltCallback(hcryp); } } /* Return function status */ return HAL_OK; } /** * @brief Initializes the CRYP peripheral in AES CCM decryption mode using interrupt * then decrypted pCypherData. The cypher data are available in pPlainData. * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains * the configuration information for CRYP module * @param pCypherData: Pointer to the cyphertext buffer * @param Size: Length of the plaintext buffer, must be a multiple of 16 * @param pPlainData: Pointer to the plaintext buffer * @retval HAL status */ HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData) { uint32_t inputaddr; uint32_t outputaddr; uint32_t tickstart = 0; uint32_t headersize = hcryp->Init.HeaderSize; uint32_t headeraddr = (uint32_t)hcryp->Init.Header; uint32_t loopcounter = 0; uint32_t bufferidx = 0; uint8_t blockb0[16] = {0};/* Block B0 */ uint8_t ctr[16] = {0}; /* Counter */ uint32_t b0addr = (uint32_t)blockb0; if(hcryp->State == HAL_CRYP_STATE_READY) { /* Process Locked */ __HAL_LOCK(hcryp); hcryp->CrypInCount = Size; hcryp->pCrypInBuffPtr = pCypherData; hcryp->pCrypOutBuffPtr = pPlainData; hcryp->CrypOutCount = Size; /* Change the CRYP peripheral state */ hcryp->State = HAL_CRYP_STATE_BUSY; /* Check if initialization phase has already been performed */ if(hcryp->Phase == HAL_CRYP_PHASE_READY) { /************************ Formatting the header block *******************/ if(headersize != 0) { /* Check that the associated data (or header) length is lower than 2^16 - 2^8 = 65536 - 256 = 65280 */ if(headersize < 65280) { hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize >> 8) & 0xFF); hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize) & 0xFF); headersize += 2; } else { /* Header is encoded as 0xff || 0xfe || [headersize]32, i.e., six octets */ hcryp->Init.pScratch[bufferidx++] = 0xFF; hcryp->Init.pScratch[bufferidx++] = 0xFE; hcryp->Init.pScratch[bufferidx++] = headersize & 0xff000000; hcryp->Init.pScratch[bufferidx++] = headersize & 0x00ff0000; hcryp->Init.pScratch[bufferidx++] = headersize & 0x0000ff00; hcryp->Init.pScratch[bufferidx++] = headersize & 0x000000ff; headersize += 6; } /* Copy the header buffer in internal buffer "hcryp->Init.pScratch" */ for(loopcounter = 0; loopcounter < headersize; loopcounter++) { hcryp->Init.pScratch[bufferidx++] = hcryp->Init.Header[loopcounter]; } /* Check if the header size is modulo 16 */ if ((headersize % 16) != 0) { /* Padd the header buffer with 0s till the hcryp->Init.pScratch length is modulo 16 */ for(loopcounter = headersize; loopcounter <= ((headersize/16) + 1) * 16; loopcounter++) { hcryp->Init.pScratch[loopcounter] = 0; } /* Set the header size to modulo 16 */ headersize = ((headersize/16) + 1) * 16; } /* Set the pointer headeraddr to hcryp->Init.pScratch */ headeraddr = (uint32_t)hcryp->Init.pScratch; } /*********************** Formatting the block B0 ************************/ if(headersize != 0) { blockb0[0] = 0x40; } /* Flags byte */ /* blockb0[0] |= 0u | (((( (uint8_t) hcryp->Init.TagSize - 2) / 2) & 0x07 ) << 3 ) | ( ( (uint8_t) (15 - hcryp->Init.IVSize) - 1) & 0x07) */ blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)(((uint8_t)(hcryp->Init.TagSize - (uint8_t)(2))) >> 1) & (uint8_t)0x07 ) << 3); blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)((uint8_t)(15) - hcryp->Init.IVSize) - (uint8_t)1) & (uint8_t)0x07); for (loopcounter = 0; loopcounter < hcryp->Init.IVSize; loopcounter++) { blockb0[loopcounter+1] = hcryp->Init.pInitVect[loopcounter]; } for ( ; loopcounter < 13; loopcounter++) { blockb0[loopcounter+1] = 0; } blockb0[14] = (Size >> 8); blockb0[15] = (Size & 0xFF); /************************* Formatting the initial counter ***************/ /* Byte 0: Bits 7 and 6 are reserved and shall be set to 0 Bits 3, 4, and 5 shall also be set to 0, to ensure that all the counter blocks are distinct from B0 Bits 0, 1, and 2 contain the same encoding of q as in B0 */ ctr[0] = blockb0[0] & 0x07; /* byte 1 to NonceSize is the IV (Nonce) */ for(loopcounter = 1; loopcounter < hcryp->Init.IVSize + 1; loopcounter++) { ctr[loopcounter] = blockb0[loopcounter]; } /* Set the LSB to 1 */ ctr[15] |= 0x01; /* Set the key */ CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize); /* Set the CRYP peripheral in AES CCM mode */ __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CCM_DECRYPT); /* Set the Initialization Vector */ CRYPEx_GCMCCM_SetInitVector(hcryp, ctr); /* Select init phase */ __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); b0addr = (uint32_t)blockb0; /* Write the blockb0 block in the IN FIFO */ hcryp->Instance->DR = *(uint32_t*)(b0addr); b0addr+=4; hcryp->Instance->DR = *(uint32_t*)(b0addr); b0addr+=4; hcryp->Instance->DR = *(uint32_t*)(b0addr); b0addr+=4; hcryp->Instance->DR = *(uint32_t*)(b0addr); /* Enable the CRYP peripheral */ __HAL_CRYP_ENABLE(hcryp); /* Get tick */ tickstart = HAL_GetTick(); while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN) { /* Check for the Timeout */ if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE) { /* Change state */ hcryp->State = HAL_CRYP_STATE_TIMEOUT; /* Process Unlocked */ __HAL_UNLOCK(hcryp); return HAL_TIMEOUT; } } /***************************** Header phase *****************************/ if(headersize != 0) { /* Select header phase */ __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); /* Enable Crypto processor */ __HAL_CRYP_ENABLE(hcryp); for(loopcounter = 0; (loopcounter < headersize); loopcounter+=16) { /* Get tick */ tickstart = HAL_GetTick(); while(HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_IFEM)) { /* Check for the Timeout */ if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE) { /* Change state */ hcryp->State = HAL_CRYP_STATE_TIMEOUT; /* Process Unlocked */ __HAL_UNLOCK(hcryp); return HAL_TIMEOUT; } } /* Write the header block in the IN FIFO */ hcryp->Instance->DR = *(uint32_t*)(headeraddr); headeraddr+=4; hcryp->Instance->DR = *(uint32_t*)(headeraddr); headeraddr+=4; hcryp->Instance->DR = *(uint32_t*)(headeraddr); headeraddr+=4; hcryp->Instance->DR = *(uint32_t*)(headeraddr); headeraddr+=4; } /* Get tick */ tickstart = HAL_GetTick(); while((hcryp->Instance->SR & CRYP_FLAG_BUSY) == CRYP_FLAG_BUSY) { /* Check for the Timeout */ if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE) { /* Change state */ hcryp->State = HAL_CRYP_STATE_TIMEOUT; /* Process Unlocked */ __HAL_UNLOCK(hcryp); return HAL_TIMEOUT; } } } /* Save formatted counter into the scratch buffer pScratch */ for(loopcounter = 0; (loopcounter < 16); loopcounter++) { hcryp->Init.pScratch[loopcounter] = ctr[loopcounter]; } /* Reset bit 0 */ hcryp->Init.pScratch[15] &= 0xfe; /* Select payload phase once the header phase is performed */ __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); /* Flush FIFO */ __HAL_CRYP_FIFO_FLUSH(hcryp); /* Set the phase */ hcryp->Phase = HAL_CRYP_PHASE_PROCESS; } /* Enable Interrupts */ __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI); /* Enable the CRYP peripheral */ __HAL_CRYP_ENABLE(hcryp); /* Return function status */ return HAL_OK; } else if (__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI)) { inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; /* Write the Input block in the IN FIFO */ hcryp->Instance->DR = *(uint32_t*)(inputaddr); inputaddr+=4; hcryp->Instance->DR = *(uint32_t*)(inputaddr); inputaddr+=4; hcryp->Instance->DR = *(uint32_t*)(inputaddr); inputaddr+=4; hcryp->Instance->DR = *(uint32_t*)(inputaddr); hcryp->pCrypInBuffPtr += 16; hcryp->CrypInCount -= 16; if(hcryp->CrypInCount == 0) { __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI); /* Call the Input data transfer complete callback */ HAL_CRYP_InCpltCallback(hcryp); } } else if (__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI)) { outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr; /* Read the Output block from the Output FIFO */ *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT; outputaddr+=4; *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT; outputaddr+=4; *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT; outputaddr+=4; *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT; hcryp->pCrypOutBuffPtr += 16; hcryp->CrypOutCount -= 16; if(hcryp->CrypOutCount == 0) { __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI); /* Process Unlocked */ __HAL_UNLOCK(hcryp); /* Change the CRYP peripheral state */ hcryp->State = HAL_CRYP_STATE_READY; /* Call Input transfer complete callback */ HAL_CRYP_OutCpltCallback(hcryp); } } /* Return function status */ return HAL_OK; } /** * @brief Initializes the CRYP peripheral in AES GCM encryption mode using DMA. * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains * the configuration information for CRYP module * @param pPlainData: Pointer to the plaintext buffer * @param Size: Length of the plaintext buffer, must be a multiple of 16 * @param pCypherData: Pointer to the cyphertext buffer * @retval HAL status */ HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData) { uint32_t tickstart = 0; uint32_t inputaddr; uint32_t outputaddr; if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS)) { /* Process Locked */ __HAL_LOCK(hcryp); inputaddr = (uint32_t)pPlainData; outputaddr = (uint32_t)pCypherData; /* Change the CRYP peripheral state */ hcryp->State = HAL_CRYP_STATE_BUSY; /* Check if initialization phase has already been performed */ if(hcryp->Phase == HAL_CRYP_PHASE_READY) { /* Set the key */ CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize); /* Set the CRYP peripheral in AES GCM mode */ __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_GCM_ENCRYPT); /* Set the Initialization Vector */ CRYPEx_GCMCCM_SetInitVector(hcryp, hcryp->Init.pInitVect); /* Flush FIFO */ __HAL_CRYP_FIFO_FLUSH(hcryp); /* Enable CRYP to start the init phase */ __HAL_CRYP_ENABLE(hcryp); /* Get tick */ tickstart = HAL_GetTick(); while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN) { /* Check for the Timeout */ if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE) { /* Change state */ hcryp->State = HAL_CRYP_STATE_TIMEOUT; /* Process Unlocked */ __HAL_UNLOCK(hcryp); return HAL_TIMEOUT; } } /* Flush FIFO */ __HAL_CRYP_FIFO_FLUSH(hcryp); /* Set the header phase */ if(CRYPEx_GCMCCM_SetHeaderPhase(hcryp, hcryp->Init.Header, hcryp->Init.HeaderSize, 1) != HAL_OK) { return HAL_TIMEOUT; } /* Disable the CRYP peripheral */ __HAL_CRYP_DISABLE(hcryp); /* Select payload phase once the header phase is performed */ __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); /* Flush FIFO */ __HAL_CRYP_FIFO_FLUSH(hcryp); /* Set the phase */ hcryp->Phase = HAL_CRYP_PHASE_PROCESS; } /* Set the input and output addresses and start DMA transfer */ CRYPEx_GCMCCM_SetDMAConfig(hcryp, inputaddr, Size, outputaddr); /* Unlock process */ __HAL_UNLOCK(hcryp); /* Return function status */ return HAL_OK; } else { return HAL_ERROR; } } /** * @brief Initializes the CRYP peripheral in AES CCM encryption mode using interrupt. * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains * the configuration information for CRYP module * @param pPlainData: Pointer to the plaintext buffer * @param Size: Length of the plaintext buffer, must be a multiple of 16 * @param pCypherData: Pointer to the cyphertext buffer * @retval HAL status */ HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData) { uint32_t tickstart = 0; uint32_t inputaddr; uint32_t outputaddr; uint32_t headersize; uint32_t headeraddr; uint32_t loopcounter = 0; uint32_t bufferidx = 0; uint8_t blockb0[16] = {0};/* Block B0 */ uint8_t ctr[16] = {0}; /* Counter */ uint32_t b0addr = (uint32_t)blockb0; if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS)) { /* Process Locked */ __HAL_LOCK(hcryp); inputaddr = (uint32_t)pPlainData; outputaddr = (uint32_t)pCypherData; headersize = hcryp->Init.HeaderSize; headeraddr = (uint32_t)hcryp->Init.Header; hcryp->CrypInCount = Size; hcryp->pCrypInBuffPtr = pPlainData; hcryp->pCrypOutBuffPtr = pCypherData; hcryp->CrypOutCount = Size; /* Change the CRYP peripheral state */ hcryp->State = HAL_CRYP_STATE_BUSY; /* Check if initialization phase has already been performed */ if(hcryp->Phase == HAL_CRYP_PHASE_READY) { /************************ Formatting the header block *******************/ if(headersize != 0) { /* Check that the associated data (or header) length is lower than 2^16 - 2^8 = 65536 - 256 = 65280 */ if(headersize < 65280) { hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize >> 8) & 0xFF); hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize) & 0xFF); headersize += 2; } else { /* Header is encoded as 0xff || 0xfe || [headersize]32, i.e., six octets */ hcryp->Init.pScratch[bufferidx++] = 0xFF; hcryp->Init.pScratch[bufferidx++] = 0xFE; hcryp->Init.pScratch[bufferidx++] = headersize & 0xff000000; hcryp->Init.pScratch[bufferidx++] = headersize & 0x00ff0000; hcryp->Init.pScratch[bufferidx++] = headersize & 0x0000ff00; hcryp->Init.pScratch[bufferidx++] = headersize & 0x000000ff; headersize += 6; } /* Copy the header buffer in internal buffer "hcryp->Init.pScratch" */ for(loopcounter = 0; loopcounter < headersize; loopcounter++) { hcryp->Init.pScratch[bufferidx++] = hcryp->Init.Header[loopcounter]; } /* Check if the header size is modulo 16 */ if ((headersize % 16) != 0) { /* Padd the header buffer with 0s till the hcryp->Init.pScratch length is modulo 16 */ for(loopcounter = headersize; loopcounter <= ((headersize/16) + 1) * 16; loopcounter++) { hcryp->Init.pScratch[loopcounter] = 0; } /* Set the header size to modulo 16 */ headersize = ((headersize/16) + 1) * 16; } /* Set the pointer headeraddr to hcryp->Init.pScratch */ headeraddr = (uint32_t)hcryp->Init.pScratch; } /*********************** Formatting the block B0 ************************/ if(headersize != 0) { blockb0[0] = 0x40; } /* Flags byte */ /* blockb0[0] |= 0u | (((( (uint8_t) hcryp->Init.TagSize - 2) / 2) & 0x07 ) << 3 ) | ( ( (uint8_t) (15 - hcryp->Init.IVSize) - 1) & 0x07) */ blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)(((uint8_t)(hcryp->Init.TagSize - (uint8_t)(2))) >> 1) & (uint8_t)0x07 ) << 3); blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)((uint8_t)(15) - hcryp->Init.IVSize) - (uint8_t)1) & (uint8_t)0x07); for (loopcounter = 0; loopcounter < hcryp->Init.IVSize; loopcounter++) { blockb0[loopcounter+1] = hcryp->Init.pInitVect[loopcounter]; } for ( ; loopcounter < 13; loopcounter++) { blockb0[loopcounter+1] = 0; } blockb0[14] = (Size >> 8); blockb0[15] = (Size & 0xFF); /************************* Formatting the initial counter ***************/ /* Byte 0: Bits 7 and 6 are reserved and shall be set to 0 Bits 3, 4, and 5 shall also be set to 0, to ensure that all the counter blocks are distinct from B0 Bits 0, 1, and 2 contain the same encoding of q as in B0 */ ctr[0] = blockb0[0] & 0x07; /* byte 1 to NonceSize is the IV (Nonce) */ for(loopcounter = 1; loopcounter < hcryp->Init.IVSize + 1; loopcounter++) { ctr[loopcounter] = blockb0[loopcounter]; } /* Set the LSB to 1 */ ctr[15] |= 0x01; /* Set the key */ CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize); /* Set the CRYP peripheral in AES CCM mode */ __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CCM_ENCRYPT); /* Set the Initialization Vector */ CRYPEx_GCMCCM_SetInitVector(hcryp, ctr); /* Select init phase */ __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); b0addr = (uint32_t)blockb0; /* Write the blockb0 block in the IN FIFO */ hcryp->Instance->DR = *(uint32_t*)(b0addr); b0addr+=4; hcryp->Instance->DR = *(uint32_t*)(b0addr); b0addr+=4; hcryp->Instance->DR = *(uint32_t*)(b0addr); b0addr+=4; hcryp->Instance->DR = *(uint32_t*)(b0addr); /* Enable the CRYP peripheral */ __HAL_CRYP_ENABLE(hcryp); /* Get tick */ tickstart = HAL_GetTick(); while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN) { /* Check for the Timeout */ if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE) { /* Change state */ hcryp->State = HAL_CRYP_STATE_TIMEOUT; /* Process Unlocked */ __HAL_UNLOCK(hcryp); return HAL_TIMEOUT; } } /***************************** Header phase *****************************/ if(headersize != 0) { /* Select header phase */ __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); /* Enable Crypto processor */ __HAL_CRYP_ENABLE(hcryp); for(loopcounter = 0; (loopcounter < headersize); loopcounter+=16) { /* Get tick */ tickstart = HAL_GetTick(); while(HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_IFEM)) { /* Check for the Timeout */ if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE) { /* Change state */ hcryp->State = HAL_CRYP_STATE_TIMEOUT; /* Process Unlocked */ __HAL_UNLOCK(hcryp); return HAL_TIMEOUT; } } /* Write the header block in the IN FIFO */ hcryp->Instance->DR = *(uint32_t*)(headeraddr); headeraddr+=4; hcryp->Instance->DR = *(uint32_t*)(headeraddr); headeraddr+=4; hcryp->Instance->DR = *(uint32_t*)(headeraddr); headeraddr+=4; hcryp->Instance->DR = *(uint32_t*)(headeraddr); headeraddr+=4; } /* Get tick */ tickstart = HAL_GetTick(); while((hcryp->Instance->SR & CRYP_FLAG_BUSY) == CRYP_FLAG_BUSY) { /* Check for the Timeout */ if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE) { /* Change state */ hcryp->State = HAL_CRYP_STATE_TIMEOUT; /* Process Unlocked */ __HAL_UNLOCK(hcryp); return HAL_TIMEOUT; } } } /* Save formatted counter into the scratch buffer pScratch */ for(loopcounter = 0; (loopcounter < 16); loopcounter++) { hcryp->Init.pScratch[loopcounter] = ctr[loopcounter]; } /* Reset bit 0 */ hcryp->Init.pScratch[15] &= 0xfe; /* Select payload phase once the header phase is performed */ __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); /* Flush FIFO */ __HAL_CRYP_FIFO_FLUSH(hcryp); /* Set the phase */ hcryp->Phase = HAL_CRYP_PHASE_PROCESS; } /* Set the input and output addresses and start DMA transfer */ CRYPEx_GCMCCM_SetDMAConfig(hcryp, inputaddr, Size, outputaddr); /* Unlock process */ __HAL_UNLOCK(hcryp); /* Return function status */ return HAL_OK; } else { return HAL_ERROR; } } /** * @brief Initializes the CRYP peripheral in AES GCM decryption mode using DMA. * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains * the configuration information for CRYP module * @param pCypherData: Pointer to the cyphertext buffer. * @param Size: Length of the cyphertext buffer, must be a multiple of 16 * @param pPlainData: Pointer to the plaintext buffer * @retval HAL status */ HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData) { uint32_t tickstart = 0; uint32_t inputaddr; uint32_t outputaddr; if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS)) { /* Process Locked */ __HAL_LOCK(hcryp); inputaddr = (uint32_t)pCypherData; outputaddr = (uint32_t)pPlainData; /* Change the CRYP peripheral state */ hcryp->State = HAL_CRYP_STATE_BUSY; /* Check if initialization phase has already been performed */ if(hcryp->Phase == HAL_CRYP_PHASE_READY) { /* Set the key */ CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize); /* Set the CRYP peripheral in AES GCM decryption mode */ __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_GCM_DECRYPT); /* Set the Initialization Vector */ CRYPEx_GCMCCM_SetInitVector(hcryp, hcryp->Init.pInitVect); /* Enable CRYP to start the init phase */ __HAL_CRYP_ENABLE(hcryp); /* Get tick */ tickstart = HAL_GetTick(); while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN) { /* Check for the Timeout */ if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE) { /* Change state */ hcryp->State = HAL_CRYP_STATE_TIMEOUT; /* Process Unlocked */ __HAL_UNLOCK(hcryp); return HAL_TIMEOUT; } } /* Set the header phase */ if(CRYPEx_GCMCCM_SetHeaderPhase(hcryp, hcryp->Init.Header, hcryp->Init.HeaderSize, 1) != HAL_OK) { return HAL_TIMEOUT; } /* Disable the CRYP peripheral */ __HAL_CRYP_DISABLE(hcryp); /* Select payload phase once the header phase is performed */ __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); /* Set the phase */ hcryp->Phase = HAL_CRYP_PHASE_PROCESS; } /* Set the input and output addresses and start DMA transfer */ CRYPEx_GCMCCM_SetDMAConfig(hcryp, inputaddr, Size, outputaddr); /* Unlock process */ __HAL_UNLOCK(hcryp); /* Return function status */ return HAL_OK; } else { return HAL_ERROR; } } /** * @brief Initializes the CRYP peripheral in AES CCM decryption mode using DMA * then decrypted pCypherData. The cypher data are available in pPlainData. * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains * the configuration information for CRYP module * @param pCypherData: Pointer to the cyphertext buffer * @param Size: Length of the plaintext buffer, must be a multiple of 16 * @param pPlainData: Pointer to the plaintext buffer * @retval HAL status */ HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData) { uint32_t tickstart = 0; uint32_t inputaddr; uint32_t outputaddr; uint32_t headersize; uint32_t headeraddr; uint32_t loopcounter = 0; uint32_t bufferidx = 0; uint8_t blockb0[16] = {0};/* Block B0 */ uint8_t ctr[16] = {0}; /* Counter */ uint32_t b0addr = (uint32_t)blockb0; if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS)) { /* Process Locked */ __HAL_LOCK(hcryp); inputaddr = (uint32_t)pCypherData; outputaddr = (uint32_t)pPlainData; headersize = hcryp->Init.HeaderSize; headeraddr = (uint32_t)hcryp->Init.Header; hcryp->CrypInCount = Size; hcryp->pCrypInBuffPtr = pCypherData; hcryp->pCrypOutBuffPtr = pPlainData; hcryp->CrypOutCount = Size; /* Change the CRYP peripheral state */ hcryp->State = HAL_CRYP_STATE_BUSY; /* Check if initialization phase has already been performed */ if(hcryp->Phase == HAL_CRYP_PHASE_READY) { /************************ Formatting the header block *******************/ if(headersize != 0) { /* Check that the associated data (or header) length is lower than 2^16 - 2^8 = 65536 - 256 = 65280 */ if(headersize < 65280) { hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize >> 8) & 0xFF); hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize) & 0xFF); headersize += 2; } else { /* Header is encoded as 0xff || 0xfe || [headersize]32, i.e., six octets */ hcryp->Init.pScratch[bufferidx++] = 0xFF; hcryp->Init.pScratch[bufferidx++] = 0xFE; hcryp->Init.pScratch[bufferidx++] = headersize & 0xff000000; hcryp->Init.pScratch[bufferidx++] = headersize & 0x00ff0000; hcryp->Init.pScratch[bufferidx++] = headersize & 0x0000ff00; hcryp->Init.pScratch[bufferidx++] = headersize & 0x000000ff; headersize += 6; } /* Copy the header buffer in internal buffer "hcryp->Init.pScratch" */ for(loopcounter = 0; loopcounter < headersize; loopcounter++) { hcryp->Init.pScratch[bufferidx++] = hcryp->Init.Header[loopcounter]; } /* Check if the header size is modulo 16 */ if ((headersize % 16) != 0) { /* Padd the header buffer with 0s till the hcryp->Init.pScratch length is modulo 16 */ for(loopcounter = headersize; loopcounter <= ((headersize/16) + 1) * 16; loopcounter++) { hcryp->Init.pScratch[loopcounter] = 0; } /* Set the header size to modulo 16 */ headersize = ((headersize/16) + 1) * 16; } /* Set the pointer headeraddr to hcryp->Init.pScratch */ headeraddr = (uint32_t)hcryp->Init.pScratch; } /*********************** Formatting the block B0 ************************/ if(headersize != 0) { blockb0[0] = 0x40; } /* Flags byte */ /* blockb0[0] |= 0u | (((( (uint8_t) hcryp->Init.TagSize - 2) / 2) & 0x07 ) << 3 ) | ( ( (uint8_t) (15 - hcryp->Init.IVSize) - 1) & 0x07) */ blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)(((uint8_t)(hcryp->Init.TagSize - (uint8_t)(2))) >> 1) & (uint8_t)0x07 ) << 3); blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)((uint8_t)(15) - hcryp->Init.IVSize) - (uint8_t)1) & (uint8_t)0x07); for (loopcounter = 0; loopcounter < hcryp->Init.IVSize; loopcounter++) { blockb0[loopcounter+1] = hcryp->Init.pInitVect[loopcounter]; } for ( ; loopcounter < 13; loopcounter++) { blockb0[loopcounter+1] = 0; } blockb0[14] = (Size >> 8); blockb0[15] = (Size & 0xFF); /************************* Formatting the initial counter ***************/ /* Byte 0: Bits 7 and 6 are reserved and shall be set to 0 Bits 3, 4, and 5 shall also be set to 0, to ensure that all the counter blocks are distinct from B0 Bits 0, 1, and 2 contain the same encoding of q as in B0 */ ctr[0] = blockb0[0] & 0x07; /* byte 1 to NonceSize is the IV (Nonce) */ for(loopcounter = 1; loopcounter < hcryp->Init.IVSize + 1; loopcounter++) { ctr[loopcounter] = blockb0[loopcounter]; } /* Set the LSB to 1 */ ctr[15] |= 0x01; /* Set the key */ CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize); /* Set the CRYP peripheral in AES CCM mode */ __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CCM_DECRYPT); /* Set the Initialization Vector */ CRYPEx_GCMCCM_SetInitVector(hcryp, ctr); /* Select init phase */ __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); b0addr = (uint32_t)blockb0; /* Write the blockb0 block in the IN FIFO */ hcryp->Instance->DR = *(uint32_t*)(b0addr); b0addr+=4; hcryp->Instance->DR = *(uint32_t*)(b0addr); b0addr+=4; hcryp->Instance->DR = *(uint32_t*)(b0addr); b0addr+=4; hcryp->Instance->DR = *(uint32_t*)(b0addr); /* Enable the CRYP peripheral */ __HAL_CRYP_ENABLE(hcryp); /* Get tick */ tickstart = HAL_GetTick(); while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN) { /* Check for the Timeout */ if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE) { /* Change state */ hcryp->State = HAL_CRYP_STATE_TIMEOUT; /* Process Unlocked */ __HAL_UNLOCK(hcryp); return HAL_TIMEOUT; } } /***************************** Header phase *****************************/ if(headersize != 0) { /* Select header phase */ __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); /* Enable Crypto processor */ __HAL_CRYP_ENABLE(hcryp); for(loopcounter = 0; (loopcounter < headersize); loopcounter+=16) { /* Get tick */ tickstart = HAL_GetTick(); while(HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_IFEM)) { /* Check for the Timeout */ if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE) { /* Change state */ hcryp->State = HAL_CRYP_STATE_TIMEOUT; /* Process Unlocked */ __HAL_UNLOCK(hcryp); return HAL_TIMEOUT; } } /* Write the header block in the IN FIFO */ hcryp->Instance->DR = *(uint32_t*)(headeraddr); headeraddr+=4; hcryp->Instance->DR = *(uint32_t*)(headeraddr); headeraddr+=4; hcryp->Instance->DR = *(uint32_t*)(headeraddr); headeraddr+=4; hcryp->Instance->DR = *(uint32_t*)(headeraddr); headeraddr+=4; } /* Get tick */ tickstart = HAL_GetTick(); while((hcryp->Instance->SR & CRYP_FLAG_BUSY) == CRYP_FLAG_BUSY) { /* Check for the Timeout */ if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE) { /* Change state */ hcryp->State = HAL_CRYP_STATE_TIMEOUT; /* Process Unlocked */ __HAL_UNLOCK(hcryp); return HAL_TIMEOUT; } } } /* Save formatted counter into the scratch buffer pScratch */ for(loopcounter = 0; (loopcounter < 16); loopcounter++) { hcryp->Init.pScratch[loopcounter] = ctr[loopcounter]; } /* Reset bit 0 */ hcryp->Init.pScratch[15] &= 0xfe; /* Select payload phase once the header phase is performed */ __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); /* Flush FIFO */ __HAL_CRYP_FIFO_FLUSH(hcryp); /* Set the phase */ hcryp->Phase = HAL_CRYP_PHASE_PROCESS; } /* Set the input and output addresses and start DMA transfer */ CRYPEx_GCMCCM_SetDMAConfig(hcryp, inputaddr, Size, outputaddr); /* Unlock process */ __HAL_UNLOCK(hcryp); /* Return function status */ return HAL_OK; } else { return HAL_ERROR; } } /** * @} */ /** @defgroup CRYPEx_Exported_Functions_Group2 CRYPEx IRQ handler management * @brief CRYPEx IRQ handler. * @verbatim ============================================================================== ##### CRYPEx IRQ handler management ##### ============================================================================== [..] This section provides CRYPEx IRQ handler function. @endverbatim * @{ */ /** * @brief This function handles CRYPEx interrupt request. * @param hcryp: pointer to a CRYPEx_HandleTypeDef structure that contains * the configuration information for CRYP module * @retval None */ void HAL_CRYPEx_GCMCCM_IRQHandler(CRYP_HandleTypeDef *hcryp) { switch(CRYP->CR & CRYP_CR_ALGOMODE_DIRECTION) { case CRYP_CR_ALGOMODE_AES_GCM_ENCRYPT: HAL_CRYPEx_AESGCM_Encrypt_IT(hcryp, NULL, 0, NULL); break; case CRYP_CR_ALGOMODE_AES_GCM_DECRYPT: HAL_CRYPEx_AESGCM_Decrypt_IT(hcryp, NULL, 0, NULL); break; case CRYP_CR_ALGOMODE_AES_CCM_ENCRYPT: HAL_CRYPEx_AESCCM_Encrypt_IT(hcryp, NULL, 0, NULL); break; case CRYP_CR_ALGOMODE_AES_CCM_DECRYPT: HAL_CRYPEx_AESCCM_Decrypt_IT(hcryp, NULL, 0, NULL); break; default: break; } } /** * @} */ /** * @} */ #endif /* STM32F437xx || STM32F439xx || STM32F479xx */ #endif /* HAL_CRYP_MODULE_ENABLED */ /** * @} */ /** * @} */ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/