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authorPaul Selkirk <paul@psgd.org>2021-06-07 15:47:39 -0400
committerPaul Selkirk <paul@psgd.org>2021-06-07 15:47:39 -0400
commitd0d651241fd66d9d56addaf331d153b933134b06 (patch)
tree91133960a8b8cc0ad8f79b30845cccc8cd6af91e /verilog_constants.h
parent8ef2a4e5f54c8623c98c396e378ec093629b849b (diff)
Add mode bits for the various flavors of SHA-3, so that the softwaresha3_mode
driver doesn't have to know that the core's internal block size is actually 1600 bits.
Diffstat (limited to 'verilog_constants.h')
-rw-r--r--verilog_constants.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/verilog_constants.h b/verilog_constants.h
index 8db5e29..80ff27d 100644
--- a/verilog_constants.h
+++ b/verilog_constants.h
@@ -102,6 +102,11 @@
#define SHA3_256_DIGEST_LEN bitsToBytes(256)
#define SHA3_384_DIGEST_LEN bitsToBytes(384)
#define SHA3_512_DIGEST_LEN bitsToBytes(512)
+#define SHA3_MODE_SHA3_224 (0 << 2)
+#define SHA3_MODE_SHA3_256 (1 << 2)
+#define SHA3_MODE_SHA3_384 (2 << 2)
+#define SHA3_MODE_SHA3_512 (3 << 2)
+#define SHA3_MODE_MASK (3 << 2)
/*
* RNG cores.