From d0d651241fd66d9d56addaf331d153b933134b06 Mon Sep 17 00:00:00 2001 From: Paul Selkirk Date: Mon, 7 Jun 2021 15:47:39 -0400 Subject: Add mode bits for the various flavors of SHA-3, so that the software driver doesn't have to know that the core's internal block size is actually 1600 bits. --- verilog_constants.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'verilog_constants.h') diff --git a/verilog_constants.h b/verilog_constants.h index 8db5e29..80ff27d 100644 --- a/verilog_constants.h +++ b/verilog_constants.h @@ -102,6 +102,11 @@ #define SHA3_256_DIGEST_LEN bitsToBytes(256) #define SHA3_384_DIGEST_LEN bitsToBytes(384) #define SHA3_512_DIGEST_LEN bitsToBytes(512) +#define SHA3_MODE_SHA3_224 (0 << 2) +#define SHA3_MODE_SHA3_256 (1 << 2) +#define SHA3_MODE_SHA3_384 (2 << 2) +#define SHA3_MODE_SHA3_512 (3 << 2) +#define SHA3_MODE_MASK (3 << 2) /* * RNG cores. -- cgit v1.2.3