diff options
| author | Fredrik Thulin <fredrik@thulin.net> | 2015-12-27 16:53:07 +0100 |
|---|---|---|
| committer | Fredrik Thulin <fredrik@thulin.net> | 2015-12-27 16:53:07 +0100 |
| commit | 5bda0b6805ad66f8b258bc738dd717fd7946bee2 (patch) | |
| tree | d6139d55edbd59a1ed1141b08d645a1027abff56 | |
| parent | a07cd7330778ff56ee15f5266a05ba08fbf4b9c8 (diff) | |
rearrange STM32F429 symbol after functionality instead of hardware
Now that it is more known what functionality we want to use in the STM32,
it makes much more sense (and will help reviewers a great deal) to have
the symbol in the schematics arranged after used functionality rather than
after how the hardware pinout is.
| -rw-r--r-- | eagle/alpha/rev02/rev02.brd | 3287 | ||||
| -rw-r--r-- | eagle/alpha/rev02/rev02.sch | 5943 | ||||
| -rw-r--r-- | eagle/lbr/Alpha-IC.lbr | 1560 |
3 files changed, 5966 insertions, 4824 deletions
diff --git a/eagle/alpha/rev02/rev02.brd b/eagle/alpha/rev02/rev02.brd index 5b9617e..f7c471e 100644 --- a/eagle/alpha/rev02/rev02.brd +++ b/eagle/alpha/rev02/rev02.brd @@ -1962,1096 +1962,6 @@ EAGLE CAD Libraries on element14</a></description> </package> </packages> </library> -<library name="STM32F429"> -<packages> -<package name="LQFP-208"> -<smd name="1" x="-14.5796" y="12.7508" dx="0.3" dy="1.7" layer="1" rot="R270"/> -<smd name="2" x="-14.5796" y="12.2428" dx="0.3" dy="1.7" layer="1" rot="R270"/> -<smd name="3" x="-14.5796" y="11.7602" dx="0.3" dy="1.7" layer="1" rot="R270"/> -<smd name="4" x="-14.5796" y="11.2522" dx="0.3" dy="1.7" layer="1" rot="R270"/> -<smd name="5" x="-14.5796" y="10.7442" dx="0.3" dy="1.7" layer="1" rot="R270"/> -<smd name="6" x="-14.5796" y="10.2616" dx="0.3" dy="1.7" layer="1" rot="R270"/> -<smd name="7" x="-14.5796" y="9.7536" dx="0.3" dy="1.7" layer="1" rot="R270"/> -<smd name="8" x="-14.5796" y="9.2456" dx="0.3" dy="1.7" layer="1" rot="R270"/> -<smd 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size="2.0828" layer="27" ratio="10" rot="SR0">>VALUE</text> +</package> </packages> </library> </libraries> @@ -5397,7 +5393,7 @@ Auto generated by <i>make-symbol-device-package-bsdl.ulp Rev. 44</i> <element name="FID4" library="UsedComponents" package="FIDUCIAL-1X2" value="FIDUCIAL1X2" x="8.128" y="5.08" rot="MR180"/> <element name="FID5" library="UsedComponents" package="FIDUCIAL-1X2" value="FIDUCIAL1X2" x="8.128" y="3.048" rot="MR180"/> <element name="FID6" library="UsedComponents" package="FIDUCIAL-1X2" value="FIDUCIAL1X2" x="109.663" y="68.2824" rot="MR0"/> -<element name="U$1" library="STM32F429" package="LQFP-208" value="STM32F429BIT6" x="90.0688" y="45.7176" smashed="yes" rot="R90"> +<element name="U$1" library="Alpha-IC" package="LQFP-208" value="STM32F429BIT6" x="90.0688" y="45.7176" smashed="yes" rot="R90"> <attribute name="OC_FARNELL" value="2469581" x="90.0688" y="45.7176" size="1.778" layer="27" rot="R90" display="off"/> <attribute name="NAME" x="73.4568" y="39.7256" size="1.016" layer="25" ratio="10" rot="SR90"/> <attribute name="VALUE" x="71.9328" y="39.7256" size="1.016" layer="27" ratio="10" rot="SR90"/> @@ -5547,13 +5543,13 @@ Auto generated by <i>make-symbol-device-package-bsdl.ulp Rev. 44</i> <attribute name="DIELECTRIC" value="X7R" x="97.2312" y="32.54" size="1.778" layer="28" rot="MR0" display="off"/> <attribute name="RATED_VOLTAGE" value="10V" x="97.2312" y="32.54" size="1.778" layer="28" rot="MR0" display="off"/> </element> -<element name="C38" library="resistor" package="C0603" value="2.2 uF LowESR" x="84.4296" y="56.1848" smashed="yes" rot="MR0"> +<element name="C38" library="resistor" package="C0603" value="2.2 uF" x="84.4296" y="56.1848" smashed="yes" rot="MR0"> <attribute name="NAME" x="85.3948" y="54.229" size="0.8128" layer="26" font="vector" ratio="18" rot="MR0"/> <attribute name="VALUE" x="87.5284" y="53.594" size="0.4064" layer="28" font="vector" ratio="10" rot="MR0"/> <attribute name="DIELECTRIC" value="X7R" x="84.4296" y="56.1848" size="1.778" layer="28" rot="MR0" display="off"/> <attribute name="RATED_VOLTAGE" value="10V" x="84.4296" y="56.1848" size="1.778" layer="28" rot="MR0" display="off"/> </element> -<element name="C39" library="resistor" package="C0603" value="2.2 uF LowESR" x="107.8992" y="51.7424" smashed="yes" rot="R180"> +<element name="C39" library="resistor" package="C0603" value="2.2 uF" x="107.8992" y="51.7424" smashed="yes" rot="R180"> <attribute name="NAME" x="110.744" y="51.3562" size="0.8128" layer="25" font="vector" ratio="18"/> <attribute name="VALUE" x="111.6076" y="50.9804" size="0.4064" layer="27" font="vector" ratio="10" rot="R180"/> <attribute name="DIELECTRIC" value="X7R" x="107.8992" y="51.7424" size="1.778" layer="27" rot="R180" display="off"/> @@ -5728,13 +5724,13 @@ Auto generated by <i>make-symbol-device-package-bsdl.ulp Rev. 44</i> <attribute name="NAME" x="61.9506" y="16.764" size="0.8128" layer="25" ratio="10" rot="SR0"/> <attribute name="VALUE" x="69.2658" y="10.5156" size="0.4064" layer="27" ratio="10" rot="SR90"/> </element> -<element name="C56" library="resistor" package="C0603" value="2.2 uF LowESR" x="107.8992" y="53.1368" smashed="yes" rot="R180"> +<element name="C56" library="resistor" package="C0603" value="2.2 uF" x="107.8992" y="53.1368" smashed="yes" rot="R180"> <attribute name="NAME" x="110.5916" y="52.705" size="0.8128" layer="25" font="vector" ratio="18"/> <attribute name="VALUE" x="112.2172" y="54.5084" size="0.4064" layer="27" font="vector" ratio="10" rot="R180"/> <attribute name="DIELECTRIC" value="X7R" x="107.8992" y="53.1368" size="1.778" layer="27" rot="R180" display="off"/> <attribute name="RATED_VOLTAGE" value="10V" x="107.8992" y="53.1368" size="1.778" layer="27" rot="R180" display="off"/> </element> -<element name="C57" library="resistor" package="C0603" value="2.2 uF LowESR" x="80.772" y="56.1848" smashed="yes" rot="MR180"> +<element name="C57" library="resistor" package="C0603" value="2.2 uF" x="80.772" y="56.1848" smashed="yes" rot="MR180"> <attribute name="NAME" x="81.7372" y="54.229" size="0.8128" layer="26" font="vector" ratio="18" rot="MR0"/> <attribute name="VALUE" x="82.3468" y="53.594" size="0.4064" layer="28" font="vector" ratio="10" rot="MR0"/> <attribute name="DIELECTRIC" value="X7R" x="80.772" y="56.1848" size="1.778" layer="28" rot="MR180" display="off"/> @@ -6669,7 +6665,10 @@ Auto generated by <i>make-symbol-device-package-bsdl.ulp Rev. 44</i> <attribute name="DIELECTRIC" value="X7R" x="67.056" y="98.552" size="1.778" layer="27" display="off"/> </element> <element name="JP8" library="jumper" package="JP1" value="" x="96.774" y="88.138"/> -<element name="IC1" library="Alpha-IC" package="TSOP2-86L" value="IS45S32160F" x="-7.112" y="13.462"/> +<element name="IC1" library="Alpha-IC" package="TSOP2-86L" value="IS45S32160F" x="-7.112" y="13.462"> +<attribute name="MPN" value="IS45S32160F" x="-7.112" y="13.462" size="1.778" layer="27" display="off"/> +<attribute name="SUPPLIER" value="ISSI" x="-7.112" y="13.462" size="1.778" layer="27" display="off"/> +</element> <element name="U$10" library="FT232H" package="FT2323HL_LQFP48" value="FT232H_SERIAL" x="125.73" y="26.416"> <attribute name="OC_FARNELL" value="1870924" x="114.808" y="26.416" size="1.778" layer="27" display="off"/> </element> @@ -6794,7 +6793,10 @@ Auto generated by <i>make-symbol-device-package-bsdl.ulp Rev. 44</i> <attribute name="RATED_VOLTAGE" value="10V" x="-12.192" y="-51.816" size="1.778" layer="27" display="off"/> <attribute name="DIELECTRIC" value="X7R" x="-12.192" y="-51.816" size="1.778" layer="27" display="off"/> </element> -<element name="IC2" library="Alpha-IC" package="TSOP2-86L" value="IS45S32160F" x="-7.112" y="-43.434"/> +<element name="IC2" library="Alpha-IC" package="TSOP2-86L" value="IS45S32160F" x="-7.112" y="-43.434"> +<attribute name="MPN" value="IS45S32160F" x="-7.112" y="-43.434" size="1.778" layer="27" display="off"/> +<attribute name="SUPPLIER" value="ISSI" x="-7.112" y="-43.434" size="1.778" layer="27" display="off"/> +</element> <element name="C190" library="resistor" package="C0402" value="0.1uF" x="2.032" y="-60.198"> <attribute name="RATED_VOLTAGE" value="10V" x="-25.908" y="-32.512" size="1.778" layer="27" display="off"/> <attribute name="DIELECTRIC" value="X7R" x="-25.908" y="-32.512" size="1.778" layer="27" display="off"/> @@ -6856,17 +6858,17 @@ Auto generated by <i>make-symbol-device-package-bsdl.ulp Rev. 44</i> <attribute name="TOLERANCE" value="10%" x="131.826" y="90.932" size="1.778" layer="27" rot="R180" display="off"/> <attribute name="DIELECTRIC" value="X7R" x="131.826" y="90.932" size="1.778" layer="27" rot="R180" display="off"/> </element> -<element name="Q1" library="transistors_gaui" package="SOT23" value="2N7002" x="-10" y="-80"/> -<element name="R75" library="resistor" package="R0402" value="10K" x="0" y="-80"> -<attribute name="TOLERANCE" value="5%" x="-10" y="-90" size="1.778" layer="27" display="off"/> +<element name="Q1" library="transistors_gaui" package="SOT23" value="2N7002" x="10.32" y="11.44"/> +<element name="R75" library="resistor" package="R0402" value="10K" x="12.7" y="11.44"> +<attribute name="TOLERANCE" value="5%" x="2.7" y="1.44" size="1.778" layer="27" display="off"/> </element> -<element name="R76" library="resistor" package="R0402" value="1K" x="-10" y="-90"> -<attribute name="TOLERANCE" value="5%" x="-10" y="-100" size="1.778" layer="27" display="off"/> +<element name="R76" library="resistor" package="R0402" value="1K" x="12.86" y="10.33"> +<attribute name="TOLERANCE" value="5%" x="12.86" y="0.33" size="1.778" layer="27" display="off"/> </element> -<element name="JP2" library="jumper" package="JP1" value="" x="-10" y="-100"/> -<element name="C213" library="resistor" package="C0603" value="2.2 uF LowESR" x="-10" y="-110"> -<attribute name="RATED_VOLTAGE" value="25V" x="-10" y="-110" size="1.778" layer="27" display="off"/> -<attribute name="DIELECTRIC" value="X7R" x="-10" y="-110" size="1.778" layer="27" display="off"/> +<element name="JP2" library="jumper" package="JP1" value="" x="6.51" y="11.76"/> +<element name="C213" library="resistor" package="C0603" value="2.2 uF LowESR" x="13.48" y="14.13" rot="R90"> +<attribute name="RATED_VOLTAGE" value="25V" x="13.48" y="14.13" size="1.778" layer="27" rot="R90" display="off"/> +<attribute name="DIELECTRIC" value="X7R" x="13.48" y="14.13" size="1.778" layer="27" rot="R90" display="off"/> </element> </elements> <signals> @@ -6892,21 +6894,6 @@ Auto generated by <i>make-symbol-device-package-bsdl.ulp Rev. 44</i> <via x="111.952" y="66.6476" extent="1-16" drill="0.6" shape="square"/> <contactref element="C15" pad="1"/> <contactref element="C14" pad="1"/> -<contactref element="U$1" pad="82"/> -<contactref element="U$1" pad="60"/> -<contactref element="U$1" pad="93"/> -<contactref element="U$1" pad="72"/> -<contactref element="U$1" pad="170"/> -<contactref element="U$1" pad="202"/> -<contactref element="U$1" pad="184"/> -<contactref element="U$1" pad="149"/> -<contactref element="U$1" pad="136"/> -<contactref element="U$1" pad="125"/> -<contactref element="U$1" pad="114"/> -<contactref element="U$1" pad="14"/> -<contactref element="U$1" pad="25"/> -<contactref element="U$1" pad="40"/> -<contactref element="U$1" pad="51"/> <contactref element="C16" pad="2"/> <contactref element="C17" pad="2"/> <contactref element="C18" pad="2"/> @@ -6929,8 +6916,6 @@ Auto generated by <i>make-symbol-device-package-bsdl.ulp Rev. 44</i> <contactref element="C26" pad="2"/> <contactref element="C27" pad="2"/> <contactref element="C30" pad="2"/> -<wire x1="80.8232" y1="60.2972" x2="80.8232" y2="57.8896" width="0.3048" layer="1"/> -<wire x1="87.3256" y1="60.2972" x2="87.3256" y2="59.2096" width="0.3048" layer="1"/> <via x="87.7824" y="58.7528" extent="1-16" drill="0.6" shape="square"/> <via x="92.3544" y="58.7528" extent="1-16" drill="0.6" shape="square"/> <via x="98.7552" y="58.7528" extent="1-16" drill="0.6" shape="square"/> @@ -6939,15 +6924,12 @@ Auto generated by <i>make-symbol-device-package-bsdl.ulp Rev. 44</i> <via x="80.8232" y="57.8896" extent="1-16" drill="0.6" shape="square"/> <via x="106.3752" y="41.9888" extent="1-16" drill="0.6" shape="square"/> <via x="106.3752" y="37.112" extent="1-16" drill="0.6" shape="square"/> -<wire x1="104.6788" y1="36.5024" x2="104.6484" y2="36.472" width="0.3048" layer="1"/> <wire x1="80.66" y1="59.5376" x2="81.0124" y2="59.572" width="0.3048" layer="16"/> <wire x1="81.0124" y1="59.572" x2="80.8232" y2="59.6876" width="0.3048" layer="16"/> <wire x1="80.8232" y1="59.6876" x2="80.8232" y2="57.8896" width="0.3048" layer="16"/> <wire x1="87.7824" y1="58.7528" x2="87.7824" y2="59.298" width="0.4064" layer="16"/> <wire x1="87.7824" y1="59.298" x2="87.6704" y2="59.8424" width="0.3048" layer="16"/> -<wire x1="104.6484" y1="47.4702" x2="105.7706" y2="47.4702" width="0.3048" layer="1"/> <wire x1="105.7706" y1="47.4702" x2="106.3752" y2="46.8656" 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layer="16"/> @@ -6974,7 +6955,6 @@ Auto generated by <i>make-symbol-device-package-bsdl.ulp Rev. 44</i> <wire x1="98.7552" y1="59.9076" x2="98.6432" y2="59.8424" width="0.3048" layer="16"/> <wire x1="92.3544" y1="58.7528" x2="92.3544" y2="59.9076" width="0.4064" layer="16"/> <wire x1="92.3544" y1="59.9076" x2="92.4664" y2="59.8424" width="0.3048" layer="16"/> -<wire x1="75.4892" y1="35.964" x2="74.1704" y2="35.964" width="0.3048" layer="1"/> <wire x1="80.66" y1="59.5376" x2="80.772" y2="59.4268" width="0.4064" layer="16"/> <wire x1="80.772" y1="59.4268" x2="80.772" y2="57.8384" width="0.4064" layer="16"/> <contactref element="R10" pad="1"/> @@ -7082,7 +7062,6 @@ Auto generated by <i>make-symbol-device-package-bsdl.ulp Rev. 44</i> <wire x1="116.7738" y1="37.7372" x2="116.7738" y2="39.2612" width="0.4064" layer="1"/> <wire x1="116.7738" y1="39.2612" x2="116.7738" y2="40.7852" width="0.4064" layer="1"/> <wire x1="116.7738" y1="40.7852" x2="116.7738" y2="42.3092" width="0.4064" layer="1"/> -<wire x1="75.4892" y1="35.964" x2="76.576" y2="35.964" width="0.3048" layer="1"/> <wire x1="76.576" y1="35.964" x2="77.1144" y2="36.5024" width="0.3048" layer="1"/> <via x="78.9432" y="18.0086" extent="1-16" drill="0.6" shape="square"/> <wire x1="78.9786" y1="12.2102" x2="78.9786" y2="13.7342" width="0.4064" layer="1"/> @@ -7104,7 +7083,6 @@ Auto generated by <i>make-symbol-device-package-bsdl.ulp Rev. 44</i> <wire x1="35.179" y1="7.8486" x2="35.052" y2="7.7216" width="0.4064" layer="1"/> <wire x1="96.3812" y1="32.54" x2="96.3812" y2="33.5188" width="0.4064" layer="16"/> <wire x1="96.3812" y1="33.5188" x2="96.6216" y2="33.7592" width="0.4064" layer="16"/> -<wire x1="96.8252" y1="31.138" x2="96.8252" y2="29.898" width="0.3048" layer="1"/> <contactref element="R19" pad="1"/> <contactref element="U5" pad="4"/> <via x="66.4464" y="15.6464" extent="1-16" drill="0.6" shape="square"/> @@ -7161,7 +7139,6 @@ Auto generated by <i>make-symbol-device-package-bsdl.ulp Rev. 44</i> <via x="88.392" y="18.0848" extent="1-16" drill="0.6" shape="square"/> <wire x1="81.9912" y1="16.4964" x2="81.9912" y2="18.0848" width="0.4064" layer="1"/> <wire x1="88.392" y1="16.4964" x2="88.392" y2="18.0848" width="0.4064" layer="1"/> -<wire x1="102.3116" y1="31.138" x2="102.3116" y2="29.898" width="0.3048" layer="1"/> <wire x1="102.3116" y1="29.898" x2="102.7176" y2="29.492" width="0.3048" layer="1"/> <polygon width="0.3048" layer="1"> <vertex x="115.762" y="70.4576"/> @@ -7179,15 +7156,11 @@ Auto generated by <i>make-symbol-device-package-bsdl.ulp Rev. 44</i> <wire x1="105.4608" y1="59.6484" x2="105.156" y2="59.5376" width="0.4064" layer="1"/> <wire x1="108.5088" y1="59.7484" x2="110.0328" y2="59.7484" width="0.4064" layer="1"/> <wire x1="110.0328" y1="59.7484" x2="110.0328" y2="59.8424" width="0.4064" layer="1"/> -<wire x1="98.3238" y1="60.2972" x2="98.3238" y2="59.1842" width="0.3048" layer="1"/> <wire x1="98.3238" y1="59.1842" x2="98.7552" y2="58.7528" width="0.3048" layer="1"/> -<wire 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y2="41.5544" width="0.3048" layer="1"/> <wire x1="111.3176" y1="41.5544" x2="111.3248" y2="41.5472" width="0.3048" layer="1"/> +<contactref element="U$1" pad="69"/> +<wire x1="104.6484" y1="40.9678" x2="109.1414" y2="40.9678" width="0" layer="19" extent="1-1"/> </signal> <signal name="N$18"> <contactref element="LED6" pad="A"/> @@ -8217,9 +8157,9 @@ Auto generated by <i>make-symbol-device-package-bsdl.ulp Rev. 44</i> </signal> <signal name="ARM_LED2"> <contactref element="R8" pad="6"/> -<contactref element="U$1" pad="68"/> -<wire x1="104.6484" y1="40.4598" x2="111.32" y2="40.4598" width="0.3048" layer="1"/> <wire x1="111.32" y1="40.4598" x2="111.3248" y2="40.455" width="0.3048" layer="1"/> +<contactref element="U$1" pad="68"/> +<wire x1="104.6484" y1="40.4598" x2="111.3248" y2="40.455" width="0" layer="19" extent="1-1"/> </signal> <signal name="N$19"> <contactref element="LED7" pad="A"/> @@ -8230,10 +8170,10 @@ Auto generated by <i>make-symbol-device-package-bsdl.ulp Rev. 44</i> </signal> <signal name="ARM_LED3"> <contactref element="R8" pad="7"/> -<contactref element="U$1" pad="67"/> -<wire x1="104.6484" y1="39.9772" x2="109.1716" y2="39.9772" width="0.3048" layer="1"/> <wire x1="109.1716" y1="39.9772" x2="109.5574" y2="39.5914" width="0.3048" layer="1"/> <wire x1="111.3248" y1="39.5914" x2="109.5574" y2="39.5914" width="0.3048" layer="1"/> +<contactref element="U$1" pad="67"/> +<wire x1="104.6484" y1="39.9772" x2="109.1716" y2="39.9772" width="0" layer="19" extent="1-1"/> </signal> <signal name="N$20"> <contactref element="LED8" pad="A"/> @@ -8245,11 +8185,11 @@ Auto generated by <i>make-symbol-device-package-bsdl.ulp Rev. 44</i> </signal> <signal name="ARM_LED4"> <contactref element="R8" pad="8"/> -<contactref element="U$1" pad="66"/> -<wire x1="104.6484" y1="39.4692" x2="108.7652" y2="39.4692" width="0.3048" layer="1"/> <wire x1="108.7652" y1="39.4692" x2="109.728" y2="38.5064" width="0.3048" layer="1"/> <wire x1="109.728" y1="38.5064" x2="111.3176" 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x2="88.8242" y2="24.9994" width="0.3048" layer="1"/> -<wire x1="88.8242" y1="24.9994" x2="87.2208" y2="23.396" width="0.3048" layer="1"/> -<wire x1="87.2208" y1="23.396" x2="68.9328" y2="23.396" width="0.3048" layer="1"/> -<wire x1="68.9328" y1="23.396" x2="61.3128" y2="31.016" width="0.3048" layer="1"/> <contactref element="U7" pad="AA13"/> <contactref element="IC1" pad="62"/> <contactref element="IC2" pad="62"/> -<wire x1="61.3128" y1="31.016" x2="40.0808" y2="56.2088" width="0" layer="19" extent="1-1"/> +<contactref element="U$1" pad="24"/> +<wire x1="40.0808" y1="56.2088" x2="88.8242" y2="31.138" width="0" layer="19" extent="1-1"/> <wire x1="-1.182" y1="11.962" x2="40.0808" y2="56.2088" width="0" layer="19" extent="1-1"/> <wire x1="-1.182" y1="-44.934" x2="-1.182" y2="11.962" width="0" layer="19" extent="1-1"/> </signal> <signal name="FMC_A6" class="3"> -<contactref element="U$1" pad="71"/> -<wire x1="104.6484" y1="41.9584" x2="102.4304" y2="41.9584" width="0.3048" layer="1"/> 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width="0.3048" layer="1"/> -<wire x1="103.0146" y1="43.457" x2="99.7176" y2="40.16" width="0.3048" layer="1"/> -<wire x1="99.7176" y1="40.16" x2="92.7072" y2="40.16" width="0.3048" layer="1"/> -<via x="92.7072" y="40.16" extent="1-16" drill="0.6" shape="square"/> -<wire x1="91.6448" y1="39.0976" x2="92.7072" y2="40.16" width="0.3048" layer="16"/> <contactref element="U7" pad="AA15"/> <contactref element="IC1" pad="64"/> <contactref element="IC2" pad="64"/> -<wire x1="40.0808" y1="54.2088" x2="91.6448" y2="39.0976" width="0" layer="19" extent="1-16"/> +<contactref element="U$1" pad="74"/> +<wire x1="40.0808" y1="54.2088" x2="104.6484" y2="43.457" width="0" layer="19" extent="1-1"/> <wire x1="-1.182" y1="12.962" x2="40.0808" y2="54.2088" width="0" layer="19" extent="1-1"/> <wire x1="-1.182" y1="-43.934" x2="-1.182" y2="12.962" width="0" layer="19" extent="1-1"/> </signal> <signal name="FMC_A8" class="3"> -<contactref element="U$1" pad="75"/> -<wire x1="90.316" y1="39.5976" x2="91.1832" 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name="FMC_A9" class="3"> -<contactref element="U$1" pad="76"/> -<wire x1="104.6484" y1="44.473" x2="102.2018" y2="44.473" width="0.3048" layer="1"/> -<wire x1="102.2018" y1="44.473" x2="99.7176" y2="41.9888" width="0.3048" layer="1"/> -<via x="89.3544" y="41.684" extent="1-16" drill="0.6" shape="square"/> -<wire x1="88.6344" y1="40.0976" x2="89.3064" y2="40.7696" width="0.3048" layer="16"/> -<wire x1="89.3064" y1="40.7696" x2="89.3064" y2="41.9408" width="0.3048" layer="16"/> -<wire x1="89.3064" y1="41.9408" x2="89.3544" y2="41.684" width="0.3048" layer="16"/> -<wire x1="99.7176" y1="41.9888" x2="89.6592" y2="41.9888" width="0.3048" layer="1"/> -<wire x1="89.6592" y1="41.9888" x2="89.3544" y2="41.684" width="0.3048" layer="1"/> <contactref element="U7" pad="Y13"/> <contactref element="IC1" pad="66"/> <contactref element="IC2" pad="66"/> -<wire x1="41.0808" y1="56.2088" x2="88.6344" y2="40.0976" width="0" layer="19" extent="1-16"/> +<contactref element="U$1" pad="76"/> +<wire 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width="0.3048" layer="1"/> <contactref element="U7" pad="AA14"/> <contactref element="IC1" pad="24"/> <contactref element="IC2" pad="24"/> -<wire x1="40.0808" y1="55.2088" x2="85.0872" y2="41.3792" width="0" layer="19" extent="1-16"/> +<contactref element="U$1" pad="77"/> +<wire x1="40.0808" y1="55.2088" x2="104.6484" y2="44.9556" width="0" layer="19" extent="1-1"/> <wire x1="-13.042" y1="12.462" x2="40.0808" y2="55.2088" width="0" layer="19" extent="1-1"/> <wire x1="-13.042" y1="-44.434" x2="-13.042" y2="12.462" width="0" layer="19" extent="1-1"/> </signal> <signal name="FMC_A11" class="3"> -<contactref element="U$1" pad="78"/> -<wire x1="104.6484" y1="45.4636" x2="101.3636" y2="45.4636" width="0.3048" layer="1"/> -<wire x1="101.3636" y1="45.4636" x2="99.4128" y2="43.5128" width="0.3048" layer="1"/> -<via x="83.5632" y="42.2936" extent="1-16" drill="0.6" shape="square"/> -<wire x1="83.5632" y1="42.2936" x2="82.344" y2="42.2936" width="0.3048" layer="16"/> -<wire x1="81.648" y1="41.5976" x2="82.344" y2="42.2936" width="0.3048" layer="16"/> -<wire x1="99.4128" y1="43.5128" x2="88.0872" y2="43.5128" width="0.3048" layer="1"/> -<wire x1="88.0872" y1="43.5128" x2="86.868" y2="42.2936" width="0.3048" layer="1"/> -<wire x1="86.868" y1="42.2936" x2="83.5632" y2="42.2936" width="0.3048" layer="1"/> <contactref element="U7" pad="W14"/> <contactref element="IC1" pad="21"/> <contactref element="IC2" pad="21"/> -<wire x1="42.0808" y1="55.2088" x2="81.648" y2="41.5976" width="0" layer="19" extent="1-16"/> +<contactref element="U$1" pad="78"/> +<wire x1="42.0808" y1="55.2088" x2="104.6484" y2="45.4636" width="0" layer="19" extent="1-1"/> <wire x1="-13.042" y1="13.962" x2="42.0808" y2="55.2088" width="0" layer="19" extent="1-1"/> <wire x1="-13.042" y1="-42.934" x2="-13.042" y2="13.962" width="0" layer="19" extent="1-1"/> </signal> <signal name="FMC_D4" class="2"> -<contactref element="U$1" pad="79"/> -<wire x1="96.3648" y1="45.0368" x2="96.6696" y2="44.732" width="0.3048" layer="16"/> -<via x="96.6696" y="44.732" extent="1-16" drill="0.6" shape="square"/> -<wire x1="104.6484" y1="45.9716" x2="97.9092" y2="45.9716" width="0.3048" layer="1"/> -<wire x1="97.9092" y1="45.9716" x2="96.6696" y2="44.732" width="0.3048" layer="1"/> -<wire x1="80.2096" y1="42.5976" x2="81.7344" y2="44.1224" width="0.3048" layer="16"/> -<wire x1="81.7344" y1="44.1224" x2="96.012" y2="44.1224" width="0.3048" layer="16"/> -<wire x1="96.012" y1="44.1224" x2="96.6216" y2="44.732" width="0.3048" layer="16"/> -<wire x1="96.6216" y1="44.732" x2="96.6696" y2="44.732" width="0.3048" layer="16"/> <contactref element="U7" pad="V2"/> <contactref element="IC1" pad="8"/> <contactref element="IC2" pad="8"/> -<wire x1="43.0808" y1="67.2088" x2="80.2096" y2="42.5976" width="0" layer="19" extent="1-16"/> +<contactref element="U$1" pad="79"/> +<wire x1="43.0808" y1="67.2088" x2="104.6484" y2="45.9716" width="0" layer="19" extent="1-1"/> <wire x1="-13.042" y1="20.462" x2="43.0808" y2="67.2088" width="0" layer="19" extent="1-1"/> <wire x1="-13.042" y1="-36.434" x2="-13.042" y2="20.462" width="0" layer="19" extent="1-1"/> </signal> <signal name="FMC_D20" class="2"> -<contactref element="U$1" pad="102"/> -<wire x1="104.6484" y1="57.4778" x2="95.5062" y2="57.4778" width="0.3048" layer="1"/> -<via x="93.012" y="56.3144" extent="1-16" drill="0.6" shape="square"/> -<wire x1="95.5062" y1="57.4778" x2="94.3428" y2="56.3144" width="0.3048" layer="1"/> -<wire x1="94.3428" y1="56.3144" x2="93.012" y2="56.3144" width="0.3048" layer="1"/> -<wire x1="90.3328" y1="54.5976" x2="92.0496" y2="56.3144" width="0.3048" layer="16"/> -<wire x1="92.0496" y1="56.3144" x2="93.012" y2="56.3144" width="0.3048" layer="16"/> <contactref element="U7" pad="AB5"/> <contactref element="IC1" pad="37"/> <contactref element="IC2" pad="37"/> -<wire x1="39.0808" y1="64.2088" x2="90.3328" y2="54.5976" width="0" layer="19" extent="1-16"/> +<contactref element="U$1" pad="102"/> +<wire x1="39.0808" y1="64.2088" x2="104.6484" y2="57.4778" width="0" layer="19" extent="1-1"/> <wire x1="-13.042" y1="5.962" x2="39.0808" y2="64.2088" width="0" layer="19" extent="1-1"/> <wire x1="-13.042" y1="-50.934" x2="-13.042" y2="5.962" width="0" layer="19" extent="1-1"/> </signal> <signal name="FMC_D19" class="2"> -<contactref element="U$1" pad="101"/> -<wire x1="104.6484" y1="56.9698" x2="96.1058" y2="56.9698" width="0.3048" layer="1"/> -<via x="93.9264" y="54.7904" extent="1-16" drill="0.6" shape="square"/> -<wire x1="93.2336" y1="54.0976" x2="93.9264" y2="54.7904" width="0.3048" layer="16"/> -<wire x1="96.1058" y1="56.9698" x2="93.9264" y2="54.7904" width="0.3048" layer="1"/> <contactref element="U7" pad="AA5"/> <contactref element="IC1" pad="36"/> <contactref element="IC2" pad="36"/> -<wire x1="40.0808" y1="64.2088" x2="93.2336" y2="54.0976" width="0" layer="19" extent="1-16"/> +<contactref element="U$1" pad="101"/> +<wire x1="40.0808" y1="64.2088" x2="104.6484" y2="56.9698" width="0" layer="19" extent="1-1"/> <wire x1="-13.042" y1="6.462" x2="40.0808" y2="64.2088" width="0" layer="19" extent="1-1"/> <wire x1="-13.042" y1="-50.434" x2="-13.042" y2="6.462" width="0" layer="19" extent="1-1"/> </signal> <signal name="FMC_D18" class="2"> -<contactref element="U$1" pad="100"/> -<wire x1="104.6484" y1="56.4618" x2="97.5082" y2="56.4618" width="0.3048" layer="1"/> -<via x="95.1456" y="54.1808" extent="1-16" drill="0.6" shape="square"/> -<wire x1="94.5624" y1="53.5976" x2="95.1456" y2="54.1808" width="0.3048" layer="16"/> -<wire x1="95.1456" y1="54.1808" x2="95.2272" y2="54.1808" width="0.3048" layer="1"/> -<wire x1="95.2272" y1="54.1808" x2="97.5082" y2="56.4618" width="0.3048" layer="1"/> <contactref element="U7" pad="AA3"/> <contactref element="IC1" pad="34"/> <contactref element="IC2" pad="34"/> -<wire x1="40.0808" y1="66.2088" x2="94.5624" y2="53.5976" width="0" layer="19" extent="1-16"/> +<contactref element="U$1" pad="100"/> +<wire x1="40.0808" y1="66.2088" x2="104.6484" y2="56.4618" width="0" layer="19" extent="1-1"/> <wire x1="-13.042" y1="7.462" x2="40.0808" y2="66.2088" width="0" layer="19" extent="1-1"/> <wire x1="-13.042" y1="-49.434" x2="-13.042" y2="7.462" width="0" layer="19" extent="1-1"/> </signal> <signal name="FMC_D17" class="2"> -<contactref element="U$1" pad="99"/> -<wire x1="104.6484" y1="55.9792" x2="98.1632" y2="55.9792" width="0.3048" layer="1"/> -<via x="96.6696" y="53.876" extent="1-16" drill="0.6" shape="square"/> -<wire x1="98.1632" y1="55.9792" x2="96.6696" y2="54.4856" width="0.3048" layer="1"/> -<wire x1="96.6696" y1="54.4856" x2="96.6696" y2="53.876" width="0.3048" layer="1"/> -<wire x1="95.8912" y1="53.0976" x2="96.6696" y2="53.876" width="0.3048" layer="16"/> <contactref element="U7" pad="Y3"/> <contactref element="IC1" pad="33"/> <contactref element="IC2" pad="33"/> -<wire x1="41.0808" y1="66.2088" x2="95.8912" y2="53.0976" width="0" layer="19" extent="1-16"/> +<contactref element="U$1" pad="99"/> +<wire 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y2="50.3936" width="0.3048" layer="16"/> -<wire x1="79.4232" y1="50.3936" x2="81.0768" y2="52.0472" width="0.3048" layer="16"/> <contactref element="U7" pad="AB2"/> <contactref element="IC1" pad="31"/> <contactref element="IC2" pad="31"/> -<wire x1="39.0808" y1="67.2088" x2="70.7136" y2="50.3936" width="0" layer="19" extent="1-16"/> +<contactref element="U$1" pad="98"/> +<wire x1="39.0808" y1="67.2088" x2="104.6484" y2="55.4712" width="0" layer="19" extent="1-1"/> <wire x1="-13.042" y1="8.962" x2="39.0808" y2="67.2088" width="0" layer="19" extent="1-1"/> <wire x1="-13.042" y1="-47.934" x2="-13.042" y2="8.962" width="0" layer="19" extent="1-1"/> </signal> <signal name="FMC_D12" class="2"> -<contactref element="U$1" pad="89"/> -<wire x1="104.6484" y1="50.9754" x2="82.1966" y2="50.9754" width="0.3048" layer="1"/> -<via x="82.0392" y="50.828" extent="1-16" drill="0.6" shape="square"/> -<wire x1="82.0392" y1="50.828" x2="82.344" y2="51.1328" width="0.3048" layer="1"/> -<wire x1="82.1966" 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name="FMC_D9" class="2"> -<contactref element="U$1" pad="86"/> -<wire x1="104.6484" y1="49.4768" x2="88.6128" y2="49.4768" width="0.3048" layer="1"/> -<via x="87.5256" y="48.3896" extent="1-16" drill="0.6" shape="square"/> -<wire x1="87.5256" y1="48.3896" x2="87.8304" y2="48.6944" width="0.3048" layer="1"/> -<wire x1="88.6128" y1="49.4768" x2="87.5256" y2="48.3896" width="0.3048" layer="1"/> -<wire x1="86.7336" y1="47.5976" x2="87.5256" y2="48.3896" width="0.3048" layer="16"/> <contactref element="U7" pad="W1"/> -<wire x1="42.0808" y1="68.2088" x2="86.7336" y2="47.5976" width="0" layer="19" extent="1-16"/> +<contactref element="U$1" pad="86"/> +<wire x1="42.0808" y1="68.2088" x2="104.6484" y2="49.4768" width="0" layer="19" extent="1-1"/> </signal> <signal name="FMC_D8" class="2"> -<contactref element="U$1" pad="85"/> -<wire x1="104.6484" y1="48.9688" x2="90.848" y2="48.9688" width="0.3048" layer="1"/> -<via x="89.3544" y="47.4752" extent="1-16" drill="0.6" shape="square"/> -<wire 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x2="93.012" y2="45.9512" width="0.3048" layer="16" curve="90"/> <contactref element="U7" pad="R2"/> <contactref element="IC1" pad="11"/> <contactref element="IC2" pad="11"/> -<wire x1="46.0808" y1="67.2088" x2="92.6584" y2="45.5976" width="0" layer="19" extent="1-16"/> +<contactref element="U$1" pad="81"/> +<wire x1="46.0808" y1="67.2088" x2="104.6484" y2="46.9622" width="0" layer="19" extent="1-1"/> <wire x1="-13.042" y1="18.962" x2="46.0808" y2="67.2088" width="0" layer="19" extent="1-1"/> <wire x1="-13.042" y1="-37.934" x2="-13.042" y2="18.962" width="0" layer="19" extent="1-1"/> </signal> <signal name="FMC_D5" class="2"> -<contactref element="U$1" pad="80"/> -<wire x1="104.6484" y1="46.4796" x2="95.9788" y2="46.4796" width="0.3048" layer="1"/> -<wire x1="95.9788" y1="46.4796" x2="94.8408" y2="45.3416" width="0.3048" layer="1"/> -<via x="94.8408" y="45.3416" extent="1-16" drill="0.6" shape="square"/> -<wire x1="94.8408" y1="45.3416" x2="94.2312" y2="44.732" width="0.3048" layer="16"/> -<wire x1="79.7952" y1="43.0976" x2="81.4296" y2="44.732" width="0.3048" layer="16"/> -<wire x1="81.4296" y1="44.732" x2="94.2312" y2="44.732" width="0.3048" layer="16"/> <contactref element="U7" pad="R3"/> <contactref element="IC1" pad="10"/> <contactref element="IC2" pad="10"/> -<wire x1="46.0808" y1="66.2088" x2="79.7952" y2="43.0976" width="0" layer="19" extent="1-16"/> +<contactref element="U$1" pad="80"/> +<wire x1="46.0808" y1="66.2088" x2="104.6484" y2="46.4796" width="0" layer="19" extent="1-1"/> <wire x1="-13.042" y1="19.462" x2="46.0808" y2="66.2088" width="0" layer="19" extent="1-1"/> <wire x1="-13.042" y1="-37.434" x2="-13.042" y2="19.462" width="0" layer="19" extent="1-1"/> </signal> <signal name="FMC_D21" class="2"> -<contactref element="U$1" pad="151"/> -<wire x1="79.8072" y1="60.2972" x2="79.8072" y2="63.728" width="0.3048" layer="1"/> -<wire x1="79.8072" y1="63.728" x2="78.0768" y2="65.4584" width="0.3048" layer="1"/> -<wire x1="78.0768" y1="65.4584" x2="75.8952" y2="65.4584" width="0.3048" layer="1"/> <contactref element="U7" pad="Y4"/> <contactref element="IC1" pad="39"/> <contactref element="IC2" pad="39"/> -<wire x1="41.0808" y1="65.2088" x2="75.8952" y2="65.4584" width="0" layer="19" extent="1-1"/> +<contactref element="U$1" pad="151"/> +<wire x1="41.0808" y1="65.2088" x2="79.8072" y2="60.2972" width="0" layer="19" extent="1-1"/> <wire x1="-13.042" y1="4.962" x2="41.0808" y2="65.2088" width="0" layer="19" extent="1-1"/> <wire x1="-13.042" y1="-51.934" x2="-13.042" y2="4.962" width="0" layer="19" extent="1-1"/> </signal> <signal name="FMC_A15" class="3"> -<contactref element="U$1" pad="132"/> -<wire x1="89.3068" y1="60.2972" x2="89.3068" y2="61.5436" width="0.3048" layer="1"/> -<wire x1="89.3068" y1="61.5436" x2="85.0872" y2="65.7632" width="0.3048" layer="1"/> -<wire x1="85.0872" y1="65.7632" x2="79.9056" y2="65.7632" width="0.3048" layer="1"/> -<wire x1="79.9056" y1="65.7632" x2="78.3816" y2="67.2872" width="0.3048" layer="1"/> <contactref element="U7" pad="AA9"/> <contactref element="IC1" pad="23"/> <contactref element="IC2" pad="23"/> -<wire x1="40.0808" y1="60.2088" x2="78.3816" y2="67.2872" width="0" layer="19" extent="1-1"/> +<contactref element="U$1" pad="132"/> +<wire x1="40.0808" y1="60.2088" x2="89.3068" y2="60.2972" width="0" layer="19" extent="1-1"/> <wire x1="-13.042" y1="12.962" x2="40.0808" y2="60.2088" width="0" layer="19" extent="1-1"/> <wire x1="-13.042" y1="-43.934" x2="-13.042" y2="12.962" width="0" layer="19" extent="1-1"/> </signal> <signal name="FMC_D2" class="2"> -<contactref element="U$1" pad="164"/> -<wire x1="75.4892" y1="54.9632" x2="68.712" y2="54.9632" width="0.3048" layer="1"/> <contactref element="U7" pad="U1"/> <contactref element="IC1" pad="5"/> <contactref element="IC2" pad="5"/> -<wire x1="44.0808" y1="68.2088" x2="68.712" y2="54.9632" width="0" layer="19" extent="1-1"/> +<contactref element="U$1" pad="164"/> +<wire x1="44.0808" y1="68.2088" x2="75.4892" y2="54.9632" width="0" layer="19" extent="1-1"/> <wire x1="-13.042" y1="21.962" x2="44.0808" y2="68.2088" width="0" layer="19" extent="1-1"/> <wire x1="-13.042" y1="-34.934" x2="-13.042" y2="21.962" width="0" layer="19" extent="1-1"/> </signal> <signal name="FMC_NE1"> -<contactref element="U$1" pad="173"/> -<wire x1="75.4892" y1="50.4674" x2="74.3634" y2="50.4674" width="0.3048" layer="1"/> -<wire x1="74.3634" y1="50.4674" x2="69.2376" y2="45.3416" width="0.3048" layer="1"/> <contactref element="U7" pad="V5"/> -<wire x1="43.0808" y1="64.2088" x2="69.2376" y2="45.3416" width="0" layer="19" extent="1-1"/> +<contactref element="U$1" pad="173"/> +<wire x1="43.0808" y1="64.2088" x2="75.4892" y2="50.4674" width="0" layer="19" extent="1-1"/> </signal> <signal name="OSC_OUT"> <contactref element="C14" pad="2"/> -<contactref element="U$1" pad="33"/> -<wire x1="93.32" y1="31.138" x2="93.32" y2="29.9208" width="0.3048" layer="1"/> <contactref element="Q4" pad="3"/> +<contactref element="U$1" pad="33"/> <wire x1="94.572" y1="26.2" x2="96.52" y2="26.05" width="0" layer="19" extent="1-1"/> -<wire x1="93.32" y1="29.9208" x2="94.572" y2="26.2" width="0" layer="19" extent="1-1"/> +<wire x1="93.32" y1="31.138" x2="94.572" y2="26.2" width="0" layer="19" extent="1-1"/> </signal> <signal name="OSC_IN"> -<contactref element="U$1" pad="32"/> <contactref element="R12" pad="1"/> -<wire x1="92.812" y1="31.138" x2="92.812" y2="29.82" width="0.3048" layer="1"/> -<wire x1="92.812" y1="29.82" x2="91.836" y2="28.448" width="0" layer="19" extent="1-1"/> +<contactref element="U$1" pad="32"/> +<wire x1="91.836" y1="28.448" x2="92.812" y2="31.138" width="0" layer="19" extent="1-1"/> </signal> <signal name="SWDIO"> <contactref element="U$2" pad="P$SWDIO"/> @@ -9080,15 +8785,13 @@ Auto generated by <i>make-symbol-device-package-bsdl.ulp Rev. 44</i> </signal> <signal name="NRST"> <contactref element="U$2" pad="P$NRST"/> -<contactref element="U$1" pad="34"/> <contactref element="C40" pad="1"/> +<contactref element="U$1" pad="34"/> <wire x1="89.6516" y1="36.5024" x2="92.428" y2="78.6892" width="0" layer="19" extent="16-16"/> <wire x1="93.828" y1="31.138" x2="89.6516" y2="36.5024" width="0" layer="19" extent="1-16"/> </signal> <signal name="VCAP2"> -<contactref element="U$1" pad="148"/> <contactref element="C38" pad="2"/> -<wire x1="81.3312" y1="60.2972" x2="81.3312" y2="58.9556" width="0.3048" layer="1"/> <via x="82.6008" y="57.8384" extent="1-16" drill="0.6" shape="square"/> <wire x1="83.5152" y1="56.3788" x2="83.5796" y2="56.1848" width="0.3048" layer="16"/> <contactref element="C57" pad="2"/> @@ -9103,15 +8806,17 @@ Auto generated by <i>make-symbol-device-package-bsdl.ulp Rev. 44</i> <wire x1="81.3312" y1="58.9556" x2="82.296" y2="58.0136" width="0.3048" layer="1"/> <wire x1="82.296" y1="58.0136" x2="82.4712" y2="57.8384" width="0.3048" layer="1"/> <wire x1="82.4712" y1="57.8384" x2="82.6008" y2="57.8384" width="0.3048" layer="1"/> +<contactref element="U$1" pad="148"/> +<wire x1="81.3312" y1="58.9556" x2="81.3312" y2="60.2972" width="0" layer="19" extent="1-1"/> </signal> <signal name="VCAP1"> <contactref element="C39" pad="2"/> -<contactref element="U$1" pad="92"/> -<wire x1="104.6484" y1="52.474" x2="106.3864" y2="52.474" width="0.3048" layer="1"/> <wire x1="106.3176" y1="52.474" x2="107.0492" y2="51.7424" width="0.3048" layer="1"/> <contactref element="C56" pad="2"/> <wire x1="106.3864" y1="52.474" x2="107.0492" y2="53.1368" width="0.3048" layer="1"/> -<wire x1="104.6484" y1="52.474" x2="106.3176" y2="52.474" width="0.3048" layer="1"/> +<contactref element="U$1" pad="92"/> +<wire x1="106.3864" y1="52.474" x2="106.3176" y2="52.474" width="0" layer="19" extent="1-1"/> +<wire x1="104.6484" y1="52.474" x2="106.3176" y2="52.474" width="0" layer="19" extent="1-1"/> </signal> <signal name="BOOT0" class="1"> <contactref element="U$1" pad="197"/> @@ -9694,8 +9399,6 @@ Auto generated by <i>make-symbol-device-package-bsdl.ulp Rev. 44</i> </signal> <signal name="AVR_GPIO_11"> <contactref element="U3" pad="22"/> -<contactref element="U$1" pad="13"/> -<wire x1="83.3124" y1="31.138" x2="83.3124" y2="29.5652" width="0.3048" layer="1"/> <wire x1="83.3124" y1="29.5652" x2="83.82" y2="29.0576" width="0.3048" layer="1"/> <via x="83.82" y="29.0576" extent="1-16" drill="0.6" shape="square"/> <wire x1="83.82" y1="29.0576" x2="83.82" y2="26.6192" width="0.3048" layer="16"/> @@ -9742,8 +9445,6 @@ Auto generated by <i>make-symbol-device-package-bsdl.ulp Rev. 44</i> </signal> <signal name="RTC_MFP"> <contactref element="U6" pad="7"/> -<contactref element="U$1" pad="47"/> -<wire x1="100.3304" y1="31.138" x2="100.3304" y2="20.8792" width="0.3048" layer="1"/> <wire x1="100.3304" y1="20.8792" x2="98.7552" y2="19.304" width="0.3048" layer="1"/> <wire x1="98.7552" y1="19.304" x2="91.44" y2="19.304" width="0.3048" layer="1"/> <wire x1="91.44" y1="19.304" x2="89.6112" y2="17.4752" width="0.3048" layer="1"/> @@ -9752,7 +9453,9 @@ Auto generated by <i>make-symbol-device-package-bsdl.ulp Rev. 44</i> <wire x1="89.0016" y1="10.7696" x2="87.4268" y2="10.7696" width="0.3048" layer="1"/> <wire x1="87.4268" y1="10.7696" x2="87.4014" y2="10.795" width="0.3048" layer="1"/> <contactref element="R6" pad="2"/> +<contactref element="U$1" pad="47"/> <wire x1="100.3304" y1="31.138" x2="86.756" y2="89.408" width="0" layer="19" extent="1-1"/> +<wire x1="100.3304" y1="20.8792" x2="100.3304" y2="31.138" width="0" layer="19" extent="1-1"/> </signal> <signal name="RTC_SCL"> <contactref element="U6" pad="6"/> @@ -10005,10 +9708,6 @@ Auto generated by <i>make-symbol-device-package-bsdl.ulp Rev. 44</i> <wire x1="26.12" y1="37.7626" x2="26.12" y2="36.518" width="0.3048" layer="1"/> <wire x1="26.12" y1="36.518" x2="26.247" y2="36.645" width="0.3048" layer="1"/> <wire x1="26.247" y1="36.645" x2="31.708" y2="36.645" width="0.3048" layer="1"/> -<contactref element="U$1" pad="158"/> -<contactref element="U$1" pad="204"/> -<contactref element="U$1" pad="185"/> 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<wire x1="56.0808" y1="54.2088" x2="59.0808" y2="55.2088" width="0" layer="19" extent="1-1"/> @@ -10451,67 +10175,12 @@ Auto generated by <i>make-symbol-device-package-bsdl.ulp Rev. 44</i> <wire x1="112.5474" y1="98.933" x2="106.4006" y2="97.663" width="0" layer="19" extent="1-1"/> <wire x1="114.72" y1="96.52" x2="112.5474" y2="98.933" width="0" layer="19" extent="1-1"/> <wire x1="116.42" y1="98.552" x2="114.72" y2="96.52" width="0" layer="19" extent="1-1"/> -<wire x1="31.708" y1="36.645" x2="41.0808" y2="49.2088" width="0" layer="19" extent="1-1"/> -<wire x1="31.3944" y1="36.3728" x2="31.708" y2="36.645" width="0" layer="19" extent="1-1"/> -<wire x1="24.384" y1="36.3728" x2="26.12" y2="36.518" width="0" layer="19" extent="1-1"/> -<wire x1="12.026" y1="37.592" x2="24.384" y2="36.3728" width="0" layer="19" extent="1-1"/> -<wire x1="5.93" y1="42.672" x2="12.026" y2="37.592" width="0" layer="19" extent="1-1"/> -<wire x1="5.6252" y1="32.6136" x2="12.026" y2="37.592" width="0" layer="19" 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-<wire x1="-1.182" y1="-48.434" x2="-1.182" y2="-51.434" width="0" layer="19" extent="1-1"/> -<wire x1="-1.182" y1="-38.434" x2="-1.182" y2="-48.434" width="0" layer="19" extent="1-1"/> -<wire x1="-1.182" y1="-35.434" x2="-1.182" y2="-38.434" width="0" layer="19" extent="1-1"/> -<wire x1="0.62" y1="-32.512" x2="-1.182" y2="-35.434" width="0" layer="19" extent="1-1"/> <wire x1="79.728" y1="78.6892" x2="79.59" y2="94.996" width="0" layer="19" extent="1-1"/> -<wire x1="86.0298" y1="12.065" x2="84.3284" y2="31.138" width="0" layer="19" extent="1-1"/> </signal> <signal name="FMC_CLK"> <contactref element="U7" pad="W11"/> <contactref element="U$1" pad="167"/> -<wire x1="75.4892" y1="53.4646" x2="68.7782" y2="53.4646" width="0.3048" layer="1"/> -<wire x1="42.0808" y1="58.2088" x2="68.7782" y2="53.4646" width="0" layer="19" extent="1-1"/> +<wire x1="42.0808" y1="58.2088" x2="75.4892" y2="53.4646" width="0" layer="19" extent="1-1"/> </signal> <signal name="FPGA_PROM_SCLK"> <contactref element="IC3" pad="6"/> @@ -10543,8 +10212,8 @@ Auto generated by <i>make-symbol-device-package-bsdl.ulp Rev. 44</i> <contactref element="IC3" pad="3"/> <contactref element="R20" pad="2"/> <contactref element="JP7" pad="1"/> -<wire x1="87.8586" y1="97.917" x2="97.878" y2="98.552" width="0" layer="19" extent="1-1"/> -<wire x1="91.186" y1="97.282" x2="87.8586" y2="97.917" width="0" layer="19" extent="1-1"/> +<wire x1="91.186" y1="97.282" x2="97.878" y2="98.552" width="0" layer="19" extent="1-1"/> +<wire x1="87.8586" y1="97.917" x2="91.186" y2="97.282" width="0" layer="19" extent="1-1"/> </signal> <signal name="FPGA_GPIO_TAMPER_0"> <contactref element="U7" pad="F15"/> @@ -10558,23 +10227,23 @@ Auto generated by <i>make-symbol-device-package-bsdl.ulp Rev. 44</i> </signal> <signal name="FPGA_IRQ_N_0"> <contactref element="U7" pad="F14"/> -<contactref element="U$1" pad="181"/> -<wire x1="55.0808" y1="55.2088" x2="75.4892" y2="46.4796" width="0" layer="19" extent="1-1"/> +<contactref element="U$1" pad="175"/> +<wire x1="55.0808" y1="55.2088" x2="75.4892" y2="49.4768" width="0" layer="19" extent="1-1"/> </signal> <signal name="FPGA_IRQ_N_1"> <contactref element="U7" pad="F16"/> -<contactref element="U$1" pad="180"/> -<wire x1="55.0808" y1="53.2088" x2="75.4892" y2="46.9622" width="0" layer="19" extent="1-1"/> +<contactref element="U$1" pad="174"/> +<wire x1="55.0808" y1="53.2088" x2="75.4892" y2="49.9594" width="0" layer="19" extent="1-1"/> </signal> <signal name="FPGA_IRQ_N_2"> <contactref element="U7" pad="E17"/> -<contactref element="U$1" pad="179"/> -<wire x1="56.0808" y1="52.2088" x2="75.4892" y2="47.4702" width="0" layer="19" extent="1-1"/> +<contactref element="U$1" pad="123"/> +<wire x1="56.0808" y1="52.2088" x2="93.828" y2="60.2972" width="0" layer="19" extent="1-1"/> </signal> <signal name="FPGA_IRQ_N_3"> <contactref element="U7" pad="C14"/> -<contactref element="U$1" pad="178"/> -<wire x1="58.0808" y1="55.2088" x2="75.4892" y2="47.9782" width="0" layer="19" extent="1-1"/> +<contactref element="U$1" pad="122"/> +<wire x1="58.0808" y1="55.2088" x2="94.3106" y2="60.2972" width="0" layer="19" extent="1-1"/> </signal> <signal name="FPGA_GPIO_A_0"> <contactref element="U7" pad="C15"/> @@ -10795,8 +10464,8 @@ Auto generated by <i>make-symbol-device-package-bsdl.ulp Rev. 44</i> </signal> <signal name="FPGA_DONE"> <contactref element="R34" pad="1"/> -<contactref element="U$1" pad="36"/> -<wire x1="4.23" y1="37.592" x2="94.8186" y2="31.138" width="0" layer="19" extent="1-1"/> +<contactref element="U$1" pad="119"/> +<wire x1="4.23" y1="37.592" x2="95.8092" y2="60.2972" width="0" layer="19" extent="1-1"/> </signal> <signal name="N$35"> <contactref element="U$5" pad="P$30"/> @@ -11127,7 +10796,7 @@ Auto generated by <i>make-symbol-device-package-bsdl.ulp Rev. 44</i> <wire x1="13.97" y1="17.384" x2="123.332" y2="4.064" width="0" layer="19" extent="1-1"/> <wire x1="11.643" y1="18.826" x2="13.97" y2="17.384" width="0" layer="19" extent="1-1"/> <wire x1="10.993" y1="18.826" x2="11.643" y2="18.826" width="0" layer="19" extent="1-1"/> -<wire x1="-10.85" y1="-110" x2="13.97" y2="17.384" width="0" layer="19" extent="1-1"/> +<wire x1="13.48" y1="13.28" x2="13.97" y2="17.384" width="0" layer="19" extent="1-1"/> </signal> <signal name="N$54"> <contactref element="R62" pad="1"/> @@ -11193,7 +10862,7 @@ Auto generated by <i>make-symbol-device-package-bsdl.ulp Rev. 44</i> <contactref element="U$9" pad="7"/> <contactref element="JP2" pad="1"/> <contactref element="R22" pad="2"/> -<wire x1="10.343" y1="18.826" x2="-10" y2="-101.27" width="0" layer="19" extent="1-1"/> +<wire x1="10.343" y1="18.826" x2="6.51" y2="10.49" width="0" layer="19" extent="1-1"/> <wire x1="13.97" y1="18.684" x2="10.343" y2="18.826" width="0" layer="19" extent="1-1"/> </signal> <signal name="VIN"> @@ -11390,82 +11059,90 @@ Auto generated by <i>make-symbol-device-package-bsdl.ulp Rev. 44</i> </signal> <signal name="FT_MGMT_TXD"> <contactref element="U$10" pad="13"/> +<contactref element="U$1" pad="144"/> +<wire x1="83.3124" y1="60.2972" x2="129.98" y2="23.666" width="0" layer="19" extent="1-1"/> </signal> <signal name="FT_MGMT_RXD"> <contactref element="U$10" pad="14"/> +<contactref element="U$1" pad="143"/> +<wire x1="83.8204" y1="60.2972" x2="129.98" y2="24.166" width="0" layer="19" extent="1-1"/> </signal> <signal name="FT_MGMT_RTS"> <contactref element="U$10" pad="15"/> +<contactref element="U$1" pad="146"/> +<wire x1="82.3218" y1="60.2972" x2="129.98" y2="24.666" width="0" layer="19" extent="1-1"/> </signal> <signal name="FT_MGMT_CTS"> <contactref element="U$10" pad="16"/> +<contactref element="U$1" pad="145"/> +<wire x1="82.8298" y1="60.2972" x2="129.98" y2="25.166" width="0" layer="19" extent="1-1"/> </signal> <signal name="FT_MGMT_DTR"> <contactref element="U$10" pad="17"/> </signal> <signal name="FMC_SDCKE0"> -<contactref element="U$1" pad="38"/> <contactref element="IC1" pad="67"/> +<contactref element="U$1" pad="38"/> <wire x1="-1.182" y1="14.462" x2="95.8092" y2="31.138" width="0" layer="19" extent="1-1"/> </signal> <signal name="FMC_SDNE0"> -<contactref element="U$1" pad="37"/> <contactref element="IC1" pad="20"/> +<contactref element="U$1" pad="37"/> <wire x1="-13.042" y1="14.462" x2="95.3266" y2="31.138" width="0" layer="19" extent="1-1"/> </signal> <signal name="FMC_SDNWE"> -<contactref element="U$1" pad="35"/> <contactref element="IC1" pad="17"/> <contactref element="IC2" pad="17"/> +<contactref element="U$1" pad="35"/> <wire x1="-13.042" y1="15.962" x2="94.3106" y2="31.138" width="0" layer="19" extent="1-1"/> <wire x1="-13.042" y1="-40.934" x2="-13.042" y2="15.962" width="0" layer="19" extent="1-1"/> </signal> <signal name="FMC_SDNCAS"> -<contactref element="U$1" pad="191"/> <contactref element="IC1" pad="18"/> <contactref element="IC2" pad="18"/> +<contactref element="U$1" pad="191"/> <wire x1="-13.042" y1="15.462" x2="75.4892" y2="41.4758" width="0" layer="19" extent="1-1"/> <wire x1="-13.042" y1="-41.434" x2="-13.042" y2="15.462" width="0" layer="19" extent="1-1"/> </signal> <signal name="FMC_SDNRAS"> -<contactref element="U$1" pad="70"/> <contactref element="IC1" pad="19"/> <contactref element="IC2" pad="19"/> +<contactref element="U$1" pad="70"/> <wire x1="-13.042" y1="14.962" x2="104.6484" y2="41.4758" width="0" layer="19" extent="1-1"/> <wire x1="-13.042" y1="-41.934" x2="-13.042" y2="14.962" width="0" layer="19" extent="1-1"/> </signal> <signal name="FMC_NBL0"> <contactref element="IC1" pad="16"/> -<contactref element="U$1" pad="200"/> <contactref element="IC2" pad="16"/> +<contactref element="U$1" pad="200"/> <wire x1="-13.042" y1="16.462" x2="75.4892" y2="36.98" width="0" layer="19" extent="1-1"/> <wire x1="-13.042" y1="-40.434" x2="-13.042" y2="16.462" width="0" layer="19" extent="1-1"/> </signal> <signal name="FMC_NBL1"> <contactref element="IC1" pad="71"/> -<contactref element="U$1" pad="201"/> <contactref element="IC2" pad="71"/> +<contactref element="U$1" pad="201"/> <wire x1="-1.182" y1="16.462" x2="75.4892" y2="36.472" width="0" layer="19" extent="1-1"/> <wire x1="-1.182" y1="-40.434" x2="-1.182" y2="16.462" width="0" layer="19" extent="1-1"/> </signal> <signal name="FMC_NBL2"> <contactref element="IC1" pad="28"/> -<contactref element="U$1" pad="205"/> <contactref element="IC2" pad="28"/> +<contactref element="U$1" pad="205"/> <wire x1="-13.042" y1="10.462" x2="75.4892" y2="34.4654" width="0" layer="19" extent="1-1"/> <wire x1="-13.042" y1="-46.434" x2="-13.042" y2="10.462" width="0" layer="19" extent="1-1"/> </signal> <signal name="FMC_NBL3"> <contactref element="IC1" pad="59"/> -<contactref element="U$1" pad="206"/> <contactref element="IC2" pad="59"/> +<contactref element="U$1" pad="206"/> <wire x1="-1.182" y1="10.462" x2="75.4892" y2="33.9574" width="0" layer="19" extent="1-1"/> <wire x1="-1.182" y1="-46.434" x2="-1.182" y2="10.462" width="0" layer="19" extent="1-1"/> </signal> <signal name="FMC_SDCLK"> <contactref element="IC1" pad="68"/> -<contactref element="U$1" pad="135"/> <contactref element="IC2" pad="68"/> +<contactref element="U$1" pad="135"/> <wire x1="-1.182" y1="14.962" x2="87.8082" y2="60.2972" width="0" layer="19" extent="1-1"/> <wire x1="-1.182" y1="-41.934" x2="-1.182" y2="14.962" width="0" layer="19" extent="1-1"/> </signal> @@ -11498,18 +11175,24 @@ Auto generated by <i>make-symbol-device-package-bsdl.ulp Rev. 44</i> <contactref element="R76" pad="2"/> <contactref element="Q1" pad="1"/> <contactref element="R75" pad="1"/> -<wire x1="-10.95" y1="-81.1" x2="-9.35" y2="-90" width="0" layer="19" extent="1-1"/> -<wire x1="-0.65" y1="-80" x2="-10.95" y2="-81.1" width="0" layer="19" extent="1-1"/> +<wire x1="9.37" y1="10.34" x2="13.51" y2="10.33" width="0" layer="19" extent="1-1"/> +<wire x1="12.05" y1="11.44" x2="9.37" y2="10.34" width="0" layer="19" extent="1-1"/> </signal> <signal name="N$14"> <contactref element="Q1" pad="3"/> <contactref element="JP2" pad="2"/> -<wire x1="-10" y1="-78.9" x2="-10" y2="-98.73" width="0" layer="19" extent="1-1"/> +<wire x1="10.32" y1="12.54" x2="6.51" y2="13.03" width="0" layer="19" extent="1-1"/> </signal> <signal name="FPGA_ENTROPY_DISABLE"> <contactref element="R76" pad="1"/> <contactref element="U7" pad="B18"/> -<wire x1="-10.65" y1="-90" x2="59.0808" y2="51.2088" width="0" layer="19" extent="1-1"/> +<wire x1="12.21" y1="10.33" x2="59.0808" y2="51.2088" width="0" layer="19" extent="1-1"/> +</signal> +<signal name="SDIO_D0"> +<contactref element="U$1" pad="140"/> +</signal> +<signal name="SDIO_D1"> +<contactref element="U$1" pad="141"/> </signal> <signal name="SDIO_CK"> <contactref element="U$1" pad="163"/> @@ -11523,24 +11206,6 @@ Auto generated by <i>make-symbol-device-package-bsdl.ulp Rev. 44</i> <signal name="SDIO_D2"> <contactref element="U$1" pad="161"/> </signal> -<signal name="SDIO_D0"> -<contactref element="U$1" pad="140"/> -</signal> -<signal name="SDIO_D1"> -<contactref element="U$1" pad="141"/> -</signal> -<signal name="N$23"> -<contactref element="U$1" pad="143"/> -</signal> -<signal name="N$25"> -<contactref element="U$1" pad="144"/> -</signal> -<signal name="N$57"> -<contactref element="U$1" pad="145"/> -</signal> -<signal name="N$58"> -<contactref element="U$1" pad="146"/> -</signal> </signals> <errors> <approved hash="18,30,75340d2b0d22753d"/> diff --git a/eagle/alpha/rev02/rev02.sch b/eagle/alpha/rev02/rev02.sch index 07a3f86..cc8e74b 100644 --- a/eagle/alpha/rev02/rev02.sch +++ b/eagle/alpha/rev02/rev02.sch @@ -14160,38 +14160,6 @@ Source: AVX .. aphvc.pdf</description> <text x="343.916" y="4.953" size="2.54" layer="94">Sheet:</text> <frame x1="0" y1="0" x2="387.35" y2="260.35" columns="8" rows="5" layer="94"/> </symbol> -<symbol name="FRAME_C_L"> -<frame x1="0" y1="0" x2="558.8" y2="431.8" columns="11" rows="9" layer="94" border-bottom="no"/> -</symbol> -<symbol name="DOCFIELD"> -<wire x1="0" y1="0" x2="71.12" y2="0" width="0.1016" layer="94"/> -<wire x1="101.6" y1="15.24" x2="87.63" y2="15.24" width="0.1016" layer="94"/> -<wire x1="0" y1="0" x2="0" y2="5.08" width="0.1016" layer="94"/> -<wire x1="0" y1="5.08" x2="71.12" y2="5.08" width="0.1016" layer="94"/> -<wire x1="0" y1="5.08" x2="0" y2="15.24" width="0.1016" layer="94"/> -<wire x1="101.6" y1="15.24" x2="101.6" y2="5.08" width="0.1016" layer="94"/> -<wire x1="71.12" y1="5.08" x2="71.12" y2="0" width="0.1016" layer="94"/> -<wire x1="71.12" y1="5.08" x2="87.63" y2="5.08" width="0.1016" layer="94"/> -<wire x1="71.12" y1="0" x2="101.6" y2="0" width="0.1016" layer="94"/> -<wire x1="87.63" y1="15.24" x2="87.63" y2="5.08" width="0.1016" layer="94"/> -<wire x1="87.63" y1="15.24" x2="0" y2="15.24" width="0.1016" layer="94"/> -<wire x1="87.63" y1="5.08" x2="101.6" y2="5.08" width="0.1016" layer="94"/> -<wire x1="101.6" y1="5.08" x2="101.6" y2="0" width="0.1016" layer="94"/> -<wire x1="0" y1="15.24" x2="0" y2="22.86" width="0.1016" layer="94"/> -<wire x1="101.6" y1="35.56" x2="0" y2="35.56" width="0.1016" layer="94"/> -<wire x1="101.6" y1="35.56" x2="101.6" y2="22.86" width="0.1016" layer="94"/> -<wire x1="0" y1="22.86" x2="101.6" y2="22.86" width="0.1016" layer="94"/> -<wire x1="0" y1="22.86" x2="0" y2="35.56" width="0.1016" layer="94"/> -<wire x1="101.6" y1="22.86" x2="101.6" y2="15.24" width="0.1016" layer="94"/> -<text x="1.27" y="1.27" size="2.54" layer="94">Date:</text> -<text x="12.7" y="1.27" size="2.54" layer="94">>LAST_DATE_TIME</text> -<text x="72.39" y="1.27" size="2.54" layer="94">Sheet:</text> -<text x="86.36" y="1.27" size="2.54" layer="94">>SHEET</text> -<text x="88.9" y="11.43" size="2.54" layer="94">REV:</text> -<text x="1.27" y="19.05" size="2.54" layer="94">TITLE:</text> -<text x="1.27" y="11.43" size="2.54" layer="94">Document Number:</text> -<text x="17.78" y="19.05" size="2.54" layer="94">>DRAWING_NAME</text> -</symbol> <symbol name="A4L-LOC"> <wire x1="256.54" y1="3.81" x2="256.54" y2="8.89" width="0.1016" layer="94"/> <wire x1="256.54" y1="8.89" x2="256.54" y2="13.97" width="0.1016" layer="94"/> @@ -14231,20 +14199,6 @@ DIN A3, landscape with location and doc. field</description> </device> </devices> </deviceset> -<deviceset name="FRAME_C_L" prefix="FRAME" uservalue="yes"> -<description><b>FRAME</b> C Size , 17 x 22 INCH, Landscape<p></description> -<gates> -<gate name="G$1" symbol="FRAME_C_L" x="0" y="0" addlevel="always"/> -<gate name="G$2" symbol="DOCFIELD" x="452.12" y="0" addlevel="always"/> -</gates> -<devices> -<device name=""> -<technologies> -<technology name=""/> -</technologies> -</device> -</devices> -</deviceset> <deviceset name="A4L-LOC" prefix="FRAME" uservalue="yes"> <description><b>FRAME</b><p> DIN A4, landscape with location and doc. field</description> @@ -24043,1581 +23997,6 @@ EAGLE CAD Libraries on element14</a></description> </deviceset> </devicesets> </library> -<library name="STM32F429"> -<packages> -<package name="LQFP-208"> -<smd name="1" x="-14.5796" y="12.7508" dx="0.3" dy="1.7" layer="1" rot="R270"/> -<smd name="2" x="-14.5796" y="12.2428" dx="0.3" dy="1.7" layer="1" rot="R270"/> -<smd name="3" x="-14.5796" y="11.7602" dx="0.3" dy="1.7" layer="1" rot="R270"/> -<smd name="4" x="-14.5796" y="11.2522" dx="0.3" dy="1.7" layer="1" rot="R270"/> -<smd name="5" x="-14.5796" y="10.7442" dx="0.3" dy="1.7" layer="1" rot="R270"/> -<smd name="6" x="-14.5796" y="10.2616" dx="0.3" dy="1.7" layer="1" rot="R270"/> -<smd name="7" x="-14.5796" y="9.7536" dx="0.3" dy="1.7" layer="1" rot="R270"/> -<smd name="8" x="-14.5796" y="9.2456" dx="0.3" dy="1.7" layer="1" rot="R270"/> -<smd name="9" x="-14.5796" y="8.7376" dx="0.3" dy="1.7" layer="1" rot="R270"/> -<smd name="10" x="-14.5796" y="8.255" dx="0.3" dy="1.7" layer="1" rot="R270"/> -<smd name="11" x="-14.5796" y="7.747" dx="0.3" dy="1.7" layer="1" rot="R270"/> -<smd name="12" x="-14.5796" y="7.239" dx="0.3" dy="1.7" layer="1" rot="R270"/> -<smd name="13" x="-14.5796" y="6.7564" dx="0.3" dy="1.7" layer="1" rot="R270"/> -<smd name="14" x="-14.5796" y="6.2484" dx="0.3" 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rot="R180"/> -<pin name="FMC_D26/PI2" x="38.1" y="27.94" length="short" rot="R180"/> -<text x="-10.16" y="22.86" size="1.778" layer="95">>NAME</text> -<text x="-10.16" y="17.78" size="1.778" layer="96">>VALUE</text> -<text x="-10.16" y="38.1" size="1.778" layer="97">BANK C -(right, -pin 105-156)</text> -</symbol> -<symbol name="STM32F429_LQFP-208_D"> -<wire x1="-38.1" y1="50.8" x2="35.56" y2="50.8" width="0.254" layer="94"/> -<wire x1="-38.1" y1="50.8" x2="-38.1" y2="-53.34" width="0.254" layer="94"/> -<wire x1="35.56" y1="50.8" x2="35.56" y2="-53.34" width="0.254" layer="94"/> -<wire x1="-38.1" y1="-53.34" x2="35.56" y2="-53.34" width="0.254" layer="94"/> -<pin name="PI3/FMC_D27" x="-40.64" y="30.48" length="short"/> -<pin name="VDD@158" x="-22.86" y="53.34" length="short" direction="pwr" rot="R270"/> -<pin name="PA14/JTCK-SWCLK" x="-40.64" y="25.4" length="short"/> -<pin name="PA15/JTDI" x="-40.64" y="22.86" length="short"/> -<pin name="PC10/SPI3_SCK/SDIO_D2" x="-40.64" y="20.32" length="short"/> -<pin name="PC11/SPI3_MISO/SDIO_D3" x="-40.64" y="17.78" length="short"/> -<pin name="PC12/SPI3_MOSI/SDIO_CK" x="-40.64" y="15.24" length="short"/> -<pin name="PD0/FMC_D2" x="-40.64" y="12.7" length="short"/> -<pin name="PD1/FMC_D3" x="-40.64" y="10.16" length="short"/> -<pin name="PD2/SDIO_CMD" x="-40.64" y="7.62" length="short"/> -<pin name="PD3/FMC_CLK" x="-40.64" y="5.08" length="short"/> -<pin name="PD4/FMC_NOE" x="-40.64" y="2.54" length="short"/> -<pin name="PD5/FMC_NWE" x="-40.64" y="0" length="short"/> -<pin name="VSS@170" x="-10.16" y="-55.88" length="short" direction="pwr" rot="R90"/> -<pin name="VDD@171" x="-17.78" y="53.34" length="short" direction="pwr" rot="R270"/> -<pin name="PD6/FMC_NWAIT" x="-40.64" y="-7.62" length="short"/> -<pin name="PD7/FMC_NE1/FMC_NCE2" x="-40.64" y="-10.16" length="short"/> -<pin name="PJ12" x="-40.64" y="-12.7" length="short"/> -<pin name="PJ13" x="-40.64" y="-15.24" length="short"/> -<pin name="PJ14" x="-40.64" y="-17.78" length="short"/> -<pin name="PJ15" x="-40.64" y="-20.32" length="short"/> -<pin name="PG9/FMC_NE2/FMC_NCE3" x="-40.64" y="-22.86" length="short"/> -<pin name="PG10/FMC_NCE4_1/FMC_NE3" x="-40.64" y="-25.4" length="short"/> -<pin name="PG11/FMC_NCE4_2" x="-40.64" y="-27.94" length="short"/> -<pin name="PG12/FMC_NE4" x="-40.64" y="-30.48" length="short"/> -<pin name="PG13/FMC_A24" x="-40.64" y="-33.02" length="short"/> -<pin name="PG14/FMC_A25" x="-40.64" y="-35.56" length="short"/> -<pin name="VSS@184" x="5.08" y="-55.88" length="short" direction="pwr" rot="R90"/> -<pin name="VDD@185" x="12.7" y="53.34" length="short" direction="pwr" rot="R270"/> -<pin name="PK3" x="38.1" y="-30.48" length="short" rot="R180"/> -<pin name="PK4" x="38.1" y="-27.94" length="short" rot="R180"/> -<pin name="PK5" x="38.1" y="-25.4" length="short" rot="R180"/> -<pin name="PK6" x="38.1" y="-22.86" length="short" rot="R180"/> -<pin name="PK7" x="38.1" y="-20.32" length="short" rot="R180"/> -<pin name="FMC_SDNCAS/PG15" x="38.1" y="-17.78" length="short" rot="R180"/> -<pin name="JTDO/TRACESWO/PB3" x="38.1" y="-15.24" length="short" rot="R180"/> -<pin name="NJTRST/PB4" x="38.1" y="-12.7" length="short" rot="R180"/> -<pin name="FMC_SDCKE1/PB5" x="38.1" y="-10.16" length="short" rot="R180"/> -<pin name="FMC_SDNE1/PB6" x="38.1" y="-7.62" length="short" rot="R180"/> -<pin name="FMC_NL/PB7" x="38.1" y="-5.08" length="short" rot="R180"/> -<pin name="BOOT0@197" x="40.64" y="-48.26" length="middle" direction="in" rot="R180"/> -<pin name="PB8" x="38.1" y="0" length="short" rot="R180"/> -<pin name="PB9" x="38.1" y="2.54" length="short" rot="R180"/> -<pin name="FMC_NBL0/PE0" x="38.1" y="5.08" length="short" rot="R180"/> -<pin name="FMC_NBL1/PE1" x="38.1" y="7.62" length="short" rot="R180"/> -<pin name="VSS@202" x="10.16" y="-55.88" length="short" direction="pwr" rot="R90"/> -<pin name="PDR_ON@203" x="40.64" y="12.7" length="middle" rot="R180"/> -<pin name="VDD@204" x="17.78" y="53.34" length="short" direction="pwr" rot="R270"/> -<pin name="FMC_NBL2/PI4" x="38.1" y="17.78" length="short" rot="R180"/> -<pin name="FMC_NBL3/PI5" x="38.1" y="20.32" length="short" rot="R180"/> -<pin name="FMC_D28/PI6" x="38.1" y="22.86" length="short" rot="R180"/> -<pin name="FMC_D29/PI7" x="38.1" y="25.4" length="short" rot="R180"/> -<text x="-12.7" y="2.54" size="1.778" layer="95">>NAME</text> -<text x="-12.7" y="-2.54" size="1.778" layer="96">>VALUE</text> -<text x="-10.16" y="38.1" size="1.778" layer="97">BANK D -(top, -pn 157-208)</text> -</symbol> -</symbols> -<devicesets> -<deviceset name="STM32F429BIT6"> -<description>STM32F429 Cortex-M4 CPU -180 MHz, 256 KB RAM, 2 MB Flash</description> -<gates> -<gate name="G$1" symbol="STM32F429_LQFP-208_A" x="-147.32" y="5.08"/> -<gate name="G$2" symbol="STM32F429_LQFP-208_B" x="-48.26" y="2.54"/> -<gate name="G$3" symbol="STM32F429_LQFP-208_C" x="50.8" y="0"/> -<gate name="G$4" symbol="STM32F429_LQFP-208_D" x="149.86" y="0"/> -</gates> -<devices> -<device name="" package="LQFP-208"> -<connects> -<connect gate="G$1" pin="FMC_CD/PF9" pad="30"/> -<connect gate="G$1" pin="FMC_INTR/PF10" pad="31"/> -<connect gate="G$1" pin="FMC_NIORD/PF6" pad="27"/> -<connect gate="G$1" pin="FMC_NIOWR/PF8" pad="29"/> -<connect gate="G$1" pin="FMC_NREG/PF7" pad="28"/> -<connect gate="G$1" pin="FMC_SDCKE0/PC3" pad="38"/> -<connect gate="G$1" pin="FMC_SDCKE0/PH2" pad="46"/> -<connect gate="G$1" pin="FMC_SDNE0/PC2" pad="37"/> -<connect gate="G$1" pin="FMC_SDNE0/PH3" pad="47"/> -<connect gate="G$1" pin="FMC_SDNWE/PC0" pad="35"/> -<connect gate="G$1" pin="I2C2_SCL/PH4" pad="48"/> -<connect gate="G$1" pin="I2C2_SDA/FMC_SDNWE/PH5" pad="49"/> -<connect gate="G$1" pin="NRST@34" pad="34"/> -<connect gate="G$1" pin="OSC_IN/PH0" pad="32"/> -<connect gate="G$1" pin="OSC_OUT/PH1" pad="33"/> -<connect gate="G$1" pin="PC1" pad="36"/> -<connect gate="G$1" pin="PC13" pad="8"/> -<connect gate="G$1" pin="PC14/OSC32_IN" pad="9"/> -<connect gate="G$1" pin="PC15/OSC32_OUT" pad="10"/> -<connect gate="G$1" pin="PE2/FMC_A23" pad="1"/> -<connect gate="G$1" pin="PE3/FMC_A19" pad="2"/> -<connect gate="G$1" pin="PE4/FMC_A20" pad="3"/> -<connect gate="G$1" pin="PE5/FMC_A21" pad="4"/> -<connect gate="G$1" pin="PE6/FMC_A22" pad="5"/> -<connect gate="G$1" pin="PF0/FMC_A0" pad="16"/> -<connect gate="G$1" pin="PF1/FMC_A1" pad="17"/> -<connect gate="G$1" pin="PF2/FMC_A2" pad="18"/> -<connect gate="G$1" pin="PF3/FMC_A3" pad="22"/> -<connect gate="G$1" pin="PF4/FMC_A4" pad="23"/> -<connect gate="G$1" pin="PF5/FMC_A5" pad="24"/> -<connect gate="G$1" pin="PI10/FMC_D31" pad="12"/> -<connect gate="G$1" pin="PI11" pad="13"/> -<connect gate="G$1" pin="PI12" pad="19"/> -<connect gate="G$1" pin="PI13" pad="20"/> -<connect gate="G$1" pin="PI14" pad="21"/> -<connect gate="G$1" pin="PI8" pad="7"/> -<connect gate="G$1" pin="PI9/FMC_D30" pad="11"/> -<connect gate="G$1" pin="USART2_RTS/PA1" pad="44"/> -<connect gate="G$1" pin="USART2_RX/PA3" pad="50"/> -<connect gate="G$1" pin="USART2_TX/PA2" pad="45"/> -<connect gate="G$1" pin="VBAT@6" pad="6"/> -<connect gate="G$1" pin="VDD@15" pad="15"/> -<connect gate="G$1" pin="VDD@26" pad="26"/> -<connect gate="G$1" pin="VDD@39" pad="39"/> -<connect gate="G$1" pin="VDD@52" pad="52"/> -<connect gate="G$1" pin="VDDA@42" pad="42"/> -<connect gate="G$1" pin="VREF+@41" pad="41"/> -<connect gate="G$1" pin="VSS@14" pad="14"/> -<connect gate="G$1" pin="VSS@25" pad="25"/> -<connect gate="G$1" pin="VSS@51" pad="51"/> -<connect gate="G$1" pin="VSSA@40" pad="40"/> -<connect gate="G$1" pin="WKUP/USART2_CTS/PA0" pad="43"/> -<connect gate="G$2" pin="FMC_D10/PE13" pad="87"/> -<connect gate="G$2" pin="FMC_D11/PE14" pad="88"/> -<connect gate="G$2" pin="FMC_D12/PE15" pad="89"/> -<connect gate="G$2" pin="FMC_D16/PH8" pad="98"/> -<connect gate="G$2" pin="FMC_D17/PH9" pad="99"/> -<connect gate="G$2" pin="FMC_D18/PH10" pad="100"/> -<connect gate="G$2" pin="FMC_D19/PH11" pad="101"/> -<connect gate="G$2" pin="FMC_D20/PH12" pad="102"/> -<connect gate="G$2" pin="FMC_D5/PE8" pad="80"/> -<connect gate="G$2" pin="FMC_D6/PE9" pad="81"/> -<connect gate="G$2" pin="FMC_D7/PE10" pad="84"/> -<connect gate="G$2" pin="FMC_D8/PE11" pad="85"/> -<connect gate="G$2" pin="FMC_D9/PE12" pad="86"/> -<connect gate="G$2" pin="FMC_SDCKE1/PH7" pad="97"/> -<connect gate="G$2" pin="FMC_SDNE1/PH6" pad="96"/> -<connect gate="G$2" pin="PA4" pad="53"/> -<connect gate="G$2" pin="PA5/SPI1_SCK" pad="54"/> -<connect gate="G$2" pin="PA6/SPI1_MISO" pad="55"/> -<connect gate="G$2" pin="PA7/SPI1_MOSI" pad="56"/> -<connect gate="G$2" pin="PB0" pad="61"/> -<connect gate="G$2" pin="PB1" pad="62"/> -<connect gate="G$2" pin="PB10" pad="90"/> -<connect gate="G$2" pin="PB11" pad="91"/> -<connect gate="G$2" pin="PB12" pad="104"/> -<connect gate="G$2" pin="PB2/BOOT1" pad="63"/> -<connect gate="G$2" pin="PC4" pad="57"/> -<connect gate="G$2" pin="PC5" pad="58"/> -<connect gate="G$2" pin="PE7/FMC_D4" pad="79"/> -<connect gate="G$2" pin="PF11/FMC_SDNRAS" pad="70"/> -<connect gate="G$2" pin="PF12/FMC_A6" pad="71"/> -<connect gate="G$2" pin="PF13/FMC_A7" pad="74"/> -<connect gate="G$2" pin="PF14/FMC_A8" pad="75"/> -<connect gate="G$2" pin="PF15/FMC_A9" pad="76"/> -<connect gate="G$2" pin="PG0/FMC_A10" pad="77"/> -<connect gate="G$2" pin="PG1/FMC_A11" pad="78"/> -<connect gate="G$2" pin="PI15" pad="64"/> -<connect gate="G$2" pin="PJ0" pad="65"/> -<connect gate="G$2" pin="PJ1" pad="66"/> -<connect gate="G$2" pin="PJ2" pad="67"/> -<connect gate="G$2" pin="PJ3" pad="68"/> -<connect gate="G$2" pin="PJ4" pad="69"/> -<connect gate="G$2" pin="PJ5" pad="95"/> -<connect gate="G$2" pin="VCAP1@92" pad="92"/> -<connect gate="G$2" pin="VDD@103" pad="103"/> -<connect gate="G$2" pin="VDD@59" pad="59"/> -<connect gate="G$2" pin="VDD@73" pad="73"/> -<connect gate="G$2" pin="VDD@83" pad="83"/> -<connect gate="G$2" pin="VDD@94" pad="94"/> -<connect gate="G$2" pin="VSS@60" pad="60"/> -<connect gate="G$2" pin="VSS@72" pad="72"/> -<connect gate="G$2" pin="VSS@82" pad="82"/> -<connect gate="G$2" pin="VSS@93" pad="93"/> -<connect gate="G$3" pin="FMC_A15/PG5" pad="132"/> -<connect gate="G$3" pin="FMC_D21/PH13" pad="151"/> -<connect gate="G$3" pin="FMC_D22/PH14" pad="152"/> -<connect gate="G$3" pin="FMC_D23/PH15" pad="153"/> -<connect gate="G$3" pin="FMC_D24/PI0" pad="154"/> -<connect gate="G$3" pin="FMC_D25/PI1" pad="155"/> -<connect gate="G$3" pin="FMC_D26/PI2" pad="156"/> -<connect gate="G$3" pin="FMC_INT2/PG6" pad="133"/> -<connect gate="G$3" pin="FMC_INT3/PG7" pad="134"/> -<connect gate="G$3" pin="FMC_SDCLK/PG8" pad="135"/> -<connect gate="G$3" pin="JTMS-SWDIO/PA13" pad="147"/> -<connect gate="G$3" pin="PA8" pad="142"/> -<connect gate="G$3" pin="PB13/SPI2_SCK" pad="105"/> -<connect gate="G$3" pin="PB14/SPI2_MISO" pad="106"/> -<connect gate="G$3" pin="PB15/SPI2_MOSI" pad="107"/> -<connect gate="G$3" pin="PC6" pad="138"/> -<connect gate="G$3" pin="PC7" pad="139"/> -<connect gate="G$3" pin="PD10/FMC_D15" pad="110"/> -<connect gate="G$3" pin="PD11/FMC_A16" pad="111"/> -<connect gate="G$3" pin="PD12/FMC_A17" pad="112"/> -<connect gate="G$3" pin="PD13/FMC_A18" pad="113"/> -<connect gate="G$3" pin="PD14/FMC_D0" pad="116"/> -<connect gate="G$3" pin="PD15/FMC_D1" pad="117"/> -<connect gate="G$3" pin="PD8/FMC_D13" pad="108"/> -<connect gate="G$3" pin="PD9/FMC_D14" pad="109"/> -<connect gate="G$3" pin="PG2/FMC_A12" pad="129"/> -<connect gate="G$3" pin="PG3/FMC_A13" pad="130"/> -<connect gate="G$3" pin="PG4/FMC_A14" pad="131"/> -<connect gate="G$3" pin="PJ10" pad="122"/> -<connect gate="G$3" pin="PJ11" pad="123"/> -<connect gate="G$3" pin="PJ6" pad="118"/> -<connect gate="G$3" pin="PJ7" pad="119"/> -<connect gate="G$3" pin="PJ8" pad="120"/> -<connect gate="G$3" pin="PJ9" pad="121"/> -<connect gate="G$3" pin="PK0" pad="126"/> -<connect gate="G$3" pin="PK1" pad="127"/> -<connect gate="G$3" pin="PK2" pad="128"/> -<connect gate="G$3" pin="SDIO_D0/PC8" pad="140"/> -<connect gate="G$3" pin="SDIO_D1/PC9" pad="141"/> -<connect gate="G$3" pin="USART1_CTS/PA11" pad="145"/> -<connect gate="G$3" pin="USART1_RTS/PA12" pad="146"/> -<connect gate="G$3" pin="USART1_RX/PA10" pad="144"/> -<connect gate="G$3" pin="USART1_TX/PA9" pad="143"/> -<connect gate="G$3" pin="VCAP2@148" pad="148"/> -<connect gate="G$3" pin="VDD@115" pad="115"/> -<connect gate="G$3" pin="VDD@124" pad="124"/> -<connect gate="G$3" pin="VDD@137" pad="137"/> -<connect gate="G$3" pin="VDD@150" pad="150"/> -<connect gate="G$3" pin="VSS@114" pad="114"/> -<connect gate="G$3" pin="VSS@125" pad="125"/> -<connect gate="G$3" pin="VSS@136" pad="136"/> -<connect gate="G$3" pin="VSS@149" pad="149"/> -<connect gate="G$4" pin="BOOT0@197" pad="197"/> -<connect gate="G$4" pin="FMC_D28/PI6" pad="207"/> -<connect gate="G$4" pin="FMC_D29/PI7" pad="208"/> -<connect gate="G$4" pin="FMC_NBL0/PE0" pad="200"/> -<connect gate="G$4" pin="FMC_NBL1/PE1" pad="201"/> -<connect gate="G$4" pin="FMC_NBL2/PI4" pad="205"/> -<connect gate="G$4" pin="FMC_NBL3/PI5" pad="206"/> -<connect gate="G$4" pin="FMC_NL/PB7" pad="196"/> -<connect gate="G$4" pin="FMC_SDCKE1/PB5" pad="194"/> -<connect gate="G$4" pin="FMC_SDNCAS/PG15" pad="191"/> -<connect gate="G$4" pin="FMC_SDNE1/PB6" pad="195"/> -<connect gate="G$4" pin="JTDO/TRACESWO/PB3" pad="192"/> -<connect gate="G$4" pin="NJTRST/PB4" pad="193"/> -<connect gate="G$4" pin="PA14/JTCK-SWCLK" pad="159"/> -<connect gate="G$4" pin="PA15/JTDI" pad="160"/> -<connect gate="G$4" pin="PB8" pad="198"/> -<connect gate="G$4" pin="PB9" pad="199"/> -<connect gate="G$4" pin="PC10/SPI3_SCK/SDIO_D2" pad="161"/> -<connect gate="G$4" pin="PC11/SPI3_MISO/SDIO_D3" pad="162"/> -<connect gate="G$4" pin="PC12/SPI3_MOSI/SDIO_CK" pad="163"/> -<connect gate="G$4" pin="PD0/FMC_D2" pad="164"/> -<connect gate="G$4" pin="PD1/FMC_D3" pad="165"/> -<connect gate="G$4" pin="PD2/SDIO_CMD" pad="166"/> -<connect gate="G$4" pin="PD3/FMC_CLK" pad="167"/> -<connect gate="G$4" pin="PD4/FMC_NOE" pad="168"/> -<connect gate="G$4" pin="PD5/FMC_NWE" pad="169"/> -<connect gate="G$4" pin="PD6/FMC_NWAIT" pad="172"/> -<connect gate="G$4" pin="PD7/FMC_NE1/FMC_NCE2" pad="173"/> -<connect gate="G$4" pin="PDR_ON@203" pad="203"/> -<connect gate="G$4" pin="PG10/FMC_NCE4_1/FMC_NE3" pad="179"/> -<connect gate="G$4" pin="PG11/FMC_NCE4_2" pad="180"/> -<connect gate="G$4" pin="PG12/FMC_NE4" pad="181"/> -<connect gate="G$4" pin="PG13/FMC_A24" pad="182"/> -<connect gate="G$4" pin="PG14/FMC_A25" pad="183"/> -<connect gate="G$4" pin="PG9/FMC_NE2/FMC_NCE3" pad="178"/> -<connect gate="G$4" pin="PI3/FMC_D27" pad="157"/> -<connect gate="G$4" pin="PJ12" pad="174"/> -<connect gate="G$4" pin="PJ13" pad="175"/> -<connect gate="G$4" pin="PJ14" pad="176"/> -<connect gate="G$4" pin="PJ15" pad="177"/> -<connect gate="G$4" pin="PK3" pad="186"/> -<connect gate="G$4" pin="PK4" pad="187"/> -<connect gate="G$4" pin="PK5" pad="188"/> -<connect gate="G$4" pin="PK6" pad="189"/> -<connect gate="G$4" pin="PK7" pad="190"/> -<connect gate="G$4" pin="VDD@158" pad="158"/> -<connect gate="G$4" pin="VDD@171" pad="171"/> -<connect gate="G$4" pin="VDD@185" pad="185"/> -<connect gate="G$4" pin="VDD@204" pad="204"/> -<connect gate="G$4" pin="VSS@170" pad="170"/> -<connect gate="G$4" pin="VSS@184" pad="184"/> -<connect gate="G$4" pin="VSS@202" pad="202"/> -</connects> -<technologies> -<technology name=""> -<attribute name="OC_FARNELL" value="2469581" constant="no"/> -</technology> -</technologies> -</device> -</devices> -</deviceset> -</devicesets> -</library> <library name="adafruit"> <packages> <package name="USB-MINIB"> @@ -35123,6 +33502,1092 @@ Auto generated by <i>make-symbol-device-package-bsdl.ulp Rev. 44</i> <text x="-3.88" y="11.635" size="1.27" layer="25">>NAME</text> <text x="-5.88" y="-13.905" size="1.27" layer="27">>VALUE</text> </package> +<package name="LQFP-208"> +<smd name="1" x="-14.5796" y="12.7508" dx="0.3" dy="1.7" layer="1" rot="R270"/> +<smd name="2" x="-14.5796" y="12.2428" dx="0.3" dy="1.7" layer="1" rot="R270"/> +<smd name="3" x="-14.5796" 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length="short"/> +<pin name="FMC_A3/PF3" x="-33.02" y="45.72" length="short"/> +<pin name="FMC_A4/PF4" x="-33.02" y="43.18" length="short"/> +<pin name="FMC_A5/PF5" x="-33.02" y="40.64" length="short"/> +<pin name="FMC_A6/PF12" x="-33.02" y="38.1" length="short"/> +<pin name="FMC_A7/PF13" x="-33.02" y="35.56" length="short"/> +<pin name="FMC_A8/PF14" x="-33.02" y="33.02" length="short"/> +<pin name="FMC_A9/PF15" x="-33.02" y="30.48" length="short"/> +<pin name="FMC_A10/PG0" x="-33.02" y="27.94" length="short"/> +<pin name="FMC_A11/PG1" x="-33.02" y="25.4" length="short"/> +<pin name="FMC_A16/PD11" x="-33.02" y="12.7" length="short"/> +<pin name="FMC_A17/PD12" x="-33.02" y="10.16" length="short"/> +<pin name="FMC_A18/PD13" x="-33.02" y="7.62" length="short"/> +<pin name="FMC_A12/PG2" x="-33.02" y="22.86" length="short"/> +<pin name="FMC_A13/PG3" x="-33.02" y="20.32" length="short"/> +<pin name="FMC_A14/PG4" x="-33.02" y="17.78" length="short"/> +<pin name="FMC_A15/PG5" x="-33.02" y="15.24" length="short"/> +<pin name="FMC_A24/PG13" x="-33.02" y="-7.62" length="short"/> +<pin name="FMC_A25/PG14" x="-33.02" y="-10.16" length="short"/> +<pin name="FMC_CLK/PD3" x="-33.02" y="-40.64" length="short"/> +<pin name="FMC_NOE/PD4" x="-33.02" y="-43.18" length="short"/> +<pin name="FMC_NWE/PD5" x="-33.02" y="-45.72" length="short"/> +<pin name="FMC_NWAIT/PD6" x="-33.02" y="-48.26" length="short"/> +<pin name="FMC_NE1/PD7" x="-33.02" y="-50.8" length="short"/> +<pin name="PG15/FMC_SDNCAS" x="27.94" y="-55.88" length="short" rot="R180"/> +<pin name="PB5/FMC_SDCKE1" x="27.94" y="-50.8" length="short" rot="R180"/> +<pin name="PB6/FMC_SDNE1" x="27.94" y="-43.18" length="short" rot="R180"/> +<pin name="FMC_NL/PB7" x="-33.02" y="-33.02" length="short"/> +<pin name="FMC_NBL2/PI4" x="-33.02" y="-22.86" length="short"/> +<pin name="FMC_NBL3/PI5" x="-33.02" y="-25.4" length="short"/> +<pin name="FMC_NBL0/PE0" x="-33.02" y="-17.78" length="short"/> +<pin name="FMC_NBL1/PE1" x="-33.02" y="-20.32" length="short"/> +<pin name="PG8/FMC_SDCLK" x="27.94" y="-33.02" length="short" rot="R180"/> +<pin name="PF11/FMC_SDNRAS" x="27.94" y="-58.42" length="short" rot="R180"/> +<pin name="PC0/FMC_SDNWE" x="27.94" y="-35.56" length="short" rot="R180"/> +<pin name="PC2/FMC_SDNE0" x="27.94" y="-40.64" length="short" rot="R180"/> +<pin name="PC3/FMC_SDCKE0" x="27.94" y="-48.26" length="short" rot="R180"/> +</symbol> </symbols> <devicesets> <deviceset name="IS45S32160F" prefix="IC"> -<description><b></b> <font color="red">edit this description</font><p> -Auto generated by <i>make-symbol-device-package-bsdl.ulp Rev. 44</i><br> -Source:</description> +<description>16Mx32, 512Mb SDRAM +Clock frequency: 166, 143 MHz</description> <gates> <gate name="G$1" symbol="IS45S32160F-TSOP86L" x="0" y="0"/> </gates> @@ -35307,7 +35014,239 @@ Source:</description> <connect gate="G$1" pin="VSSQ@84" pad="84"/> </connects> <technologies> -<technology name=""/> +<technology name=""> +<attribute name="MPN" value="IS45S32160F" constant="no"/> +<attribute name="SUPPLIER" value="ISSI" constant="no"/> +</technology> +</technologies> +</device> +</devices> +</deviceset> +<deviceset name="STM32F429BIT6"> +<description>STM32F429 Cortex-M4 CPU +180 MHz, 256 KB RAM, 2 MB Flash</description> +<gates> +<gate name="IO" symbol="STM32F429_LQFP-208_IO" x="30.48" y="-10.16"/> +<gate name="CFG" symbol="STM32F429_LQFP-208_CFG" x="-78.74" y="-12.7"/> +<gate name="PWR" symbol="STM32F429_LQFP-208_PWR" x="-154.94" y="-12.7"/> +<gate name="FMC" symbol="STM32F429_LQFP-208_FMC" x="129.54" y="5.08"/> +</gates> +<devices> +<device name="" package="LQFP-208"> +<connects> +<connect gate="CFG" pin="BOOT0@197" pad="197"/> +<connect gate="CFG" pin="NRST" pad="34"/> +<connect gate="CFG" pin="OSC_IN/PH0" pad="32"/> +<connect gate="CFG" pin="OSC_OUT/PH1" pad="33"/> +<connect gate="CFG" pin="PA13/JTMS-SWDIO" pad="147"/> +<connect gate="CFG" pin="PA14/JTCK-SWCLK" pad="159"/> +<connect gate="CFG" pin="PA15/JTDI" pad="160"/> +<connect gate="CFG" pin="PB2/BOOT1" pad="63"/> +<connect gate="CFG" pin="PB3/JTDO/TRACESWO" pad="192"/> +<connect gate="CFG" pin="PB4/NJTRST" pad="193"/> +<connect gate="CFG" pin="PDR_ON@203" pad="203"/> +<connect gate="CFG" pin="VREF+@41" pad="41"/> +<connect gate="FMC" pin="FMC_A0/PF0" pad="16"/> +<connect gate="FMC" pin="FMC_A1/PF1" pad="17"/> +<connect gate="FMC" pin="FMC_A10/PG0" pad="77"/> +<connect gate="FMC" pin="FMC_A11/PG1" pad="78"/> +<connect gate="FMC" pin="FMC_A12/PG2" pad="129"/> +<connect gate="FMC" pin="FMC_A13/PG3" pad="130"/> +<connect gate="FMC" pin="FMC_A14/PG4" pad="131"/> +<connect gate="FMC" pin="FMC_A15/PG5" pad="132"/> +<connect gate="FMC" pin="FMC_A16/PD11" pad="111"/> +<connect gate="FMC" pin="FMC_A17/PD12" pad="112"/> +<connect gate="FMC" pin="FMC_A18/PD13" pad="113"/> +<connect gate="FMC" pin="FMC_A19/PE3" pad="2"/> +<connect gate="FMC" pin="FMC_A2/PF2" pad="18"/> +<connect gate="FMC" pin="FMC_A20/PE4" pad="3"/> +<connect gate="FMC" pin="FMC_A21/PE5" pad="4"/> +<connect gate="FMC" pin="FMC_A22/PE6" pad="5"/> +<connect gate="FMC" pin="FMC_A23/PE2" pad="1"/> +<connect gate="FMC" pin="FMC_A24/PG13" pad="182"/> +<connect gate="FMC" pin="FMC_A25/PG14" pad="183"/> +<connect gate="FMC" pin="FMC_A3/PF3" pad="22"/> +<connect gate="FMC" pin="FMC_A4/PF4" pad="23"/> +<connect gate="FMC" pin="FMC_A5/PF5" pad="24"/> +<connect gate="FMC" pin="FMC_A6/PF12" pad="71"/> +<connect gate="FMC" pin="FMC_A7/PF13" pad="74"/> +<connect gate="FMC" pin="FMC_A8/PF14" pad="75"/> +<connect gate="FMC" pin="FMC_A9/PF15" pad="76"/> +<connect gate="FMC" pin="FMC_CLK/PD3" pad="167"/> +<connect gate="FMC" pin="FMC_NBL0/PE0" pad="200"/> +<connect gate="FMC" pin="FMC_NBL1/PE1" pad="201"/> +<connect gate="FMC" pin="FMC_NBL2/PI4" pad="205"/> +<connect gate="FMC" pin="FMC_NBL3/PI5" pad="206"/> +<connect gate="FMC" pin="FMC_NE1/PD7" pad="173"/> +<connect gate="FMC" pin="FMC_NL/PB7" pad="196"/> +<connect gate="FMC" pin="FMC_NOE/PD4" pad="168"/> +<connect gate="FMC" pin="FMC_NWAIT/PD6" pad="172"/> +<connect gate="FMC" pin="FMC_NWE/PD5" pad="169"/> +<connect gate="FMC" pin="PB5/FMC_SDCKE1" pad="194"/> +<connect gate="FMC" pin="PB6/FMC_SDNE1" pad="195"/> +<connect gate="FMC" pin="PC0/FMC_SDNWE" pad="35"/> +<connect gate="FMC" pin="PC2/FMC_SDNE0" pad="37"/> +<connect gate="FMC" pin="PC3/FMC_SDCKE0" pad="38"/> +<connect gate="FMC" pin="PD0/FMC_D2" pad="164"/> +<connect gate="FMC" pin="PD1/FMC_D3" pad="165"/> +<connect gate="FMC" pin="PD10/FMC_D15" pad="110"/> +<connect gate="FMC" pin="PD14/FMC_D0" pad="116"/> +<connect gate="FMC" pin="PD15/FMC_D1" pad="117"/> +<connect gate="FMC" pin="PD8/FMC_D13" pad="108"/> +<connect gate="FMC" pin="PD9/FMC_D14" pad="109"/> +<connect gate="FMC" pin="PE10/FMC_D7" pad="84"/> +<connect gate="FMC" pin="PE11/FMC_D8" pad="85"/> +<connect gate="FMC" pin="PE12/FMC_D9" pad="86"/> +<connect gate="FMC" pin="PE13/FMC_D10" pad="87"/> +<connect gate="FMC" pin="PE14/FMC_D11" pad="88"/> +<connect gate="FMC" pin="PE15/FMC_D12" pad="89"/> +<connect gate="FMC" pin="PE7/FMC_D4" pad="79"/> +<connect gate="FMC" pin="PE8/FMC_D5" pad="80"/> +<connect gate="FMC" pin="PE9/FMC_D6" pad="81"/> +<connect gate="FMC" pin="PF11/FMC_SDNRAS" pad="70"/> +<connect gate="FMC" pin="PG15/FMC_SDNCAS" pad="191"/> +<connect gate="FMC" pin="PG8/FMC_SDCLK" pad="135"/> +<connect gate="FMC" pin="PH10/FMC_D18" pad="100"/> +<connect gate="FMC" pin="PH11/FMC_D19" pad="101"/> +<connect gate="FMC" pin="PH12/FMC_D20" pad="102"/> +<connect gate="FMC" pin="PH13/FMC_D21" pad="151"/> +<connect gate="FMC" pin="PH14/FMC_D22" pad="152"/> +<connect gate="FMC" pin="PH15/FMC_D23" pad="153"/> +<connect gate="FMC" pin="PH8/FMC_D16" pad="98"/> +<connect gate="FMC" pin="PH9/FMC_D17" pad="99"/> +<connect gate="FMC" pin="PI0/FMC_D24" pad="154"/> +<connect gate="FMC" pin="PI1/FMC_D25" pad="155"/> +<connect gate="FMC" pin="PI10/FMC_D31" pad="12"/> +<connect gate="FMC" pin="PI2/FMC_D26" pad="156"/> +<connect gate="FMC" pin="PI3/FMC_D27" pad="157"/> +<connect gate="FMC" pin="PI6/FMC_D28" pad="207"/> +<connect gate="FMC" pin="PI7/FMC_D29" pad="208"/> +<connect gate="FMC" pin="PI9/FMC_D30" pad="11"/> +<connect gate="IO" pin="FMC_CD/PF9" pad="30"/> +<connect gate="IO" pin="FMC_INT2/PG6" pad="133"/> +<connect gate="IO" pin="FMC_INT3/PG7" pad="134"/> +<connect gate="IO" pin="FMC_INTR/PF10" pad="31"/> +<connect gate="IO" pin="FMC_NCE4_1/FMC_NE3/PG10" pad="179"/> +<connect gate="IO" pin="FMC_NCE4_2/PG11" pad="180"/> +<connect gate="IO" pin="FMC_NE2/FMC_NCE3/PG9" pad="178"/> +<connect gate="IO" pin="FMC_NE4/PG12" pad="181"/> +<connect gate="IO" pin="FMC_NIORD/PF6" pad="27"/> +<connect gate="IO" pin="FMC_NIOWR/PF8" pad="29"/> +<connect gate="IO" pin="FMC_NREG/PF7" pad="28"/> +<connect gate="IO" pin="FMC_SDCKE0/PH2" pad="46"/> +<connect gate="IO" pin="FMC_SDCKE1/PH7" pad="97"/> +<connect gate="IO" pin="FMC_SDNE1/PH6" pad="96"/> +<connect gate="IO" pin="I2C2_SCL/PH4" pad="48"/> +<connect gate="IO" pin="I2C2_SDA/FMC_SDNWE/PH5" pad="49"/> +<connect gate="IO" pin="PA4" pad="53"/> +<connect gate="IO" pin="PA8" pad="142"/> +<connect gate="IO" pin="PB0" pad="61"/> +<connect gate="IO" pin="PB1" pad="62"/> +<connect gate="IO" pin="PB10" pad="90"/> +<connect gate="IO" pin="PB11" pad="91"/> +<connect gate="IO" pin="PB12" pad="104"/> +<connect gate="IO" pin="PB8" pad="198"/> +<connect gate="IO" pin="PB9" pad="199"/> +<connect gate="IO" pin="PC1" pad="36"/> +<connect gate="IO" pin="PC13" pad="8"/> +<connect gate="IO" pin="PC14/OSC32_IN" pad="9"/> +<connect gate="IO" pin="PC15/OSC32_OUT" pad="10"/> +<connect gate="IO" pin="PC4" pad="57"/> +<connect gate="IO" pin="PC5" pad="58"/> +<connect gate="IO" pin="PC6" pad="138"/> +<connect gate="IO" pin="PC7" pad="139"/> +<connect gate="IO" pin="PH3/FMC_SDNE0" pad="47"/> +<connect gate="IO" pin="PI11" pad="13"/> +<connect gate="IO" pin="PI12" pad="19"/> +<connect gate="IO" pin="PI13" pad="20"/> +<connect gate="IO" pin="PI14" pad="21"/> +<connect gate="IO" pin="PI15" pad="64"/> +<connect gate="IO" pin="PI8" pad="7"/> +<connect gate="IO" pin="PJ0" pad="65"/> +<connect gate="IO" pin="PJ1" pad="66"/> +<connect gate="IO" pin="PJ10" pad="122"/> +<connect gate="IO" pin="PJ11" pad="123"/> +<connect gate="IO" pin="PJ12" pad="174"/> +<connect gate="IO" pin="PJ13" pad="175"/> +<connect gate="IO" pin="PJ14" pad="176"/> +<connect gate="IO" pin="PJ15" pad="177"/> +<connect gate="IO" pin="PJ2" pad="67"/> +<connect gate="IO" pin="PJ3" pad="68"/> +<connect gate="IO" pin="PJ4" pad="69"/> +<connect gate="IO" pin="PJ5" pad="95"/> +<connect gate="IO" pin="PJ6" pad="118"/> +<connect gate="IO" pin="PJ7" pad="119"/> +<connect gate="IO" pin="PJ8" pad="120"/> +<connect gate="IO" pin="PJ9" pad="121"/> +<connect gate="IO" pin="PK0" pad="126"/> +<connect gate="IO" pin="PK1" pad="127"/> +<connect gate="IO" pin="PK2" pad="128"/> +<connect gate="IO" pin="PK3" pad="186"/> +<connect gate="IO" pin="PK4" pad="187"/> +<connect gate="IO" pin="PK5" pad="188"/> +<connect gate="IO" pin="PK6" pad="189"/> +<connect gate="IO" pin="PK7" pad="190"/> +<connect gate="IO" pin="SDIO_CK/SPI3_MOSI/PC12" pad="163"/> +<connect gate="IO" pin="SDIO_CMD/PD2" pad="166"/> +<connect gate="IO" pin="SDIO_D0/PC8" pad="140"/> +<connect gate="IO" pin="SDIO_D1/PC9" pad="141"/> +<connect gate="IO" pin="SDIO_D2/SPI3_SCK/PC10" pad="161"/> +<connect gate="IO" pin="SDIO_D3/SPI3_MISO/PC11" pad="162"/> +<connect gate="IO" pin="SPI1_MISO/PA6" pad="55"/> +<connect gate="IO" pin="SPI1_MOSI/PA7" pad="56"/> +<connect gate="IO" pin="SPI1_SCK/PA5" pad="54"/> +<connect gate="IO" pin="SPI2_MISO/PB14" pad="106"/> +<connect gate="IO" pin="SPI2_MOSI/PB15" pad="107"/> +<connect gate="IO" pin="SPI2_SCK/PB13" pad="105"/> +<connect gate="IO" pin="USART1_CTS/PA11" pad="145"/> +<connect gate="IO" pin="USART1_RTS/PA12" pad="146"/> +<connect gate="IO" pin="USART1_RX/PA10" pad="144"/> +<connect gate="IO" pin="USART1_TX/PA9" pad="143"/> +<connect gate="IO" pin="USART2_CTS/WKUP/PA0" pad="43"/> +<connect gate="IO" pin="USART2_RTS/PA1" pad="44"/> +<connect gate="IO" pin="USART2_RX/PA3" pad="50"/> +<connect gate="IO" pin="USART2_TX/PA2" pad="45"/> +<connect gate="PWR" pin="VBAT@6" pad="6"/> +<connect gate="PWR" pin="VCAP1@92" pad="92"/> +<connect gate="PWR" pin="VCAP2@148" pad="148"/> +<connect gate="PWR" pin="VDD@103" pad="103"/> +<connect gate="PWR" pin="VDD@115" pad="115"/> +<connect gate="PWR" pin="VDD@124" pad="124"/> +<connect gate="PWR" pin="VDD@137" pad="137"/> +<connect gate="PWR" pin="VDD@15" pad="15"/> +<connect gate="PWR" pin="VDD@150" pad="150"/> +<connect gate="PWR" pin="VDD@158" pad="158"/> +<connect gate="PWR" pin="VDD@171" pad="171"/> +<connect gate="PWR" pin="VDD@185" pad="185"/> +<connect gate="PWR" pin="VDD@204" pad="204"/> +<connect gate="PWR" pin="VDD@26" pad="26"/> +<connect gate="PWR" pin="VDD@39" pad="39"/> +<connect gate="PWR" pin="VDD@52" pad="52"/> +<connect gate="PWR" pin="VDD@59" pad="59"/> +<connect gate="PWR" pin="VDD@73" pad="73"/> +<connect gate="PWR" pin="VDD@83" pad="83"/> +<connect gate="PWR" pin="VDD@94" pad="94"/> +<connect gate="PWR" pin="VDDA@42" pad="42"/> +<connect gate="PWR" pin="VSS@114" pad="114"/> +<connect gate="PWR" pin="VSS@125" pad="125"/> +<connect gate="PWR" pin="VSS@136" pad="136"/> +<connect gate="PWR" pin="VSS@14" pad="14"/> +<connect gate="PWR" pin="VSS@149" pad="149"/> +<connect gate="PWR" pin="VSS@170" pad="170"/> +<connect gate="PWR" pin="VSS@184" pad="184"/> +<connect gate="PWR" pin="VSS@202" pad="202"/> +<connect gate="PWR" pin="VSS@25" pad="25"/> +<connect gate="PWR" pin="VSS@51" pad="51"/> +<connect gate="PWR" pin="VSS@60" pad="60"/> +<connect gate="PWR" pin="VSS@72" pad="72"/> +<connect gate="PWR" pin="VSS@82" pad="82"/> +<connect gate="PWR" pin="VSS@93" pad="93"/> +<connect gate="PWR" pin="VSSA@40" pad="40"/> +</connects> +<technologies> +<technology name=""> +<attribute name="OC_FARNELL" value="2469581" constant="no"/> +</technology> </technologies> </device> </devices> @@ -35370,7 +35309,7 @@ Source:</description> <part name="FID4" library="UsedComponents" deviceset="FIDUCIAL" device="1X2"/> <part name="FID5" library="UsedComponents" deviceset="FIDUCIAL" device="1X2"/> <part name="FID6" library="UsedComponents" deviceset="FIDUCIAL" device="1X2"/> -<part name="U$1" library="STM32F429" deviceset="STM32F429BIT6" device=""/> +<part name="U$1" library="Alpha-IC" deviceset="STM32F429BIT6" device=""/> <part name="C14" library="rcl" deviceset="C-EU" device="C0402" value="5 pF"> <attribute name="DIELECTRIC" value="C0G"/> </part> @@ -35380,14 +35319,6 @@ Source:</description> <part name="SUPPLY18" library="supply2" deviceset="GND" device=""/> <part name="SUPPLY19" library="supply2" deviceset="GND" device=""/> <part name="U$2" library="STM32-SWD-connector" deviceset="STM32-SWD" device=""/> -<part name="SUPPLY20" library="supply2" deviceset="GND" device=""/> -<part name="SUPPLY21" library="supply2" deviceset="GND" device=""/> -<part name="SUPPLY22" library="supply2" deviceset="GND" device=""/> -<part name="SUPPLY24" library="supply2" deviceset="GND" device=""/> -<part name="P+5" library="SUPPLY1" deviceset="VCC" device=""/> -<part name="P+6" library="SUPPLY1" deviceset="VCC" device=""/> -<part name="P+8" library="SUPPLY1" deviceset="VCC" device=""/> -<part name="P+9" library="SUPPLY1" deviceset="VCC" device=""/> <part name="C16" library="resistor" deviceset="C-EU" device="C0805" value="10 uF"> <attribute name="DIELECTRIC" value="X7R"/> <attribute name="RATED_VOLTAGE" value="10V"/> @@ -35476,23 +35407,20 @@ Source:</description> <attribute name="DIELECTRIC" value="X7R"/> <attribute name="RATED_VOLTAGE" value="10V"/> </part> -<part name="P+12" library="SUPPLY1" deviceset="VCC" device=""/> <part name="C30" library="resistor" deviceset="C-EU" device="C0603" value="1 uF"> <attribute name="DIELECTRIC" value="X7R"/> <attribute name="RATED_VOLTAGE" value="10V"/> </part> <part name="SUPPLY27" library="supply2" deviceset="GND" device=""/> -<part name="P+13" library="SUPPLY1" deviceset="VCC" device=""/> -<part name="C38" library="resistor" deviceset="C-EU" device="C0603" value="2.2 uF LowESR"> +<part name="C38" library="resistor" deviceset="C-EU" device="C0603" value="2.2 uF"> <attribute name="DIELECTRIC" value="X7R"/> <attribute name="RATED_VOLTAGE" value="10V"/> </part> <part name="P+14" library="SUPPLY1" deviceset="VCC" device=""/> -<part name="C39" library="resistor" deviceset="C-EU" device="C0603" value="2.2 uF LowESR"> +<part name="C39" library="resistor" deviceset="C-EU" device="C0603" value="2.2 uF"> <attribute name="DIELECTRIC" value="X7R"/> <attribute name="RATED_VOLTAGE" value="10V"/> </part> -<part name="P+15" library="SUPPLY1" deviceset="VCC" device=""/> <part name="SUPPLY28" library="supply2" deviceset="GND" device=""/> <part name="R10" library="resistor" deviceset="R-EU_" device="R0402" value="10K"/> <part name="U$3" library="FT232H" deviceset="FT232H_SERIAL" device=""/> @@ -35603,17 +35531,16 @@ Source:</description> <part name="FID11" library="UsedComponents" deviceset="FIDUCIAL" device="1X2"/> <part name="FID12" library="UsedComponents" deviceset="FIDUCIAL" device="1X2"/> <part name="SUPPLY43" library="supply2" deviceset="GND" device=""/> -<part name="FRAME3" library="frames" deviceset="FRAME_C_L" device=""/> <part name="P+17" library="SUPPLY1" deviceset="VCC" device=""/> <part name="U3" library="ATMEL-ATTINY828R-AU" deviceset="ATTINY828R-AU" device=""/> <part name="FRAME4" library="frames" deviceset="A3L-LOC" device=""/> <part name="P+19" library="SUPPLY1" deviceset="VCC" device=""/> <part name="SUPPLY44" library="supply2" deviceset="GND" device=""/> -<part name="C56" library="resistor" deviceset="C-EU" device="C0603" value="2.2 uF LowESR"> +<part name="C56" library="resistor" deviceset="C-EU" device="C0603" value="2.2 uF"> <attribute name="DIELECTRIC" value="X7R"/> <attribute name="RATED_VOLTAGE" value="10V"/> </part> -<part name="C57" library="resistor" deviceset="C-EU" device="C0603" value="2.2 uF LowESR"> +<part name="C57" library="resistor" deviceset="C-EU" device="C0603" value="2.2 uF"> <attribute name="DIELECTRIC" value="X7R"/> <attribute name="RATED_VOLTAGE" value="10V"/> </part> @@ -36894,6 +36821,11 @@ Source:</description> <attribute name="RATED_VOLTAGE" value="25V"/> </part> <part name="SUPPLY224" library="supply2" deviceset="GND" device=""/> +<part name="P+65" library="SUPPLY1" deviceset="VCC" device=""/> +<part name="SUPPLY225" library="supply2" deviceset="GND" device=""/> +<part name="FRAME25" library="frames" deviceset="A3L-LOC" device=""/> +<part name="FRAME3" library="frames" deviceset="A3L-LOC" device=""/> +<part name="FRAME26" library="frames" deviceset="A3L-LOC" device=""/> </parts> <sheets> <sheet> @@ -36928,17 +36860,17 @@ Source:</description> <sheet> <description>Input power</description> <plain> -<text x="20.32" y="59.69" size="2.54" layer="91">15V LDO powered from external 18V +<text x="22.86" y="77.47" size="2.54" layer="91">15V LDO powered from external 18V and supplying stable 15V to noise source</text> -<text x="-172.72" y="63.5" size="3.81" layer="91">Main power input +<text x="-170.18" y="81.28" size="3.81" layer="91">Main power input 18V DC</text> -<text x="-107.95" y="38.1" size="1.778" layer="91">To mitigate component ageing in the avalanche noise circuit, +<text x="-105.41" y="55.88" size="1.778" layer="91">To mitigate component ageing in the avalanche noise circuit, this jumper can be used to decide if FPGA/ARM/None should be allowed to turn off the entropy source (default On through pull-up)</text> -<text x="88.9" y="17.78" size="1.778" layer="91">Max 3 ohm ESR</text> -<text x="-55.88" y="-40.64" size="2.54" layer="91">*) Intermediate Regulator: 18V -> 5V</text> -<text x="27.94" y="-121.92" size="1.778" layer="91">*) VCC_5V0 = 0.8V x (1 + 6.3/1.21) = 4.965V +<text x="91.44" y="35.56" size="1.778" layer="91">Max 3 ohm ESR</text> +<text x="-53.34" y="-22.86" size="2.54" layer="91">*) Intermediate Regulator: 18V -> 5V</text> +<text x="30.48" y="-104.14" size="1.778" layer="91">*) VCC_5V0 = 0.8V x (1 + 6.3/1.21) = 4.965V *) Current sharing not used @@ -36946,152 +36878,152 @@ be allowed to turn off the entropy source </plain> <instances> <instance part="FRAME6" gate="G$1" x="-198.12" y="-142.24"/> -<instance part="JP1" gate="G$1" x="-162.56" y="38.1"/> -<instance part="SUPPLY1" gate="GND" x="-142.24" y="33.02" rot="MR0"/> -<instance part="U$9" gate="G$1" x="55.88" y="33.02"/> -<instance part="SUPPLY7" gate="GND" x="38.1" y="12.7" rot="MR0"/> -<instance part="C1" gate="G$1" x="73.66" y="35.56" smashed="yes" rot="R180"> -<attribute name="NAME" x="76.2" y="35.56" size="1.6764" layer="95"/> -<attribute name="VALUE" x="76.2" y="33.02" size="1.6764" layer="96"/> -<attribute name="DIELECTRIC" x="76.2" y="30.48" size="1.27" layer="96"/> -<attribute name="RATED_VOLTAGE" x="73.66" y="35.56" size="1.778" layer="96" rot="R180" display="off"/> -</instance> -<instance part="C4" gate="G$1" x="73.66" y="20.32" smashed="yes" rot="R180"> -<attribute name="NAME" x="76.2" y="20.32" size="1.6764" layer="95"/> -<attribute name="VALUE" x="76.2" y="17.78" size="1.6764" layer="96"/> -<attribute name="DIELECTRIC" x="76.2" y="15.24" size="1.27" layer="96"/> -<attribute name="RATED_VOLTAGE" x="73.66" y="20.32" size="1.778" layer="96" rot="R180" display="off"/> -</instance> -<instance part="SUPPLY9" gate="GND" x="73.66" y="12.7" rot="MR0"/> -<instance part="C5" gate="G$1" x="86.36" y="27.94" smashed="yes"> -<attribute name="NAME" x="88.9" y="25.4" size="1.6764" layer="95" font="vector"/> -<attribute name="VALUE" x="88.9" y="22.86" size="1.6764" layer="96" font="vector"/> -<attribute name="DIELECTRIC" x="86.36" y="27.94" size="1.778" layer="96" display="off"/> -<attribute name="RATED_VOLTAGE" x="86.36" y="27.94" size="1.778" layer="96" display="off"/> -</instance> -<instance part="SUPPLY12" gate="GND" x="86.36" y="12.7" rot="MR0"/> -<instance part="R22" gate="G$1" x="-10.16" y="40.64" rot="R270"/> -<instance part="PWR_18V" gate="VCC" x="-142.24" y="55.88" smashed="yes"> -<attribute name="VALUE" x="-139.7" y="55.88" size="1.778" layer="96"/> -</instance> -<instance part="PWR_18V1" gate="VCC" x="25.4" y="50.8" smashed="yes"> -<attribute name="VALUE" x="27.94" y="50.8" size="1.778" layer="96"/> -</instance> -<instance part="PWR_18V2" gate="VCC" x="93.98" y="50.8" smashed="yes"> -<attribute name="VALUE" x="96.52" y="50.8" size="1.778" layer="96"/> -</instance> -<instance part="U$8" gate="G$1" x="-12.7" y="-76.2"/> -<instance part="SUPPLY197" gate="GND" x="-15.24" y="-116.84"/> -<instance part="SUPPLY198" gate="GND" x="-10.16" y="-116.84"/> -<instance part="C103" gate="G$1" x="-45.72" y="-104.14"> -<attribute name="DIELECTRIC" x="-45.72" y="-104.14" size="1.778" layer="96" display="off"/> -<attribute name="RATED_VOLTAGE" x="-45.72" y="-104.14" size="1.778" layer="96" display="off"/> -<attribute name="TOLERANCE" x="-45.72" y="-104.14" size="1.778" layer="96" display="off"/> -</instance> -<instance part="SUPPLY200" gate="GND" x="-45.72" y="-116.84"/> -<instance part="SUPPLY201" gate="GND" x="-55.88" y="-116.84"/> -<instance part="R62" gate="G$1" x="-55.88" y="-73.66"> -<attribute name="TOLERANCE" x="-55.88" y="-73.66" size="1.778" layer="96" display="off"/> -</instance> -<instance part="R63" gate="G$1" x="-68.58" y="-81.28" smashed="yes" rot="R90"> -<attribute name="TOLERANCE" x="-64.77" y="-80.01" size="1.778" layer="96" rot="R90"/> -<attribute name="NAME" x="-70.0786" y="-85.09" size="1.778" layer="95" rot="R90"/> -<attribute name="VALUE" x="-64.77" y="-88.9" size="1.778" layer="96" rot="R90"/> -</instance> -<instance part="R64" gate="G$1" x="-68.58" y="-66.04" smashed="yes" rot="R90"> -<attribute name="TOLERANCE" x="-64.77" y="-63.5" size="1.778" layer="96" rot="R90"/> -<attribute name="NAME" x="-70.0786" y="-69.85" size="1.778" layer="95" rot="R90"/> -<attribute name="VALUE" x="-64.77" y="-69.85" size="1.778" layer="96" rot="R90"/> -</instance> -<instance part="C104" gate="G$1" x="-119.38" y="-73.66"> -<attribute name="DIELECTRIC" x="-119.38" y="-73.66" size="1.778" layer="96" display="off"/> -<attribute name="RATED_VOLTAGE" x="-119.38" y="-73.66" size="1.778" layer="96" display="off"/> -<attribute name="TOLERANCE" x="-119.38" y="-73.66" size="1.778" layer="96" display="off"/> -</instance> -<instance part="SUPPLY202" gate="GND" x="-68.58" y="-91.44"/> -<instance part="SUPPLY203" gate="GND" x="-83.82" y="-91.44"/> -<instance part="SUPPLY204" gate="GND" x="-99.06" y="-91.44"/> -<instance part="SUPPLY205" gate="GND" x="-109.22" y="-91.44"/> -<instance part="SUPPLY206" gate="GND" x="-119.38" y="-91.44"/> -<instance part="R65" gate="G$1" x="22.86" y="-68.58" smashed="yes" rot="R90"> -<attribute name="TOLERANCE" x="26.67" y="-64.77" size="1.778" layer="96" rot="R90"/> -<attribute name="NAME" x="21.3614" y="-72.39" size="1.778" layer="95" rot="R90"/> -<attribute name="VALUE" x="26.67" y="-72.39" size="1.778" layer="96" rot="R90"/> -</instance> -<instance part="R66" gate="G$1" x="22.86" y="-86.36" smashed="yes" rot="R90"> -<attribute name="TOLERANCE" x="26.67" y="-82.55" size="1.778" layer="96" rot="R90"/> -<attribute name="NAME" x="21.3614" y="-90.17" size="1.778" layer="95" rot="R90"/> -<attribute name="VALUE" x="26.67" y="-91.44" size="1.778" layer="96" rot="R90"/> -</instance> -<instance part="SUPPLY207" gate="GND" x="22.86" y="-96.52"/> -<instance part="C111" gate="G$1" x="63.5" y="-68.58" smashed="yes" rot="R90"> -<attribute name="TOLERANCE" x="63.5" y="-68.58" size="1.778" layer="96" rot="R90" display="off"/> -<attribute name="RATED_VOLTAGE" x="63.5" y="-68.58" size="1.778" layer="96" rot="R90" display="off"/> -<attribute name="NAME" x="66.675" y="-67.945" size="1.778" layer="95"/> -<attribute name="VALUE" x="66.04" y="-72.39" size="1.778" layer="96"/> -</instance> -<instance part="C114" gate="G$1" x="33.02" y="-66.04"> -<attribute name="RATED_VOLTAGE" x="33.02" y="-66.04" size="1.778" layer="96" display="off"/> -<attribute name="TOLERANCE" x="33.02" y="-66.04" size="1.778" layer="96" display="off"/> -<attribute name="DIELECTRIC" x="33.02" y="-66.04" size="1.778" layer="96" display="off"/> -</instance> -<instance part="C112" gate="G$1" x="78.74" y="-68.58" smashed="yes" rot="R90"> -<attribute name="TOLERANCE" x="78.74" y="-68.58" size="1.778" layer="96" rot="R90" display="off"/> -<attribute name="RATED_VOLTAGE" x="78.74" y="-68.58" size="1.778" layer="96" rot="R90" display="off"/> -<attribute name="NAME" x="81.915" y="-67.945" size="1.778" layer="95"/> -<attribute name="VALUE" x="81.28" y="-72.39" size="1.778" layer="96"/> -</instance> -<instance part="SUPPLY208" gate="GND" x="33.02" y="-78.74"/> -<instance part="SUPPLY209" gate="GND" x="48.26" y="-78.74"/> -<instance part="SUPPLY210" gate="GND" x="63.5" y="-78.74"/> -<instance part="SUPPLY211" gate="GND" x="78.74" y="-78.74"/> -<instance part="C86" gate="G$1" x="-83.82" y="-73.66"> -<attribute name="RATED_VOLTAGE" x="-83.82" y="-73.66" size="1.778" layer="96" display="off"/> -<attribute name="TOLERANCE" x="-83.82" y="-73.66" size="1.778" layer="96" display="off"/> -<attribute name="DIELECTRIC" x="-83.82" y="-73.66" size="1.778" layer="96" display="off"/> -</instance> -<instance part="R68" gate="G$1" x="-55.88" y="-101.6" rot="R90"/> -<instance part="C140" gate="G$1" x="-109.22" y="-73.66"> -<attribute name="DIELECTRIC" x="-109.22" y="-73.66" size="1.778" layer="96" display="off"/> -<attribute name="RATED_VOLTAGE" x="-109.22" y="-73.66" size="1.778" layer="96" display="off"/> -<attribute name="TOLERANCE" x="-109.22" y="-73.66" size="1.778" layer="96" display="off"/> -</instance> -<instance part="C141" gate="G$1" x="-99.06" y="-73.66"> -<attribute name="DIELECTRIC" x="-99.06" y="-73.66" size="1.778" layer="96" display="off"/> -<attribute name="RATED_VOLTAGE" x="-99.06" y="-73.66" size="1.778" layer="96" display="off"/> -<attribute name="TOLERANCE" x="-99.06" y="-73.66" size="1.778" layer="96" display="off"/> -</instance> -<instance part="C178" gate="G$1" x="48.26" y="-66.04"> -<attribute name="DIELECTRIC" x="48.26" y="-66.04" size="1.778" layer="96" display="off"/> -<attribute name="RATED_VOLTAGE" x="48.26" y="-66.04" size="1.778" layer="96" display="off"/> -<attribute name="TOLERANCE" x="48.26" y="-66.04" size="1.778" layer="96" display="off"/> -</instance> -<instance part="PWR_18V3" gate="VCC" x="-124.46" y="-48.26" smashed="yes"> -<attribute name="VALUE" x="-121.92" y="-48.26" size="1.778" layer="96"/> -</instance> -<instance part="PWR_18V4" gate="VCC" x="-10.16" y="50.8" smashed="yes"> -<attribute name="VALUE" x="-7.62" y="50.8" size="1.778" layer="96"/> -</instance> -<instance part="PWR_18V5" gate="VCC" x="83.82" y="-48.26" smashed="yes"> -<attribute name="VALUE" x="86.36" y="-48.26" size="1.778" layer="96"/> -</instance> -<instance part="Q1" gate="G$1" x="-45.72" y="24.13"/> -<instance part="R75" gate="G$1" x="-55.88" y="11.43" rot="R270"> -<attribute name="TOLERANCE" x="-55.88" y="11.43" size="1.778" layer="96" rot="R270" display="off"/> -</instance> -<instance part="R76" gate="G$1" x="-66.04" y="21.59"> -<attribute name="TOLERANCE" x="-66.04" y="21.59" size="1.778" layer="96" display="off"/> -</instance> -<instance part="SUPPLY222" gate="GND" x="-55.88" y="-1.27" rot="MR0"/> -<instance part="SUPPLY223" gate="GND" x="-35.56" y="-1.27" rot="MR0"/> -<instance part="JP2" gate="A" x="-24.13" y="33.02" rot="R90"/> -<instance part="C213" gate="G$1" x="25.4" y="22.86" smashed="yes"> -<attribute name="NAME" x="21.59" y="22.86" size="1.6764" layer="95" font="vector" rot="R180"/> -<attribute name="VALUE" x="21.59" y="20.32" size="1.6764" layer="96" font="vector" rot="R180"/> -<attribute name="DIELECTRIC" x="25.4" y="22.86" size="1.778" layer="96" display="off"/> -<attribute name="RATED_VOLTAGE" x="25.4" y="22.86" size="1.778" layer="96" display="off"/> -</instance> -<instance part="SUPPLY224" gate="GND" x="25.4" y="12.7" rot="MR0"/> +<instance part="JP1" gate="G$1" x="-160.02" y="55.88"/> +<instance part="SUPPLY1" gate="GND" x="-139.7" y="50.8" rot="MR0"/> +<instance part="U$9" gate="G$1" x="58.42" y="50.8"/> +<instance part="SUPPLY7" gate="GND" x="40.64" y="30.48" rot="MR0"/> +<instance part="C1" gate="G$1" x="76.2" y="53.34" smashed="yes" rot="R180"> +<attribute name="NAME" x="78.74" y="53.34" size="1.6764" layer="95"/> +<attribute name="VALUE" x="78.74" y="50.8" size="1.6764" layer="96"/> +<attribute name="DIELECTRIC" x="78.74" y="48.26" size="1.27" layer="96"/> +<attribute name="RATED_VOLTAGE" x="76.2" y="53.34" size="1.778" layer="96" rot="R180" display="off"/> +</instance> +<instance part="C4" gate="G$1" x="76.2" y="38.1" smashed="yes" rot="R180"> +<attribute name="NAME" x="78.74" y="38.1" size="1.6764" layer="95"/> +<attribute name="VALUE" x="78.74" y="35.56" size="1.6764" layer="96"/> +<attribute name="DIELECTRIC" x="78.74" y="33.02" size="1.27" layer="96"/> +<attribute name="RATED_VOLTAGE" x="76.2" y="38.1" size="1.778" layer="96" rot="R180" display="off"/> +</instance> +<instance part="SUPPLY9" gate="GND" x="76.2" y="30.48" rot="MR0"/> +<instance part="C5" gate="G$1" x="88.9" y="45.72" smashed="yes"> +<attribute name="NAME" x="91.44" y="43.18" size="1.6764" layer="95" font="vector"/> +<attribute name="VALUE" x="91.44" y="40.64" size="1.6764" layer="96" font="vector"/> +<attribute name="DIELECTRIC" x="88.9" y="45.72" size="1.778" layer="96" display="off"/> +<attribute name="RATED_VOLTAGE" x="88.9" y="45.72" size="1.778" layer="96" display="off"/> +</instance> +<instance part="SUPPLY12" gate="GND" x="88.9" y="30.48" rot="MR0"/> +<instance part="R22" gate="G$1" x="-7.62" y="58.42" rot="R270"/> +<instance part="PWR_18V" gate="VCC" x="-139.7" y="73.66" smashed="yes"> +<attribute name="VALUE" x="-137.16" y="73.66" size="1.778" layer="96"/> +</instance> +<instance part="PWR_18V1" gate="VCC" x="27.94" y="68.58" smashed="yes"> +<attribute name="VALUE" x="30.48" y="68.58" size="1.778" layer="96"/> +</instance> +<instance part="PWR_18V2" gate="VCC" x="96.52" y="68.58" smashed="yes"> +<attribute name="VALUE" x="99.06" y="68.58" size="1.778" layer="96"/> +</instance> +<instance part="U$8" gate="G$1" x="-10.16" y="-58.42"/> +<instance part="SUPPLY197" gate="GND" x="-12.7" y="-99.06"/> +<instance part="SUPPLY198" gate="GND" x="-7.62" y="-99.06"/> +<instance part="C103" gate="G$1" x="-43.18" y="-86.36"> +<attribute name="DIELECTRIC" x="-43.18" y="-86.36" size="1.778" layer="96" display="off"/> +<attribute name="RATED_VOLTAGE" x="-43.18" y="-86.36" size="1.778" layer="96" display="off"/> +<attribute name="TOLERANCE" x="-43.18" y="-86.36" size="1.778" layer="96" display="off"/> +</instance> +<instance part="SUPPLY200" gate="GND" x="-43.18" y="-99.06"/> +<instance part="SUPPLY201" gate="GND" x="-53.34" y="-99.06"/> +<instance part="R62" gate="G$1" x="-53.34" y="-55.88"> +<attribute name="TOLERANCE" x="-53.34" y="-55.88" size="1.778" layer="96" display="off"/> +</instance> +<instance part="R63" gate="G$1" x="-66.04" y="-63.5" smashed="yes" rot="R90"> +<attribute name="TOLERANCE" x="-62.23" y="-62.23" size="1.778" layer="96" rot="R90"/> +<attribute name="NAME" x="-67.5386" y="-67.31" size="1.778" layer="95" rot="R90"/> +<attribute name="VALUE" x="-62.23" y="-71.12" size="1.778" layer="96" rot="R90"/> +</instance> +<instance part="R64" gate="G$1" x="-66.04" y="-48.26" smashed="yes" rot="R90"> +<attribute name="TOLERANCE" x="-62.23" y="-45.72" size="1.778" layer="96" rot="R90"/> +<attribute name="NAME" x="-67.5386" y="-52.07" size="1.778" layer="95" rot="R90"/> +<attribute name="VALUE" x="-62.23" y="-52.07" size="1.778" layer="96" rot="R90"/> +</instance> +<instance part="C104" gate="G$1" x="-116.84" y="-55.88"> +<attribute name="DIELECTRIC" x="-116.84" y="-55.88" size="1.778" layer="96" display="off"/> +<attribute name="RATED_VOLTAGE" x="-116.84" y="-55.88" size="1.778" layer="96" display="off"/> +<attribute name="TOLERANCE" x="-116.84" y="-55.88" size="1.778" layer="96" display="off"/> +</instance> +<instance part="SUPPLY202" gate="GND" x="-66.04" y="-73.66"/> +<instance part="SUPPLY203" gate="GND" x="-81.28" y="-73.66"/> +<instance part="SUPPLY204" gate="GND" x="-96.52" y="-73.66"/> +<instance part="SUPPLY205" gate="GND" x="-106.68" y="-73.66"/> +<instance part="SUPPLY206" gate="GND" x="-116.84" y="-73.66"/> +<instance part="R65" gate="G$1" x="25.4" y="-50.8" smashed="yes" rot="R90"> +<attribute name="TOLERANCE" x="29.21" y="-46.99" size="1.778" layer="96" rot="R90"/> +<attribute name="NAME" x="23.9014" y="-54.61" size="1.778" layer="95" rot="R90"/> +<attribute name="VALUE" x="29.21" y="-54.61" size="1.778" layer="96" rot="R90"/> +</instance> +<instance part="R66" gate="G$1" x="25.4" y="-68.58" smashed="yes" rot="R90"> +<attribute name="TOLERANCE" x="29.21" y="-64.77" size="1.778" layer="96" rot="R90"/> +<attribute name="NAME" x="23.9014" y="-72.39" size="1.778" layer="95" rot="R90"/> +<attribute name="VALUE" x="29.21" y="-73.66" size="1.778" layer="96" rot="R90"/> +</instance> +<instance part="SUPPLY207" gate="GND" x="25.4" y="-78.74"/> +<instance part="C111" gate="G$1" x="66.04" y="-50.8" smashed="yes" rot="R90"> +<attribute name="TOLERANCE" x="66.04" y="-50.8" size="1.778" layer="96" rot="R90" display="off"/> +<attribute name="RATED_VOLTAGE" x="66.04" y="-50.8" size="1.778" layer="96" rot="R90" display="off"/> +<attribute name="NAME" x="69.215" y="-50.165" size="1.778" layer="95"/> +<attribute name="VALUE" x="68.58" y="-54.61" size="1.778" layer="96"/> +</instance> +<instance part="C114" gate="G$1" x="35.56" y="-48.26"> +<attribute name="RATED_VOLTAGE" x="35.56" y="-48.26" size="1.778" layer="96" display="off"/> +<attribute name="TOLERANCE" x="35.56" y="-48.26" size="1.778" layer="96" display="off"/> +<attribute name="DIELECTRIC" x="35.56" y="-48.26" size="1.778" layer="96" display="off"/> +</instance> +<instance part="C112" gate="G$1" x="81.28" y="-50.8" smashed="yes" rot="R90"> +<attribute name="TOLERANCE" x="81.28" y="-50.8" size="1.778" layer="96" rot="R90" display="off"/> +<attribute name="RATED_VOLTAGE" x="81.28" y="-50.8" size="1.778" layer="96" rot="R90" display="off"/> +<attribute name="NAME" x="84.455" y="-50.165" size="1.778" layer="95"/> +<attribute name="VALUE" x="83.82" y="-54.61" size="1.778" layer="96"/> +</instance> +<instance part="SUPPLY208" gate="GND" x="35.56" y="-60.96"/> +<instance part="SUPPLY209" gate="GND" x="50.8" y="-60.96"/> +<instance part="SUPPLY210" gate="GND" x="66.04" y="-60.96"/> +<instance part="SUPPLY211" gate="GND" x="81.28" y="-60.96"/> +<instance part="C86" gate="G$1" x="-81.28" y="-55.88"> +<attribute name="RATED_VOLTAGE" x="-81.28" y="-55.88" size="1.778" layer="96" display="off"/> +<attribute name="TOLERANCE" x="-81.28" y="-55.88" size="1.778" layer="96" display="off"/> +<attribute name="DIELECTRIC" x="-81.28" y="-55.88" size="1.778" layer="96" display="off"/> +</instance> +<instance part="R68" gate="G$1" x="-53.34" y="-83.82" rot="R90"/> +<instance part="C140" gate="G$1" x="-106.68" y="-55.88"> +<attribute name="DIELECTRIC" x="-106.68" y="-55.88" size="1.778" layer="96" display="off"/> +<attribute name="RATED_VOLTAGE" x="-106.68" y="-55.88" size="1.778" layer="96" display="off"/> +<attribute name="TOLERANCE" x="-106.68" y="-55.88" size="1.778" layer="96" display="off"/> +</instance> +<instance part="C141" gate="G$1" x="-96.52" y="-55.88"> +<attribute name="DIELECTRIC" x="-96.52" y="-55.88" size="1.778" layer="96" display="off"/> +<attribute name="RATED_VOLTAGE" x="-96.52" y="-55.88" size="1.778" layer="96" display="off"/> +<attribute name="TOLERANCE" x="-96.52" y="-55.88" size="1.778" layer="96" display="off"/> +</instance> +<instance part="C178" gate="G$1" x="50.8" y="-48.26"> +<attribute name="DIELECTRIC" x="50.8" y="-48.26" size="1.778" layer="96" display="off"/> +<attribute name="RATED_VOLTAGE" x="50.8" y="-48.26" size="1.778" layer="96" display="off"/> +<attribute name="TOLERANCE" x="50.8" y="-48.26" size="1.778" layer="96" display="off"/> +</instance> +<instance part="PWR_18V3" gate="VCC" x="-121.92" y="-30.48" smashed="yes"> +<attribute name="VALUE" x="-119.38" y="-30.48" size="1.778" layer="96"/> +</instance> +<instance part="PWR_18V4" gate="VCC" x="-7.62" y="68.58" smashed="yes"> +<attribute name="VALUE" x="-5.08" y="68.58" size="1.778" layer="96"/> +</instance> +<instance part="PWR_18V5" gate="VCC" x="86.36" y="-30.48" smashed="yes"> +<attribute name="VALUE" x="88.9" y="-30.48" size="1.778" layer="96"/> +</instance> +<instance part="Q1" gate="G$1" x="-43.18" y="41.91"/> +<instance part="R75" gate="G$1" x="-53.34" y="29.21" rot="R270"> +<attribute name="TOLERANCE" x="-53.34" y="29.21" size="1.778" layer="96" rot="R270" display="off"/> +</instance> +<instance part="R76" gate="G$1" x="-63.5" y="39.37"> +<attribute name="TOLERANCE" x="-63.5" y="39.37" size="1.778" layer="96" display="off"/> +</instance> +<instance part="SUPPLY222" gate="GND" x="-53.34" y="16.51" rot="MR0"/> +<instance part="SUPPLY223" gate="GND" x="-33.02" y="16.51" rot="MR0"/> +<instance part="JP2" gate="A" x="-21.59" y="50.8" rot="R90"/> +<instance part="C213" gate="G$1" x="27.94" y="40.64" smashed="yes"> +<attribute name="NAME" x="24.13" y="40.64" size="1.6764" layer="95" font="vector" rot="R180"/> +<attribute name="VALUE" x="24.13" y="38.1" size="1.6764" layer="96" font="vector" rot="R180"/> +<attribute name="DIELECTRIC" x="27.94" y="40.64" size="1.778" layer="96" display="off"/> +<attribute name="RATED_VOLTAGE" x="27.94" y="40.64" size="1.778" layer="96" display="off"/> +</instance> +<instance part="SUPPLY224" gate="GND" x="27.94" y="30.48" rot="MR0"/> </instances> <busses> </busses> @@ -37099,312 +37031,312 @@ be allowed to turn off the entropy source <net name="GND" class="1"> <segment> <pinref part="JP1" gate="G$1" pin="GND"/> -<wire x1="-160.02" y1="40.64" x2="-142.24" y2="40.64" width="0.1524" layer="91"/> -<wire x1="-142.24" y1="40.64" x2="-142.24" y2="35.56" width="0.1524" layer="91"/> +<wire x1="-157.48" y1="58.42" x2="-139.7" y2="58.42" width="0.1524" layer="91"/> +<wire x1="-139.7" y1="58.42" x2="-139.7" y2="53.34" width="0.1524" layer="91"/> <pinref part="SUPPLY1" gate="GND" pin="GND"/> </segment> <segment> <pinref part="U$9" gate="G$1" pin="GND"/> <pinref part="SUPPLY7" gate="GND" pin="GND"/> -<wire x1="40.64" y1="25.4" x2="38.1" y2="25.4" width="0.1524" layer="91"/> -<wire x1="38.1" y1="25.4" x2="38.1" y2="15.24" width="0.1524" layer="91"/> +<wire x1="43.18" y1="43.18" x2="40.64" y2="43.18" width="0.1524" layer="91"/> +<wire x1="40.64" y1="43.18" x2="40.64" y2="33.02" width="0.1524" layer="91"/> </segment> <segment> <pinref part="C4" gate="G$1" pin="1"/> <pinref part="SUPPLY9" gate="GND" pin="GND"/> -<wire x1="73.66" y1="17.78" x2="73.66" y2="15.24" width="0.1524" layer="91"/> +<wire x1="76.2" y1="35.56" x2="76.2" y2="33.02" width="0.1524" layer="91"/> </segment> <segment> <pinref part="C5" gate="G$1" pin="2"/> <pinref part="SUPPLY12" gate="GND" pin="GND"/> -<wire x1="86.36" y1="22.86" x2="86.36" y2="15.24" width="0.1524" layer="91"/> +<wire x1="88.9" y1="40.64" x2="88.9" y2="33.02" width="0.1524" layer="91"/> </segment> <segment> <pinref part="SUPPLY197" gate="GND" pin="GND"/> <pinref part="U$8" gate="G$1" pin="PGND"/> -<wire x1="-15.24" y1="-114.3" x2="-15.24" y2="-104.14" width="0.1524" layer="91"/> +<wire x1="-12.7" y1="-96.52" x2="-12.7" y2="-86.36" width="0.1524" layer="91"/> </segment> <segment> <pinref part="SUPPLY198" gate="GND" pin="GND"/> <pinref part="U$8" gate="G$1" pin="AGND"/> -<wire x1="-10.16" y1="-114.3" x2="-10.16" y2="-104.14" width="0.1524" layer="91"/> +<wire x1="-7.62" y1="-96.52" x2="-7.62" y2="-86.36" width="0.1524" layer="91"/> </segment> <segment> <pinref part="SUPPLY200" gate="GND" pin="GND"/> <pinref part="C103" gate="G$1" pin="2"/> -<wire x1="-45.72" y1="-114.3" x2="-45.72" y2="-109.22" width="0.1524" layer="91"/> +<wire x1="-43.18" y1="-96.52" x2="-43.18" y2="-91.44" width="0.1524" layer="91"/> </segment> <segment> <pinref part="SUPPLY201" gate="GND" pin="GND"/> -<wire x1="-55.88" y1="-114.3" x2="-55.88" y2="-106.68" width="0.1524" layer="91"/> +<wire x1="-53.34" y1="-96.52" x2="-53.34" y2="-88.9" width="0.1524" layer="91"/> <pinref part="R68" gate="G$1" pin="1"/> </segment> <segment> <pinref part="R63" gate="G$1" pin="1"/> <pinref part="SUPPLY202" gate="GND" pin="GND"/> -<wire x1="-68.58" y1="-88.9" x2="-68.58" y2="-86.36" width="0.1524" layer="91"/> +<wire x1="-66.04" y1="-71.12" x2="-66.04" y2="-68.58" width="0.1524" layer="91"/> </segment> <segment> <pinref part="SUPPLY206" gate="GND" pin="GND"/> <pinref part="C104" gate="G$1" pin="2"/> -<wire x1="-119.38" y1="-88.9" x2="-119.38" y2="-78.74" width="0.1524" layer="91"/> +<wire x1="-116.84" y1="-71.12" x2="-116.84" y2="-60.96" width="0.1524" layer="91"/> </segment> <segment> <pinref part="SUPPLY205" gate="GND" pin="GND"/> -<wire x1="-109.22" y1="-88.9" x2="-109.22" y2="-78.74" width="0.1524" layer="91"/> +<wire x1="-106.68" y1="-71.12" x2="-106.68" y2="-60.96" width="0.1524" layer="91"/> <pinref part="C140" gate="G$1" pin="2"/> </segment> <segment> <pinref part="SUPPLY204" gate="GND" pin="GND"/> -<wire x1="-99.06" y1="-88.9" x2="-99.06" y2="-78.74" width="0.1524" layer="91"/> +<wire x1="-96.52" y1="-71.12" x2="-96.52" y2="-60.96" width="0.1524" layer="91"/> <pinref part="C141" gate="G$1" pin="2"/> </segment> <segment> <pinref part="SUPPLY203" gate="GND" pin="GND"/> -<wire x1="-83.82" y1="-88.9" x2="-83.82" y2="-78.74" width="0.1524" layer="91"/> +<wire x1="-81.28" y1="-71.12" x2="-81.28" y2="-60.96" width="0.1524" layer="91"/> <pinref part="C86" gate="G$1" pin="2"/> </segment> <segment> <pinref part="R66" gate="G$1" pin="1"/> <pinref part="SUPPLY207" gate="GND" pin="GND"/> -<wire x1="22.86" y1="-91.44" x2="22.86" y2="-93.98" width="0.1524" layer="91"/> +<wire x1="25.4" y1="-73.66" x2="25.4" y2="-76.2" width="0.1524" layer="91"/> </segment> <segment> <pinref part="SUPPLY208" gate="GND" pin="GND"/> <pinref part="C114" gate="G$1" pin="2"/> -<wire x1="33.02" y1="-76.2" x2="33.02" y2="-71.12" width="0.1524" layer="91"/> +<wire x1="35.56" y1="-58.42" x2="35.56" y2="-53.34" width="0.1524" layer="91"/> </segment> <segment> <pinref part="SUPPLY209" gate="GND" pin="GND"/> -<wire x1="48.26" y1="-76.2" x2="48.26" y2="-71.12" width="0.1524" layer="91"/> +<wire x1="50.8" y1="-58.42" x2="50.8" y2="-53.34" width="0.1524" layer="91"/> <pinref part="C178" gate="G$1" pin="2"/> </segment> <segment> <pinref part="SUPPLY210" gate="GND" pin="GND"/> <pinref part="C111" gate="G$1" pin="-"/> -<wire x1="63.5" y1="-76.2" x2="63.5" y2="-71.12" width="0.1524" layer="91"/> +<wire x1="66.04" y1="-58.42" x2="66.04" y2="-53.34" width="0.1524" layer="91"/> </segment> <segment> <pinref part="SUPPLY211" gate="GND" pin="GND"/> <pinref part="C112" gate="G$1" pin="-"/> -<wire x1="78.74" y1="-76.2" x2="78.74" y2="-71.12" width="0.1524" layer="91"/> +<wire x1="81.28" y1="-58.42" x2="81.28" y2="-53.34" width="0.1524" layer="91"/> </segment> <segment> <pinref part="SUPPLY222" gate="GND" pin="GND"/> <pinref part="R75" gate="G$1" pin="2"/> -<wire x1="-55.88" y1="1.27" x2="-55.88" y2="6.35" width="0.1524" layer="91"/> +<wire x1="-53.34" y1="19.05" x2="-53.34" y2="24.13" width="0.1524" layer="91"/> </segment> <segment> <pinref part="Q1" gate="G$1" pin="S"/> -<wire x1="-40.64" y1="21.59" x2="-35.56" y2="21.59" width="0.1524" layer="91"/> +<wire x1="-38.1" y1="39.37" x2="-33.02" y2="39.37" width="0.1524" layer="91"/> <pinref part="SUPPLY223" gate="GND" pin="GND"/> -<wire x1="-35.56" y1="21.59" x2="-35.56" y2="1.27" width="0.1524" layer="91"/> +<wire x1="-33.02" y1="39.37" x2="-33.02" y2="19.05" width="0.1524" layer="91"/> </segment> <segment> <pinref part="SUPPLY224" gate="GND" pin="GND"/> <pinref part="C213" gate="G$1" pin="2"/> -<wire x1="25.4" y1="15.24" x2="25.4" y2="17.78" width="0.1524" layer="91"/> +<wire x1="27.94" y1="33.02" x2="27.94" y2="35.56" width="0.1524" layer="91"/> </segment> </net> <net name="PWR_18V" class="0"> <segment> <pinref part="JP1" gate="G$1" pin="PWR"/> -<wire x1="-160.02" y1="45.72" x2="-142.24" y2="45.72" width="0.1524" layer="91"/> -<label x="-139.7" y="52.07" size="1.778" layer="95"/> +<wire x1="-157.48" y1="63.5" x2="-139.7" y2="63.5" width="0.1524" layer="91"/> +<label x="-137.16" y="69.85" size="1.778" layer="95"/> <pinref part="PWR_18V" gate="VCC" pin="VCC"/> -<wire x1="-142.24" y1="45.72" x2="-142.24" y2="53.34" width="0.1524" layer="91"/> +<wire x1="-139.7" y1="63.5" x2="-139.7" y2="71.12" width="0.1524" layer="91"/> </segment> <segment> -<wire x1="25.4" y1="40.64" x2="40.64" y2="40.64" width="0.1524" layer="91"/> -<label x="27.94" y="48.26" size="1.778" layer="95"/> +<wire x1="27.94" y1="58.42" x2="43.18" y2="58.42" width="0.1524" layer="91"/> +<label x="30.48" y="66.04" size="1.778" layer="95"/> <pinref part="U$9" gate="G$1" pin="IN"/> <pinref part="PWR_18V1" gate="VCC" pin="VCC"/> -<wire x1="25.4" y1="40.64" x2="25.4" y2="48.26" width="0.1524" layer="91"/> +<wire x1="27.94" y1="58.42" x2="27.94" y2="66.04" width="0.1524" layer="91"/> <pinref part="C213" gate="G$1" pin="1"/> -<wire x1="25.4" y1="40.64" x2="25.4" y2="25.4" width="0.1524" layer="91"/> -<junction x="25.4" y="40.64"/> +<wire x1="27.94" y1="58.42" x2="27.94" y2="43.18" width="0.1524" layer="91"/> +<junction x="27.94" y="58.42"/> </segment> <segment> <pinref part="U$8" gate="G$1" pin="VIN"/> <pinref part="R64" gate="G$1" pin="2"/> -<wire x1="-68.58" y1="-60.96" x2="-68.58" y2="-58.42" width="0.1524" layer="91"/> -<wire x1="-68.58" y1="-58.42" x2="-35.56" y2="-58.42" width="0.1524" layer="91"/> +<wire x1="-66.04" y1="-43.18" x2="-66.04" y2="-40.64" width="0.1524" layer="91"/> +<wire x1="-66.04" y1="-40.64" x2="-33.02" y2="-40.64" width="0.1524" layer="91"/> <pinref part="C104" gate="G$1" pin="1"/> -<wire x1="-119.38" y1="-71.12" x2="-119.38" y2="-58.42" width="0.1524" layer="91"/> -<wire x1="-119.38" y1="-58.42" x2="-109.22" y2="-58.42" width="0.1524" layer="91"/> -<junction x="-68.58" y="-58.42"/> -<wire x1="-109.22" y1="-58.42" x2="-99.06" y2="-58.42" width="0.1524" layer="91"/> -<wire x1="-99.06" y1="-58.42" x2="-83.82" y2="-58.42" width="0.1524" layer="91"/> -<wire x1="-83.82" y1="-58.42" x2="-68.58" y2="-58.42" width="0.1524" layer="91"/> -<wire x1="-109.22" y1="-71.12" x2="-109.22" y2="-58.42" width="0.1524" layer="91"/> -<junction x="-109.22" y="-58.42"/> -<wire x1="-83.82" y1="-71.12" x2="-83.82" y2="-58.42" width="0.1524" layer="91"/> -<junction x="-83.82" y="-58.42"/> -<junction x="-119.38" y="-58.42"/> +<wire x1="-116.84" y1="-53.34" x2="-116.84" y2="-40.64" width="0.1524" layer="91"/> +<wire x1="-116.84" y1="-40.64" x2="-106.68" y2="-40.64" width="0.1524" layer="91"/> +<junction x="-66.04" y="-40.64"/> +<wire x1="-106.68" y1="-40.64" x2="-96.52" y2="-40.64" width="0.1524" layer="91"/> +<wire x1="-96.52" y1="-40.64" x2="-81.28" y2="-40.64" width="0.1524" layer="91"/> +<wire x1="-81.28" y1="-40.64" x2="-66.04" y2="-40.64" width="0.1524" layer="91"/> +<wire x1="-106.68" y1="-53.34" x2="-106.68" y2="-40.64" width="0.1524" layer="91"/> +<junction x="-106.68" y="-40.64"/> +<wire x1="-81.28" y1="-53.34" x2="-81.28" y2="-40.64" width="0.1524" layer="91"/> +<junction x="-81.28" y="-40.64"/> +<junction x="-116.84" y="-40.64"/> <pinref part="C86" gate="G$1" pin="1"/> <pinref part="C140" gate="G$1" pin="1"/> <pinref part="C141" gate="G$1" pin="1"/> -<wire x1="-99.06" y1="-71.12" x2="-99.06" y2="-58.42" width="0.1524" layer="91"/> -<junction x="-99.06" y="-58.42"/> +<wire x1="-96.52" y1="-53.34" x2="-96.52" y2="-40.64" width="0.1524" layer="91"/> +<junction x="-96.52" y="-40.64"/> <pinref part="PWR_18V3" gate="VCC" pin="VCC"/> -<wire x1="-119.38" y1="-58.42" x2="-124.46" y2="-58.42" width="0.1524" layer="91"/> -<wire x1="-124.46" y1="-58.42" x2="-124.46" y2="-50.8" width="0.1524" layer="91"/> -<label x="-121.92" y="-50.8" size="1.778" layer="95"/> +<wire x1="-116.84" y1="-40.64" x2="-121.92" y2="-40.64" width="0.1524" layer="91"/> +<wire x1="-121.92" y1="-40.64" x2="-121.92" y2="-33.02" width="0.1524" layer="91"/> +<label x="-119.38" y="-33.02" size="1.778" layer="95"/> </segment> <segment> <pinref part="R22" gate="G$1" pin="1"/> -<wire x1="-10.16" y1="48.26" x2="-10.16" y2="45.72" width="0.1524" layer="91"/> +<wire x1="-7.62" y1="66.04" x2="-7.62" y2="63.5" width="0.1524" layer="91"/> <pinref part="PWR_18V4" gate="VCC" pin="VCC"/> -<label x="-7.62" y="48.26" size="1.778" layer="95"/> +<label x="-5.08" y="66.04" size="1.778" layer="95"/> </segment> </net> <net name="N$1" class="0"> <segment> <pinref part="C1" gate="G$1" pin="1"/> <pinref part="U$9" gate="G$1" pin="ADJ"/> -<wire x1="73.66" y1="33.02" x2="71.12" y2="33.02" width="0.1524" layer="91"/> +<wire x1="76.2" y1="50.8" x2="73.66" y2="50.8" width="0.1524" layer="91"/> </segment> </net> <net name="N$2" class="0"> <segment> <pinref part="C4" gate="G$1" pin="2"/> <pinref part="U$9" gate="G$1" pin="REF/BYP"/> -<wire x1="73.66" y1="25.4" x2="71.12" y2="25.4" width="0.1524" layer="91"/> +<wire x1="76.2" y1="43.18" x2="73.66" y2="43.18" width="0.1524" layer="91"/> </segment> </net> <net name="15V_LDO_ENABLE" class="0"> <segment> <pinref part="U$9" gate="G$1" pin="!SHDN"/> -<wire x1="40.64" y1="33.02" x2="-5.08" y2="33.02" width="0.1524" layer="91"/> +<wire x1="43.18" y1="50.8" x2="-2.54" y2="50.8" width="0.1524" layer="91"/> </segment> <segment> <pinref part="JP2" gate="A" pin="1"/> -<label x="-2.54" y="34.29" size="1.778" layer="95"/> +<label x="0" y="52.07" size="1.778" layer="95"/> <pinref part="R22" gate="G$1" pin="2"/> -<wire x1="-10.16" y1="33.02" x2="-5.08" y2="33.02" width="0.1524" layer="91"/> -<wire x1="-10.16" y1="35.56" x2="-10.16" y2="33.02" width="0.1524" layer="91"/> -<wire x1="-16.51" y1="33.02" x2="-10.16" y2="33.02" width="0.1524" layer="91"/> -<junction x="-10.16" y="33.02"/> +<wire x1="-7.62" y1="50.8" x2="-2.54" y2="50.8" width="0.1524" layer="91"/> +<wire x1="-7.62" y1="53.34" x2="-7.62" y2="50.8" width="0.1524" layer="91"/> +<wire x1="-13.97" y1="50.8" x2="-7.62" y2="50.8" width="0.1524" layer="91"/> +<junction x="-7.62" y="50.8"/> </segment> </net> <net name="15V_STABLE" class="0"> <segment> <pinref part="U$9" gate="G$1" pin="OUT"/> -<wire x1="71.12" y1="40.64" x2="73.66" y2="40.64" width="0.1524" layer="91"/> -<label x="96.52" y="40.64" size="1.778" layer="95" xref="yes"/> +<wire x1="73.66" y1="58.42" x2="76.2" y2="58.42" width="0.1524" layer="91"/> +<label x="99.06" y="58.42" size="1.778" layer="95" xref="yes"/> <pinref part="C1" gate="G$1" pin="2"/> -<wire x1="73.66" y1="40.64" x2="86.36" y2="40.64" width="0.1524" layer="91"/> -<junction x="73.66" y="40.64"/> +<wire x1="76.2" y1="58.42" x2="88.9" y2="58.42" width="0.1524" layer="91"/> +<junction x="76.2" y="58.42"/> <pinref part="C5" gate="G$1" pin="1"/> -<wire x1="86.36" y1="40.64" x2="93.98" y2="40.64" width="0.1524" layer="91"/> -<wire x1="93.98" y1="40.64" x2="96.52" y2="40.64" width="0.1524" layer="91"/> -<wire x1="86.36" y1="30.48" x2="86.36" y2="40.64" width="0.1524" layer="91"/> -<junction x="86.36" y="40.64"/> +<wire x1="88.9" y1="58.42" x2="96.52" y2="58.42" width="0.1524" layer="91"/> +<wire x1="96.52" y1="58.42" x2="99.06" y2="58.42" width="0.1524" layer="91"/> +<wire x1="88.9" y1="48.26" x2="88.9" y2="58.42" width="0.1524" layer="91"/> +<junction x="88.9" y="58.42"/> <pinref part="PWR_18V2" gate="VCC" pin="VCC"/> -<wire x1="93.98" y1="48.26" x2="93.98" y2="40.64" width="0.1524" layer="91"/> -<junction x="93.98" y="40.64"/> -<label x="96.52" y="48.26" size="1.778" layer="95"/> +<wire x1="96.52" y1="66.04" x2="96.52" y2="58.42" width="0.1524" layer="91"/> +<junction x="96.52" y="58.42"/> +<label x="99.06" y="66.04" size="1.778" layer="95"/> </segment> </net> <net name="N$52" class="0"> <segment> <pinref part="C103" gate="G$1" pin="1"/> -<wire x1="-45.72" y1="-101.6" x2="-45.72" y2="-93.98" width="0.1524" layer="91"/> +<wire x1="-43.18" y1="-83.82" x2="-43.18" y2="-76.2" width="0.1524" layer="91"/> <pinref part="U$8" gate="G$1" pin="SS/TRK"/> -<wire x1="-45.72" y1="-93.98" x2="-35.56" y2="-93.98" width="0.1524" layer="91"/> +<wire x1="-43.18" y1="-76.2" x2="-33.02" y2="-76.2" width="0.1524" layer="91"/> </segment> </net> <net name="N$53" class="0"> <segment> -<wire x1="-55.88" y1="-96.52" x2="-55.88" y2="-83.82" width="0.1524" layer="91"/> +<wire x1="-53.34" y1="-78.74" x2="-53.34" y2="-66.04" width="0.1524" layer="91"/> <pinref part="U$8" gate="G$1" pin="SYNC"/> -<wire x1="-55.88" y1="-83.82" x2="-35.56" y2="-83.82" width="0.1524" layer="91"/> +<wire x1="-53.34" y1="-66.04" x2="-33.02" y2="-66.04" width="0.1524" layer="91"/> <pinref part="R68" gate="G$1" pin="2"/> </segment> </net> <net name="N$54" class="0"> <segment> <pinref part="R62" gate="G$1" pin="1"/> -<wire x1="-60.96" y1="-73.66" x2="-68.58" y2="-73.66" width="0.1524" layer="91"/> +<wire x1="-58.42" y1="-55.88" x2="-66.04" y2="-55.88" width="0.1524" layer="91"/> <pinref part="R64" gate="G$1" pin="1"/> -<wire x1="-68.58" y1="-73.66" x2="-68.58" y2="-71.12" width="0.1524" layer="91"/> +<wire x1="-66.04" y1="-55.88" x2="-66.04" y2="-53.34" width="0.1524" layer="91"/> <pinref part="R63" gate="G$1" pin="2"/> -<wire x1="-68.58" y1="-76.2" x2="-68.58" y2="-73.66" width="0.1524" layer="91"/> -<junction x="-68.58" y="-73.66"/> +<wire x1="-66.04" y1="-58.42" x2="-66.04" y2="-55.88" width="0.1524" layer="91"/> +<junction x="-66.04" y="-55.88"/> </segment> </net> <net name="N$55" class="0"> <segment> <pinref part="R62" gate="G$1" pin="2"/> <pinref part="U$8" gate="G$1" pin="EN"/> -<wire x1="-50.8" y1="-73.66" x2="-35.56" y2="-73.66" width="0.1524" layer="91"/> +<wire x1="-48.26" y1="-55.88" x2="-33.02" y2="-55.88" width="0.1524" layer="91"/> </segment> </net> <net name="N$56" class="0"> <segment> <pinref part="U$8" gate="G$1" pin="FB"/> -<wire x1="10.16" y1="-78.74" x2="22.86" y2="-78.74" width="0.1524" layer="91"/> +<wire x1="12.7" y1="-60.96" x2="25.4" y2="-60.96" width="0.1524" layer="91"/> <pinref part="R65" gate="G$1" pin="1"/> -<wire x1="22.86" y1="-78.74" x2="22.86" y2="-73.66" width="0.1524" layer="91"/> +<wire x1="25.4" y1="-60.96" x2="25.4" y2="-55.88" width="0.1524" layer="91"/> <pinref part="R66" gate="G$1" pin="2"/> -<wire x1="22.86" y1="-81.28" x2="22.86" y2="-78.74" width="0.1524" layer="91"/> -<junction x="22.86" y="-78.74"/> +<wire x1="25.4" y1="-63.5" x2="25.4" y2="-60.96" width="0.1524" layer="91"/> +<junction x="25.4" y="-60.96"/> </segment> </net> <net name="VCC_5V0" class="0"> <segment> <pinref part="U$8" gate="G$1" pin="VOUT"/> <pinref part="R65" gate="G$1" pin="2"/> -<junction x="22.86" y="-58.42"/> -<wire x1="22.86" y1="-63.5" x2="22.86" y2="-58.42" width="0.1524" layer="91"/> -<wire x1="10.16" y1="-58.42" x2="22.86" y2="-58.42" width="0.1524" layer="91"/> -<wire x1="48.26" y1="-63.5" x2="48.26" y2="-58.42" width="0.1524" layer="91"/> -<wire x1="48.26" y1="-58.42" x2="33.02" y2="-58.42" width="0.1524" layer="91"/> +<junction x="25.4" y="-40.64"/> +<wire x1="25.4" y1="-45.72" x2="25.4" y2="-40.64" width="0.1524" layer="91"/> +<wire x1="12.7" y1="-40.64" x2="25.4" y2="-40.64" width="0.1524" layer="91"/> +<wire x1="50.8" y1="-45.72" x2="50.8" y2="-40.64" width="0.1524" layer="91"/> +<wire x1="50.8" y1="-40.64" x2="35.56" y2="-40.64" width="0.1524" layer="91"/> <pinref part="C111" gate="G$1" pin="+"/> -<wire x1="33.02" y1="-58.42" x2="10.16" y2="-58.42" width="0.1524" layer="91"/> -<wire x1="63.5" y1="-66.04" x2="63.5" y2="-58.42" width="0.1524" layer="91"/> -<wire x1="63.5" y1="-58.42" x2="48.26" y2="-58.42" width="0.1524" layer="91"/> -<junction x="48.26" y="-58.42"/> +<wire x1="35.56" y1="-40.64" x2="12.7" y2="-40.64" width="0.1524" layer="91"/> +<wire x1="66.04" y1="-48.26" x2="66.04" y2="-40.64" width="0.1524" layer="91"/> +<wire x1="66.04" y1="-40.64" x2="50.8" y2="-40.64" width="0.1524" layer="91"/> +<junction x="50.8" y="-40.64"/> <pinref part="C112" gate="G$1" pin="+"/> -<wire x1="78.74" y1="-66.04" x2="78.74" y2="-58.42" width="0.1524" layer="91"/> -<wire x1="78.74" y1="-58.42" x2="63.5" y2="-58.42" width="0.1524" layer="91"/> -<junction x="63.5" y="-58.42"/> -<wire x1="78.74" y1="-58.42" x2="83.82" y2="-58.42" width="0.1524" layer="91"/> -<junction x="78.74" y="-58.42"/> +<wire x1="81.28" y1="-48.26" x2="81.28" y2="-40.64" width="0.1524" layer="91"/> +<wire x1="81.28" y1="-40.64" x2="66.04" y2="-40.64" width="0.1524" layer="91"/> +<junction x="66.04" y="-40.64"/> +<wire x1="81.28" y1="-40.64" x2="86.36" y2="-40.64" width="0.1524" layer="91"/> +<junction x="81.28" y="-40.64"/> <pinref part="C178" gate="G$1" pin="1"/> <pinref part="PWR_18V5" gate="VCC" pin="VCC"/> -<wire x1="83.82" y1="-58.42" x2="83.82" y2="-50.8" width="0.1524" layer="91"/> -<label x="86.36" y="-50.8" size="1.778" layer="95"/> +<wire x1="86.36" y1="-40.64" x2="86.36" y2="-33.02" width="0.1524" layer="91"/> +<label x="88.9" y="-33.02" size="1.778" layer="95"/> <pinref part="C114" gate="G$1" pin="1"/> -<wire x1="33.02" y1="-63.5" x2="33.02" y2="-58.42" width="0.1524" layer="91"/> -<junction x="33.02" y="-58.42"/> +<wire x1="35.56" y1="-45.72" x2="35.56" y2="-40.64" width="0.1524" layer="91"/> +<junction x="35.56" y="-40.64"/> </segment> </net> <net name="N$11" class="0"> <segment> <pinref part="R76" gate="G$1" pin="2"/> <pinref part="Q1" gate="G$1" pin="G"/> -<wire x1="-60.96" y1="21.59" x2="-55.88" y2="21.59" width="0.1524" layer="91"/> +<wire x1="-58.42" y1="39.37" x2="-53.34" y2="39.37" width="0.1524" layer="91"/> <pinref part="R75" gate="G$1" pin="1"/> -<wire x1="-55.88" y1="21.59" x2="-50.8" y2="21.59" width="0.1524" layer="91"/> -<wire x1="-55.88" y1="16.51" x2="-55.88" y2="21.59" width="0.1524" layer="91"/> -<junction x="-55.88" y="21.59"/> +<wire x1="-53.34" y1="39.37" x2="-48.26" y2="39.37" width="0.1524" layer="91"/> +<wire x1="-53.34" y1="34.29" x2="-53.34" y2="39.37" width="0.1524" layer="91"/> +<junction x="-53.34" y="39.37"/> </segment> </net> <net name="N$14" class="0"> <segment> <pinref part="Q1" gate="G$1" pin="D"/> -<wire x1="-40.64" y1="26.67" x2="-35.56" y2="26.67" width="0.1524" layer="91"/> -<wire x1="-35.56" y1="26.67" x2="-35.56" y2="33.02" width="0.1524" layer="91"/> +<wire x1="-38.1" y1="44.45" x2="-33.02" y2="44.45" width="0.1524" layer="91"/> +<wire x1="-33.02" y1="44.45" x2="-33.02" y2="50.8" width="0.1524" layer="91"/> <pinref part="JP2" gate="A" pin="2"/> -<wire x1="-31.75" y1="33.02" x2="-35.56" y2="33.02" width="0.1524" layer="91"/> +<wire x1="-29.21" y1="50.8" x2="-33.02" y2="50.8" width="0.1524" layer="91"/> </segment> </net> <net name="FPGA_ENTROPY_DISABLE" class="0"> <segment> <pinref part="R76" gate="G$1" pin="1"/> -<wire x1="-71.12" y1="21.59" x2="-78.74" y2="21.59" width="0.1524" layer="91"/> -<label x="-78.74" y="21.59" size="1.778" layer="95" rot="R180" xref="yes"/> +<wire x1="-68.58" y1="39.37" x2="-76.2" y2="39.37" width="0.1524" layer="91"/> +<label x="-76.2" y="39.37" size="1.778" layer="95" rot="R180" xref="yes"/> </segment> </net> </nets> @@ -37640,422 +37572,99 @@ for the Alpha.</text> </nets> </sheet> <sheet> -<description>ARM Cortex-M4</description> +<description>ARM Configuration</description> <plain> -<text x="411.48" y="160.02" size="1.778" layer="91">ST AN8844 §2.2 -One bypass capacitor for every VDD. -Use 0.1 uF X7R (X5R?) 10V.</text> -<text x="334.01" y="161.29" size="1.778" layer="91">ST AN8844 §2.2 -One 10uF bypass cap for the package. -(two used for extra comfort)</text> -<text x="276.86" y="214.63" size="1.778" layer="91">2*2.2uF LowESR or -1*4.7uF LowESR -< 1 ohm -(ST AN4488 §2.2)</text> -<text x="104.14" y="71.12" size="1.778" layer="91">2*2.2uF LowESR or -1*4.7uF LowESR -< 1 ohm -(ST AN4488 §2.2)</text> -<text x="279.4" y="-53.34" size="1.778" layer="91">ST 4488 §5.1 +<text x="165.1" y="152.4" size="1.778" layer="91">ST 4488 §5.1 BOOT0 to GND boots Main Flash Memory</text> -<text x="345.44" y="48.26" size="1.778" layer="91">ST AN4488 §4.1.2 +<text x="58.42" y="200.66" size="1.778" layer="91">ST AN4488 §4.1.2 suggests 25 MHz for good Ethernet, USB OTG and I2C</text> -<text x="429.26" y="58.42" size="1.778" layer="91">SWD program/debug</text> -<text x="441.96" y="12.7" size="1.778" layer="91">ST AN4488 §2.3.3 +<text x="309.88" y="228.6" size="1.778" layer="91">SWD program/debug</text> +<text x="322.58" y="182.88" size="1.778" layer="91">ST AN4488 §2.3.3 Reset circuit not needed, but pull-down cap recommended.</text> -<text x="299.72" y="17.78" size="0.8128" layer="91">PDR_ON high enables +<text x="157.48" y="198.12" size="1.778" layer="91" rot="R180">PDR_ON high enables internal power regulator</text> -<text x="368.3" y="40.64" size="1.778" layer="91">CL 10pF</text> -<text x="99.06" y="127" size="1.27" layer="91">FPGA_DONE can be swapped with any -other available GPIO pin on the ARM</text> -<text x="137.16" y="-46.99" size="1.778" layer="91">*) FPGA_GPIO_*, FPGA_IRQ_N_* and -FPGA_{PROGRAM,INIT}_B signals -can be swapped with any other -available GPIO on the ARM</text> +<text x="81.28" y="193.04" size="1.778" layer="91">CL 10pF</text> +<text x="45.72" y="251.46" size="3.81" layer="91">Basic configuration, STM32</text> </plain> <instances> -<instance part="U$1" gate="G$1" x="55.88" y="157.48"/> -<instance part="U$1" gate="G$2" x="55.88" y="7.62"/> -<instance part="U$1" gate="G$3" x="228.6" y="154.94"/> -<instance part="U$1" gate="G$4" x="228.6" y="5.08"/> -<instance part="C14" gate="G$1" x="383.54" y="33.02" smashed="yes" rot="R180"> -<attribute name="NAME" x="386.08" y="35.56" size="1.778" layer="95"/> -<attribute name="VALUE" x="386.08" y="33.02" size="1.778" layer="96"/> -<attribute name="DIELECTRIC" x="386.08" y="30.48" size="1.6764" layer="96"/> -</instance> -<instance part="C15" gate="G$1" x="342.9" y="33.02" smashed="yes" rot="R180"> -<attribute name="NAME" x="332.74" y="35.56" size="1.778" layer="95"/> -<attribute name="VALUE" x="332.74" y="33.02" size="1.778" layer="96"/> -<attribute name="DIELECTRIC" x="332.74" y="30.48" size="1.6764" layer="96"/> -</instance> -<instance part="SUPPLY18" gate="GND" x="342.9" y="25.4"/> -<instance part="SUPPLY19" gate="GND" x="383.54" y="25.4"/> -<instance part="U$2" gate="G$1" x="436.88" y="40.64" rot="R180"/> -<instance part="SUPPLY20" gate="GND" x="226.06" y="88.9"/> -<instance part="SUPPLY21" gate="GND" x="228.6" y="-58.42"/> -<instance part="SUPPLY22" gate="GND" x="53.34" y="-55.88"/> -<instance part="SUPPLY24" gate="GND" x="53.34" y="88.9"/> -<instance part="P+5" gate="VCC" x="53.34" y="223.52" smashed="yes"/> -<instance part="P+6" gate="VCC" x="226.06" y="223.52" smashed="yes"/> -<instance part="P+8" gate="VCC" x="226.06" y="73.66" smashed="yes"/> -<instance part="P+9" gate="VCC" x="53.34" y="76.2" smashed="yes"/> -<instance part="C16" gate="G$1" x="345.44" y="139.7" smashed="yes"> -<attribute name="NAME" x="341.63" y="140.97" size="1.6764" layer="95" rot="R180"/> -<attribute name="VALUE" x="342.9" y="138.43" size="1.6764" layer="96" rot="R180"/> -<attribute name="DIELECTRIC" x="345.44" y="139.7" size="1.6764" layer="96" display="off"/> -<attribute name="RATED_VOLTAGE" x="345.44" y="139.7" size="1.6764" layer="96" display="off"/> -</instance> -<instance part="C17" gate="G$1" x="355.6" y="139.7" smashed="yes"> -<attribute name="NAME" x="359.41" y="139.7" size="1.6764" layer="95"/> -<attribute name="VALUE" x="358.14" y="137.16" size="1.6764" layer="96"/> -<attribute name="DIELECTRIC" x="355.6" y="139.7" size="1.6764" layer="96" display="off"/> -<attribute name="RATED_VOLTAGE" x="355.6" y="139.7" size="1.6764" layer="96" display="off"/> -</instance> -<instance part="SUPPLY25" gate="GND" x="350.52" y="124.46"/> -<instance part="P+10" gate="VCC" x="350.52" y="152.4" smashed="yes"/> -<instance part="P+11" gate="VCC" x="403.86" y="161.29" smashed="yes"/> -<instance part="SUPPLY26" gate="GND" x="403.86" y="121.92"/> -<instance part="C18" gate="G$1" x="449.58" y="149.86" smashed="yes"> -<attribute name="NAME" x="449.58" y="154.94" size="1.27" layer="95" font="vector"/> -<attribute name="VALUE" x="457.2" y="152.4" size="1.27" layer="96" font="vector"/> -</instance> -<instance part="C19" gate="G$1" x="444.5" y="149.86" smashed="yes"> -<attribute name="NAME" x="444.5" y="154.94" size="1.27" layer="95" font="vector"/> -</instance> -<instance part="C20" gate="G$1" x="439.42" y="149.86" smashed="yes"> -<attribute name="NAME" x="439.42" y="154.94" size="1.27" layer="95" font="vector"/> -</instance> -<instance part="C21" gate="G$1" x="434.34" y="149.86" smashed="yes"> -<attribute name="NAME" x="434.34" y="154.94" size="1.27" layer="95" font="vector"/> -</instance> -<instance part="C22" gate="G$1" x="429.26" y="149.86" smashed="yes"> -<attribute name="NAME" x="429.26" y="154.94" size="1.27" layer="95" font="vector"/> -</instance> -<instance part="C23" gate="G$1" x="424.18" y="149.86" smashed="yes"> -<attribute name="NAME" x="424.18" y="154.94" size="1.27" layer="95" font="vector"/> -</instance> -<instance part="C24" gate="G$1" x="419.1" y="149.86" smashed="yes"> -<attribute name="NAME" x="419.1" y="154.94" size="1.27" layer="95" font="vector"/> -</instance> -<instance part="C25" gate="G$1" x="414.02" y="149.86" smashed="yes"> -<attribute name="NAME" x="414.02" y="154.94" size="1.27" layer="95" font="vector"/> -<attribute name="DIELECTRIC" x="414.02" y="149.86" size="1.6764" layer="96" display="off"/> -<attribute name="RATED_VOLTAGE" x="414.02" y="149.86" size="1.6764" layer="96" display="off"/> -</instance> -<instance part="C26" gate="G$1" x="414.02" y="137.16" smashed="yes"> -<attribute name="NAME" x="411.48" y="129.54" size="1.27" layer="95" font="vector"/> -</instance> -<instance part="C27" gate="G$1" x="408.94" y="137.16" smashed="yes"> -<attribute name="NAME" x="406.4" y="129.54" size="1.27" layer="95" font="vector"/> -</instance> -<instance part="C28" gate="G$1" x="408.94" y="149.86" smashed="yes"> -<attribute name="NAME" x="408.94" y="154.94" size="1.27" layer="95" font="vector"/> -<attribute name="RATED_VOLTAGE" x="408.94" y="149.86" size="1.6764" layer="96" display="off"/> -</instance> -<instance part="C29" gate="G$1" x="403.86" y="149.86" smashed="yes"> -<attribute name="NAME" x="403.86" y="154.94" size="1.27" layer="95" font="vector"/> -<attribute name="DIELECTRIC" x="403.86" y="149.86" size="1.6764" layer="96" display="off"/> -<attribute name="RATED_VOLTAGE" x="403.86" y="149.86" size="1.6764" layer="96" display="off"/> -</instance> -<instance part="C31" gate="G$1" x="449.58" y="137.16" smashed="yes"> -<attribute name="NAME" x="447.04" y="129.54" size="1.27" layer="95" font="vector"/> -<attribute name="VALUE" x="454.66" y="137.16" size="1.27" layer="96" font="vector"/> -</instance> -<instance part="C32" gate="G$1" x="444.5" y="137.16" smashed="yes"> -<attribute name="NAME" x="441.96" y="129.54" size="1.27" layer="95" font="vector"/> -</instance> -<instance part="C33" gate="G$1" x="439.42" y="137.16" smashed="yes"> -<attribute name="NAME" x="436.88" y="129.54" size="1.27" layer="95" font="vector"/> -</instance> -<instance part="C34" gate="G$1" x="434.34" y="137.16" smashed="yes"> -<attribute name="NAME" x="431.8" y="129.54" size="1.27" layer="95" font="vector"/> -</instance> -<instance part="C35" gate="G$1" x="429.26" y="137.16" smashed="yes"> -<attribute name="NAME" x="426.72" y="129.54" size="1.27" layer="95" font="vector"/> -</instance> -<instance part="C36" gate="G$1" x="424.18" y="137.16" smashed="yes"> -<attribute name="NAME" x="421.64" y="129.54" size="1.27" layer="95" font="vector"/> -</instance> -<instance part="C37" gate="G$1" x="419.1" y="137.16" smashed="yes"> -<attribute name="NAME" x="416.56" y="129.54" size="1.27" layer="95" font="vector"/> -</instance> -<instance part="P+12" gate="VCC" x="81.28" y="223.52" smashed="yes"/> -<instance part="C30" gate="G$1" x="96.52" y="210.82" smashed="yes"> -<attribute name="NAME" x="99.06" y="213.36" size="1.27" layer="95" font="vector"/> -<attribute name="VALUE" x="99.06" y="210.82" size="1.27" layer="96" font="vector"/> -<attribute name="DIELECTRIC" x="96.52" y="210.82" size="1.6764" layer="96" display="off"/> -<attribute name="RATED_VOLTAGE" x="96.52" y="210.82" size="1.6764" layer="96" display="off"/> -</instance> -<instance part="SUPPLY27" gate="GND" x="96.52" y="200.66"/> -<instance part="P+13" gate="VCC" x="274.32" y="223.52" smashed="yes"/> -<instance part="C38" gate="G$1" x="274.32" y="208.28" smashed="yes"> -<attribute name="NAME" x="281.94" y="208.28" size="1.27" layer="95" font="vector"/> -<attribute name="VALUE" x="281.94" y="205.74" size="1.27" layer="96" font="vector"/> -<attribute name="DIELECTRIC" x="274.32" y="208.28" size="1.778" layer="96" display="off"/> -<attribute name="RATED_VOLTAGE" x="274.32" y="208.28" size="1.778" layer="96" display="off"/> -</instance> -<instance part="P+14" gate="VCC" x="101.6" y="76.2" smashed="yes"/> -<instance part="C39" gate="G$1" x="101.6" y="63.5" smashed="yes"> -<attribute name="NAME" x="111.76" y="63.5" size="1.27" layer="95" font="vector"/> -<attribute name="VALUE" x="111.76" y="60.96" size="1.27" layer="96" font="vector"/> -<attribute name="DIELECTRIC" x="101.6" y="63.5" size="1.778" layer="96" display="off"/> -<attribute name="RATED_VOLTAGE" x="101.6" y="63.5" size="1.778" layer="96" display="off"/> -</instance> -<instance part="P+15" gate="VCC" x="124.46" y="166.37" smashed="yes"/> -<instance part="SUPPLY28" gate="GND" x="274.32" y="-58.42"/> -<instance part="R10" gate="G$1" x="274.32" y="-48.26" rot="R90"/> -<instance part="C40" gate="G$1" x="436.88" y="22.86" smashed="yes"> -<attribute name="NAME" x="427.99" y="24.13" size="1.778" layer="95" font="vector"/> -<attribute name="VALUE" x="427.99" y="21.59" size="1.778" layer="96" font="vector"/> -<attribute name="DIELECTRIC" x="436.88" y="22.86" size="1.778" layer="96" display="off"/> -<attribute name="RATED_VOLTAGE" x="436.88" y="22.86" size="1.778" layer="96" display="off"/> -</instance> -<instance part="SUPPLY29" gate="GND" x="436.88" y="15.24"/> -<instance part="R12" gate="G$1" x="350.52" y="27.94" rot="R90"/> -<instance part="SUPPLY42" gate="GND" x="421.64" y="15.24"/> -<instance part="P+16" gate="VCC" x="414.02" y="53.34" smashed="yes"/> -<instance part="FRAME3" gate="G$1" x="-53.34" y="-116.84"/> -<instance part="FRAME3" gate="G$2" x="398.78" y="-116.84"/> -<instance part="P+17" gate="VCC" x="297.18" y="25.4" smashed="yes"/> -<instance part="C56" gate="G$1" x="106.68" y="63.5" smashed="yes"> -<attribute name="NAME" x="111.76" y="66.04" size="1.27" layer="95" font="vector"/> -<attribute name="DIELECTRIC" x="106.68" y="63.5" size="1.778" layer="96" display="off"/> -<attribute name="RATED_VOLTAGE" x="106.68" y="63.5" size="1.778" layer="96" display="off"/> -</instance> -<instance part="C57" gate="G$1" x="279.4" y="208.28" smashed="yes"> -<attribute name="NAME" x="281.94" y="210.82" size="1.27" layer="95" font="vector"/> -<attribute name="DIELECTRIC" x="279.4" y="208.28" size="1.778" layer="96" display="off"/> -<attribute name="RATED_VOLTAGE" x="279.4" y="208.28" size="1.778" layer="96" display="off"/> -</instance> -<instance part="LED5" gate="G$1" x="434.34" y="-20.32" smashed="yes" rot="R90"> -<attribute name="VALUE" x="463.55" y="-19.05" size="1.778" layer="96" rot="R180"/> -</instance> -<instance part="LED6" gate="G$1" x="429.26" y="-22.86" smashed="yes" rot="R90"> -<attribute name="VALUE" x="463.55" y="-21.59" size="1.778" layer="96" rot="R180"/> -</instance> -<instance part="LED7" gate="G$1" x="434.34" y="-25.4" smashed="yes" rot="R90"> -<attribute name="VALUE" x="463.55" y="-24.13" size="1.778" layer="96" rot="R180"/> -</instance> -<instance part="LED8" gate="G$1" x="429.26" y="-27.94" smashed="yes" rot="R90"> -<attribute name="VALUE" x="463.55" y="-26.67" size="1.778" layer="96" rot="R180"/> -</instance> -<instance part="R8" gate="A" x="414.02" y="-27.94" rot="R180"/> -<instance part="SUPPLY43" gate="GND" x="441.96" y="-33.02"/> -<instance part="Q4" gate="G$1" x="363.22" y="38.1"> -<attribute name="MPN" x="363.22" y="38.1" size="1.778" layer="96" display="off"/> -<attribute name="OC_FARNELL" x="363.22" y="38.1" size="1.778" layer="96" display="off"/> -</instance> -<instance part="SUPPLY2" gate="GND" x="358.14" y="25.4"/> -<instance part="SUPPLY3" gate="GND" x="368.3" y="25.4"/> -<instance part="C6" gate="G$1" x="414.02" y="35.56" smashed="yes"> -<attribute name="NAME" x="405.13" y="36.83" size="1.778" layer="95" font="vector"/> -<attribute name="VALUE" x="405.13" y="34.29" size="1.778" layer="96" font="vector"/> -<attribute name="DIELECTRIC" x="414.02" y="35.56" size="1.778" layer="96" display="off"/> -<attribute name="RATED_VOLTAGE" x="414.02" y="35.56" size="1.778" layer="96" display="off"/> -</instance> -<instance part="SUPPLY5" gate="GND" x="414.02" y="15.24"/> +<instance part="U$1" gate="CFG" x="198.12" y="185.42"/> +<instance part="C14" gate="G$1" x="96.52" y="185.42" smashed="yes" rot="R180"> +<attribute name="NAME" x="99.06" y="187.96" size="1.778" layer="95"/> +<attribute name="VALUE" x="99.06" y="185.42" size="1.778" layer="96"/> +<attribute name="DIELECTRIC" x="99.06" y="182.88" size="1.6764" layer="96"/> +</instance> +<instance part="C15" gate="G$1" x="55.88" y="185.42" smashed="yes" rot="R180"> +<attribute name="NAME" x="45.72" y="187.96" size="1.778" layer="95"/> +<attribute name="VALUE" x="45.72" y="185.42" size="1.778" layer="96"/> +<attribute name="DIELECTRIC" x="45.72" y="182.88" size="1.6764" layer="96"/> +</instance> +<instance part="SUPPLY18" gate="GND" x="55.88" y="177.8"/> +<instance part="SUPPLY19" gate="GND" x="96.52" y="177.8"/> +<instance part="U$2" gate="G$1" x="317.5" y="210.82" rot="R180"/> +<instance part="SUPPLY28" gate="GND" x="160.02" y="147.32"/> +<instance part="R10" gate="G$1" x="160.02" y="157.48" rot="R90"/> +<instance part="C40" gate="G$1" x="317.5" y="193.04" smashed="yes"> +<attribute name="NAME" x="308.61" y="194.31" size="1.778" layer="95" font="vector"/> +<attribute name="VALUE" x="308.61" y="191.77" size="1.778" layer="96" font="vector"/> +<attribute name="DIELECTRIC" x="317.5" y="193.04" size="1.778" layer="96" display="off"/> +<attribute name="RATED_VOLTAGE" x="317.5" y="193.04" size="1.778" layer="96" display="off"/> +</instance> +<instance part="SUPPLY29" gate="GND" x="317.5" y="185.42"/> +<instance part="R12" gate="G$1" x="63.5" y="180.34" rot="R90"/> +<instance part="SUPPLY42" gate="GND" x="302.26" y="185.42"/> +<instance part="P+16" gate="VCC" x="294.64" y="223.52" smashed="yes"/> +<instance part="P+17" gate="VCC" x="160.02" y="220.98" smashed="yes"/> +<instance part="LED5" gate="G$1" x="335.28" y="144.78" smashed="yes" rot="R90"> +<attribute name="VALUE" x="364.49" y="146.05" size="1.778" layer="96" rot="R180"/> +</instance> +<instance part="LED6" gate="G$1" x="330.2" y="142.24" smashed="yes" rot="R90"> +<attribute name="VALUE" x="364.49" y="143.51" size="1.778" layer="96" rot="R180"/> +</instance> +<instance part="LED7" gate="G$1" x="335.28" y="139.7" smashed="yes" rot="R90"> +<attribute name="VALUE" x="364.49" y="140.97" size="1.778" layer="96" rot="R180"/> +</instance> +<instance part="LED8" gate="G$1" x="330.2" y="137.16" smashed="yes" rot="R90"> +<attribute name="VALUE" x="364.49" y="138.43" size="1.778" layer="96" rot="R180"/> +</instance> +<instance part="R8" gate="A" x="314.96" y="137.16" rot="R180"/> +<instance part="SUPPLY43" gate="GND" x="342.9" y="132.08"/> +<instance part="Q4" gate="G$1" x="76.2" y="190.5"> +<attribute name="MPN" x="76.2" y="190.5" size="1.778" layer="96" display="off"/> +<attribute name="OC_FARNELL" x="76.2" y="190.5" size="1.778" layer="96" display="off"/> +</instance> +<instance part="SUPPLY2" gate="GND" x="71.12" y="177.8"/> +<instance part="SUPPLY3" gate="GND" x="81.28" y="177.8"/> +<instance part="C6" gate="G$1" x="294.64" y="205.74" smashed="yes"> +<attribute name="NAME" x="285.75" y="207.01" size="1.778" layer="95" font="vector"/> +<attribute name="VALUE" x="285.75" y="204.47" size="1.778" layer="96" font="vector"/> +<attribute name="DIELECTRIC" x="294.64" y="205.74" size="1.778" layer="96" display="off"/> +<attribute name="RATED_VOLTAGE" x="294.64" y="205.74" size="1.778" layer="96" display="off"/> +</instance> +<instance part="SUPPLY5" gate="GND" x="294.64" y="185.42"/> +<instance part="FRAME3" gate="G$1" x="5.08" y="43.18"/> </instances> <busses> -<bus name="FMC_D[0..31],FMC_A[0..25]"> -<segment> -<wire x1="144.78" y1="38.1" x2="144.78" y2="-35.56" width="0.762" layer="92"/> -<wire x1="144.78" y1="38.1" x2="116.84" y2="38.1" width="0.762" layer="92"/> -<label x="114.3" y="40.64" size="1.778" layer="95"/> -</segment> -<segment> -<wire x1="147.32" y1="195.58" x2="147.32" y2="114.3" width="0.762" layer="92"/> -<wire x1="147.32" y1="195.58" x2="134.62" y2="195.58" width="0.762" layer="92"/> -<label x="134.62" y="198.12" size="1.778" layer="95"/> -</segment> -<segment> -<wire x1="294.64" y1="195.58" x2="294.64" y2="114.3" width="0.762" layer="92"/> -<label x="294.64" y="198.12" size="1.778" layer="95"/> -<wire x1="294.64" y1="195.58" x2="332.74" y2="195.58" width="0.762" layer="92"/> -</segment> -<segment> -<wire x1="294.64" y1="35.56" x2="294.64" y2="20.32" width="0.762" layer="92"/> -<label x="279.4" y="38.1" size="1.778" layer="95"/> -<wire x1="294.64" y1="35.56" x2="317.5" y2="35.56" width="0.762" layer="92"/> -</segment> -<segment> -<wire x1="-15.24" y1="187.96" x2="-15.24" y2="121.92" width="0.762" layer="92"/> -<label x="-48.26" y="190.5" size="1.778" layer="95"/> -<wire x1="-15.24" y1="187.96" x2="-48.26" y2="187.96" width="0.762" layer="92"/> -</segment> -<segment> -<wire x1="116.84" y1="38.1" x2="116.84" y2="-35.56" width="0.762" layer="92"/> -</segment> -<segment> -<wire x1="-7.62" y1="-5.08" x2="-7.62" y2="-35.56" width="0.762" layer="92"/> -<label x="-45.72" y="-33.02" size="1.778" layer="95"/> -<wire x1="-7.62" y1="-35.56" x2="-45.72" y2="-35.56" width="0.762" layer="92"/> -</segment> -</bus> </busses> <nets> <net name="GND" class="1"> <segment> <pinref part="C15" gate="G$1" pin="1"/> -<wire x1="342.9" y1="30.48" x2="342.9" y2="27.94" width="0.1524" layer="91"/> +<wire x1="55.88" y1="182.88" x2="55.88" y2="180.34" width="0.1524" layer="91"/> <pinref part="SUPPLY18" gate="GND" pin="GND"/> </segment> <segment> -<wire x1="383.54" y1="30.48" x2="383.54" y2="27.94" width="0.1524" layer="91"/> +<wire x1="96.52" y1="182.88" x2="96.52" y2="180.34" width="0.1524" layer="91"/> <pinref part="SUPPLY19" gate="GND" pin="GND"/> <pinref part="C14" gate="G$1" pin="1"/> </segment> <segment> -<pinref part="U$1" gate="G$2" pin="VSS@60"/> -<wire x1="40.64" y1="-48.26" x2="40.64" y2="-53.34" width="0.1524" layer="91"/> -<pinref part="U$1" gate="G$2" pin="VSS@93"/> -<wire x1="40.64" y1="-53.34" x2="45.72" y2="-53.34" width="0.1524" layer="91"/> -<wire x1="45.72" y1="-53.34" x2="53.34" y2="-53.34" width="0.1524" layer="91"/> -<wire x1="53.34" y1="-53.34" x2="60.96" y2="-53.34" width="0.1524" layer="91"/> -<wire x1="60.96" y1="-53.34" x2="66.04" y2="-53.34" width="0.1524" layer="91"/> -<wire x1="66.04" y1="-53.34" x2="66.04" y2="-48.26" width="0.1524" layer="91"/> -<pinref part="U$1" gate="G$2" pin="VSS@82"/> -<wire x1="60.96" y1="-48.26" x2="60.96" y2="-53.34" width="0.1524" layer="91"/> -<junction x="60.96" y="-53.34"/> -<pinref part="U$1" gate="G$2" pin="VSS@72"/> -<wire x1="45.72" y1="-48.26" x2="45.72" y2="-53.34" width="0.1524" layer="91"/> -<junction x="45.72" y="-53.34"/> -<pinref part="SUPPLY22" gate="GND" pin="GND"/> -<junction x="53.34" y="-53.34"/> -</segment> -<segment> -<pinref part="U$1" gate="G$4" pin="VSS@170"/> -<pinref part="SUPPLY21" gate="GND" pin="GND"/> -<wire x1="218.44" y1="-50.8" x2="218.44" y2="-55.88" width="0.1524" layer="91"/> -<wire x1="218.44" y1="-55.88" x2="228.6" y2="-55.88" width="0.1524" layer="91"/> -<pinref part="U$1" gate="G$4" pin="VSS@202"/> -<wire x1="228.6" y1="-55.88" x2="233.68" y2="-55.88" width="0.1524" layer="91"/> -<wire x1="233.68" y1="-55.88" x2="238.76" y2="-55.88" width="0.1524" layer="91"/> -<wire x1="238.76" y1="-55.88" x2="238.76" y2="-50.8" width="0.1524" layer="91"/> -<junction x="228.6" y="-55.88"/> -<pinref part="U$1" gate="G$4" pin="VSS@184"/> -<wire x1="233.68" y1="-50.8" x2="233.68" y2="-55.88" width="0.1524" layer="91"/> -<junction x="233.68" y="-55.88"/> -</segment> -<segment> -<pinref part="U$1" gate="G$3" pin="VSS@149"/> -<pinref part="SUPPLY20" gate="GND" pin="GND"/> -<wire x1="238.76" y1="99.06" x2="238.76" y2="91.44" width="0.1524" layer="91"/> -<wire x1="238.76" y1="91.44" x2="233.68" y2="91.44" width="0.1524" layer="91"/> -<pinref part="U$1" gate="G$3" pin="VSS@136"/> -<wire x1="233.68" y1="91.44" x2="226.06" y2="91.44" width="0.1524" layer="91"/> -<wire x1="233.68" y1="99.06" x2="233.68" y2="91.44" width="0.1524" layer="91"/> -<junction x="233.68" y="91.44"/> -<pinref part="U$1" gate="G$3" pin="VSS@125"/> -<wire x1="218.44" y1="99.06" x2="218.44" y2="91.44" width="0.1524" layer="91"/> -<wire x1="218.44" y1="91.44" x2="226.06" y2="91.44" width="0.1524" layer="91"/> -<junction x="226.06" y="91.44"/> -<pinref part="U$1" gate="G$3" pin="VSS@114"/> -<wire x1="213.36" y1="99.06" x2="213.36" y2="91.44" width="0.1524" layer="91"/> -<wire x1="213.36" y1="91.44" x2="218.44" y2="91.44" width="0.1524" layer="91"/> -<junction x="218.44" y="91.44"/> -</segment> -<segment> -<pinref part="U$1" gate="G$1" pin="VSS@14"/> -<pinref part="SUPPLY24" gate="GND" pin="GND"/> -<wire x1="40.64" y1="99.06" x2="40.64" y2="91.44" width="0.1524" layer="91"/> -<wire x1="40.64" y1="91.44" x2="45.72" y2="91.44" width="0.1524" layer="91"/> -<pinref part="U$1" gate="G$1" pin="VSS@25"/> -<wire x1="45.72" y1="91.44" x2="53.34" y2="91.44" width="0.1524" layer="91"/> -<wire x1="45.72" y1="99.06" x2="45.72" y2="91.44" width="0.1524" layer="91"/> -<junction x="45.72" y="91.44"/> -<pinref part="U$1" gate="G$1" pin="VSSA@40"/> -<wire x1="60.96" y1="99.06" x2="60.96" y2="91.44" width="0.1524" layer="91"/> -<wire x1="60.96" y1="91.44" x2="53.34" y2="91.44" width="0.1524" layer="91"/> -<junction x="53.34" y="91.44"/> -<pinref part="U$1" gate="G$1" pin="VSS@51"/> -<wire x1="66.04" y1="99.06" x2="66.04" y2="91.44" width="0.1524" layer="91"/> -<wire x1="66.04" y1="91.44" x2="60.96" y2="91.44" width="0.1524" layer="91"/> -<junction x="60.96" y="91.44"/> -</segment> -<segment> -<pinref part="C16" gate="G$1" pin="2"/> -<wire x1="345.44" y1="134.62" x2="345.44" y2="132.08" width="0.1524" layer="91"/> -<wire x1="345.44" y1="132.08" x2="350.52" y2="132.08" width="0.1524" layer="91"/> -<pinref part="SUPPLY25" gate="GND" pin="GND"/> -<wire x1="350.52" y1="132.08" x2="350.52" y2="127" width="0.1524" layer="91"/> -<pinref part="C17" gate="G$1" pin="2"/> -<wire x1="355.6" y1="134.62" x2="355.6" y2="132.08" width="0.1524" layer="91"/> -<wire x1="355.6" y1="132.08" x2="350.52" y2="132.08" width="0.1524" layer="91"/> -<junction x="350.52" y="132.08"/> -</segment> -<segment> -<pinref part="C18" gate="G$1" pin="2"/> -<pinref part="C29" gate="G$1" pin="2"/> -<wire x1="449.58" y1="144.78" x2="444.5" y2="144.78" width="0.1524" layer="91"/> -<pinref part="SUPPLY26" gate="GND" pin="GND"/> -<wire x1="444.5" y1="144.78" x2="439.42" y2="144.78" width="0.1524" layer="91"/> -<wire x1="439.42" y1="144.78" x2="434.34" y2="144.78" width="0.1524" layer="91"/> -<wire x1="434.34" y1="144.78" x2="429.26" y2="144.78" width="0.1524" layer="91"/> -<wire x1="429.26" y1="144.78" x2="424.18" y2="144.78" width="0.1524" layer="91"/> -<wire x1="424.18" y1="144.78" x2="419.1" y2="144.78" width="0.1524" layer="91"/> -<wire x1="419.1" y1="144.78" x2="414.02" y2="144.78" width="0.1524" layer="91"/> -<wire x1="414.02" y1="144.78" x2="408.94" y2="144.78" width="0.1524" layer="91"/> -<wire x1="408.94" y1="144.78" x2="403.86" y2="144.78" width="0.1524" layer="91"/> -<wire x1="403.86" y1="144.78" x2="403.86" y2="132.08" width="0.1524" layer="91"/> -<junction x="403.86" y="144.78"/> -<wire x1="403.86" y1="132.08" x2="403.86" y2="124.46" width="0.1524" layer="91"/> -<junction x="403.86" y="132.08"/> -<pinref part="C19" gate="G$1" pin="2"/> -<junction x="444.5" y="144.78"/> -<pinref part="C20" gate="G$1" pin="2"/> -<junction x="439.42" y="144.78"/> -<pinref part="C21" gate="G$1" pin="2"/> -<junction x="434.34" y="144.78"/> -<pinref part="C22" gate="G$1" pin="2"/> -<junction x="429.26" y="144.78"/> -<pinref part="C23" gate="G$1" pin="2"/> -<junction x="424.18" y="144.78"/> -<pinref part="C24" gate="G$1" pin="2"/> -<junction x="419.1" y="144.78"/> -<pinref part="C25" gate="G$1" pin="2"/> -<junction x="414.02" y="144.78"/> -<pinref part="C28" gate="G$1" pin="2"/> -<junction x="408.94" y="144.78"/> -<pinref part="C31" gate="G$1" pin="2"/> -<wire x1="449.58" y1="132.08" x2="444.5" y2="132.08" width="0.1524" layer="91"/> -<pinref part="C32" gate="G$1" pin="2"/> -<junction x="444.5" y="132.08"/> -<wire x1="444.5" y1="132.08" x2="439.42" y2="132.08" width="0.1524" layer="91"/> -<pinref part="C33" gate="G$1" pin="2"/> -<junction x="439.42" y="132.08"/> -<wire x1="439.42" y1="132.08" x2="434.34" y2="132.08" width="0.1524" layer="91"/> -<pinref part="C34" gate="G$1" pin="2"/> -<junction x="434.34" y="132.08"/> -<wire x1="434.34" y1="132.08" x2="429.26" y2="132.08" width="0.1524" layer="91"/> -<pinref part="C35" gate="G$1" pin="2"/> -<junction x="429.26" y="132.08"/> -<wire x1="429.26" y1="132.08" x2="424.18" y2="132.08" width="0.1524" layer="91"/> -<pinref part="C36" gate="G$1" pin="2"/> -<junction x="424.18" y="132.08"/> -<wire x1="424.18" y1="132.08" x2="419.1" y2="132.08" width="0.1524" layer="91"/> -<pinref part="C37" gate="G$1" pin="2"/> -<junction x="419.1" y="132.08"/> -<wire x1="419.1" y1="132.08" x2="414.02" y2="132.08" width="0.1524" layer="91"/> -<pinref part="C26" gate="G$1" pin="2"/> -<junction x="414.02" y="132.08"/> -<wire x1="414.02" y1="132.08" x2="408.94" y2="132.08" width="0.1524" layer="91"/> -<pinref part="C27" gate="G$1" pin="2"/> -<junction x="408.94" y="132.08"/> -<wire x1="408.94" y1="132.08" x2="403.86" y2="132.08" width="0.1524" layer="91"/> -</segment> -<segment> -<pinref part="SUPPLY27" gate="GND" pin="GND"/> -<pinref part="C30" gate="G$1" pin="2"/> -<wire x1="96.52" y1="205.74" x2="96.52" y2="203.2" width="0.1524" layer="91"/> -</segment> -<segment> <pinref part="R10" gate="G$1" pin="1"/> <pinref part="SUPPLY28" gate="GND" pin="GND"/> -<wire x1="274.32" y1="-53.34" x2="274.32" y2="-55.88" width="0.1524" layer="91"/> +<wire x1="160.02" y1="152.4" x2="160.02" y2="149.86" width="0.1524" layer="91"/> </segment> <segment> <pinref part="SUPPLY29" gate="GND" pin="GND"/> @@ -38064,1152 +37673,1462 @@ available GPIO on the ARM</text> <segment> <pinref part="U$2" gate="G$1" pin="GND"/> <pinref part="SUPPLY42" gate="GND" pin="GND"/> -<wire x1="436.88" y1="40.64" x2="421.64" y2="40.64" width="0.1524" layer="91"/> -<wire x1="421.64" y1="40.64" x2="421.64" y2="17.78" width="0.1524" layer="91"/> +<wire x1="317.5" y1="210.82" x2="302.26" y2="210.82" width="0.1524" layer="91"/> +<wire x1="302.26" y1="210.82" x2="302.26" y2="187.96" width="0.1524" layer="91"/> </segment> <segment> <pinref part="LED5" gate="G$1" pin="C"/> -<wire x1="439.42" y1="-20.32" x2="441.96" y2="-20.32" width="0.1524" layer="91"/> -<wire x1="441.96" y1="-22.86" x2="441.96" y2="-20.32" width="0.1524" layer="91"/> +<wire x1="340.36" y1="144.78" x2="342.9" y2="144.78" width="0.1524" layer="91"/> +<wire x1="342.9" y1="142.24" x2="342.9" y2="144.78" width="0.1524" layer="91"/> <pinref part="LED6" gate="G$1" pin="C"/> -<wire x1="434.34" y1="-22.86" x2="441.96" y2="-22.86" width="0.1524" layer="91"/> -<junction x="441.96" y="-22.86"/> -<wire x1="441.96" y1="-25.4" x2="441.96" y2="-22.86" width="0.1524" layer="91"/> +<wire x1="335.28" y1="142.24" x2="342.9" y2="142.24" width="0.1524" layer="91"/> +<junction x="342.9" y="142.24"/> +<wire x1="342.9" y1="139.7" x2="342.9" y2="142.24" width="0.1524" layer="91"/> <pinref part="LED7" gate="G$1" pin="C"/> -<wire x1="439.42" y1="-25.4" x2="441.96" y2="-25.4" width="0.1524" layer="91"/> -<junction x="441.96" y="-25.4"/> +<wire x1="340.36" y1="139.7" x2="342.9" y2="139.7" width="0.1524" layer="91"/> +<junction x="342.9" y="139.7"/> <pinref part="LED8" gate="G$1" pin="C"/> -<wire x1="434.34" y1="-27.94" x2="441.96" y2="-27.94" width="0.1524" layer="91"/> -<wire x1="441.96" y1="-27.94" x2="441.96" y2="-25.4" width="0.1524" layer="91"/> +<wire x1="335.28" y1="137.16" x2="342.9" y2="137.16" width="0.1524" layer="91"/> +<wire x1="342.9" y1="137.16" x2="342.9" y2="139.7" width="0.1524" layer="91"/> <pinref part="SUPPLY43" gate="GND" pin="GND"/> -<wire x1="441.96" y1="-30.48" x2="441.96" y2="-27.94" width="0.1524" layer="91"/> -<junction x="441.96" y="-27.94"/> +<wire x1="342.9" y1="134.62" x2="342.9" y2="137.16" width="0.1524" layer="91"/> +<junction x="342.9" y="137.16"/> </segment> <segment> <pinref part="Q4" gate="G$1" pin="G1"/> <pinref part="SUPPLY2" gate="GND" pin="GND"/> -<wire x1="358.14" y1="30.48" x2="358.14" y2="27.94" width="0.1524" layer="91"/> +<wire x1="71.12" y1="182.88" x2="71.12" y2="180.34" width="0.1524" layer="91"/> </segment> <segment> <pinref part="Q4" gate="G$1" pin="G2"/> <pinref part="SUPPLY3" gate="GND" pin="GND"/> -<wire x1="368.3" y1="30.48" x2="368.3" y2="27.94" width="0.1524" layer="91"/> +<wire x1="81.28" y1="182.88" x2="81.28" y2="180.34" width="0.1524" layer="91"/> </segment> <segment> <pinref part="C6" gate="G$1" pin="2"/> <pinref part="SUPPLY5" gate="GND" pin="GND"/> -<wire x1="414.02" y1="30.48" x2="414.02" y2="17.78" width="0.1524" layer="91"/> +<wire x1="294.64" y1="200.66" x2="294.64" y2="187.96" width="0.1524" layer="91"/> </segment> </net> <net name="VCCO_3V3" class="0"> <segment> -<pinref part="U$1" gate="G$4" pin="VDD@158"/> -<wire x1="205.74" y1="58.42" x2="205.74" y2="66.04" width="0.1524" layer="91"/> -<wire x1="205.74" y1="66.04" x2="210.82" y2="66.04" width="0.1524" layer="91"/> -<wire x1="210.82" y1="66.04" x2="226.06" y2="66.04" width="0.1524" layer="91"/> -<pinref part="U$1" gate="G$4" pin="VDD@204"/> -<wire x1="226.06" y1="71.12" x2="226.06" y2="66.04" width="0.1524" layer="91"/> -<wire x1="246.38" y1="58.42" x2="246.38" y2="66.04" width="0.1524" layer="91"/> -<wire x1="246.38" y1="66.04" x2="241.3" y2="66.04" width="0.1524" layer="91"/> -<junction x="226.06" y="66.04"/> -<pinref part="U$1" gate="G$4" pin="VDD@185"/> -<wire x1="241.3" y1="66.04" x2="226.06" y2="66.04" width="0.1524" layer="91"/> -<wire x1="241.3" y1="58.42" x2="241.3" y2="66.04" width="0.1524" layer="91"/> -<junction x="241.3" y="66.04"/> -<pinref part="U$1" gate="G$4" pin="VDD@171"/> -<wire x1="210.82" y1="58.42" x2="210.82" y2="66.04" width="0.1524" layer="91"/> -<junction x="210.82" y="66.04"/> -<pinref part="P+8" gate="VCC" pin="VCC"/> -<label x="228.6" y="71.12" size="1.778" layer="95"/> +<pinref part="U$2" gate="G$1" pin="VCC"/> +<wire x1="317.5" y1="213.36" x2="294.64" y2="213.36" width="0.1524" layer="91"/> +<wire x1="294.64" y1="213.36" x2="294.64" y2="220.98" width="0.1524" layer="91"/> +<pinref part="P+16" gate="VCC" pin="VCC"/> +<label x="297.18" y="220.98" size="1.778" layer="95"/> +<pinref part="C6" gate="G$1" pin="1"/> +<wire x1="294.64" y1="208.28" x2="294.64" y2="213.36" width="0.1524" layer="91"/> +<junction x="294.64" y="213.36"/> </segment> <segment> -<pinref part="C29" gate="G$1" pin="1"/> -<wire x1="403.86" y1="157.48" x2="403.86" y2="158.75" width="0.1524" layer="91"/> -<pinref part="C18" gate="G$1" pin="1"/> -<wire x1="403.86" y1="158.75" x2="403.86" y2="152.4" width="0.1524" layer="91"/> -<wire x1="403.86" y1="152.4" x2="408.94" y2="152.4" width="0.1524" layer="91"/> -<junction x="403.86" y="152.4"/> -<wire x1="408.94" y1="152.4" x2="414.02" y2="152.4" width="0.1524" layer="91"/> -<wire x1="414.02" y1="152.4" x2="419.1" y2="152.4" width="0.1524" layer="91"/> -<wire x1="419.1" y1="152.4" x2="424.18" y2="152.4" width="0.1524" layer="91"/> -<wire x1="424.18" y1="152.4" x2="429.26" y2="152.4" width="0.1524" layer="91"/> -<wire x1="429.26" y1="152.4" x2="434.34" y2="152.4" width="0.1524" layer="91"/> -<wire x1="434.34" y1="152.4" x2="439.42" y2="152.4" width="0.1524" layer="91"/> -<wire x1="439.42" y1="152.4" x2="444.5" y2="152.4" width="0.1524" layer="91"/> -<wire x1="444.5" y1="152.4" x2="449.58" y2="152.4" width="0.1524" layer="91"/> -<wire x1="449.58" y1="152.4" x2="454.66" y2="152.4" width="0.1524" layer="91"/> -<junction x="449.58" y="152.4"/> -<wire x1="454.66" y1="152.4" x2="454.66" y2="139.7" width="0.1524" layer="91"/> -<pinref part="C27" gate="G$1" pin="1"/> -<wire x1="454.66" y1="139.7" x2="449.58" y2="139.7" width="0.1524" layer="91"/> -<pinref part="C28" gate="G$1" pin="1"/> -<junction x="408.94" y="152.4"/> -<pinref part="C25" gate="G$1" pin="1"/> -<junction x="414.02" y="152.4"/> -<pinref part="C24" gate="G$1" pin="1"/> -<junction x="419.1" y="152.4"/> -<pinref part="C23" gate="G$1" pin="1"/> -<junction x="424.18" y="152.4"/> -<pinref part="C22" gate="G$1" pin="1"/> -<junction x="429.26" y="152.4"/> -<pinref part="C21" gate="G$1" pin="1"/> -<junction x="434.34" y="152.4"/> -<pinref part="C20" gate="G$1" pin="1"/> -<junction x="439.42" y="152.4"/> -<pinref part="C19" gate="G$1" pin="1"/> -<junction x="444.5" y="152.4"/> -<pinref part="C26" gate="G$1" pin="1"/> -<junction x="414.02" y="139.7"/> -<wire x1="449.58" y1="139.7" x2="444.5" y2="139.7" width="0.1524" layer="91"/> -<wire x1="444.5" y1="139.7" x2="439.42" y2="139.7" width="0.1524" layer="91"/> -<wire x1="439.42" y1="139.7" x2="434.34" y2="139.7" width="0.1524" layer="91"/> -<wire x1="434.34" y1="139.7" x2="429.26" y2="139.7" width="0.1524" layer="91"/> -<wire x1="429.26" y1="139.7" x2="424.18" y2="139.7" width="0.1524" layer="91"/> -<wire x1="424.18" y1="139.7" x2="419.1" y2="139.7" width="0.1524" layer="91"/> -<wire x1="419.1" y1="139.7" x2="414.02" y2="139.7" width="0.1524" layer="91"/> -<wire x1="414.02" y1="139.7" x2="408.94" y2="139.7" width="0.1524" layer="91"/> -<pinref part="C37" gate="G$1" pin="1"/> -<junction x="419.1" y="139.7"/> -<pinref part="C36" gate="G$1" pin="1"/> -<junction x="424.18" y="139.7"/> -<pinref part="C35" gate="G$1" pin="1"/> -<junction x="429.26" y="139.7"/> -<pinref part="C34" gate="G$1" pin="1"/> -<junction x="434.34" y="139.7"/> -<pinref part="C33" gate="G$1" pin="1"/> -<junction x="439.42" y="139.7"/> -<pinref part="C32" gate="G$1" pin="1"/> -<junction x="444.5" y="139.7"/> -<pinref part="C31" gate="G$1" pin="1"/> -<junction x="449.58" y="139.7"/> -<pinref part="P+11" gate="VCC" pin="VCC"/> -<junction x="403.86" y="158.75"/> -<label x="396.24" y="165.1" size="1.778" layer="95"/> -</segment> -<segment> -<pinref part="U$1" gate="G$2" pin="VDD@59"/> -<wire x1="33.02" y1="60.96" x2="33.02" y2="68.58" width="0.1524" layer="91"/> -<wire x1="33.02" y1="68.58" x2="38.1" y2="68.58" width="0.1524" layer="91"/> -<wire x1="38.1" y1="68.58" x2="53.34" y2="68.58" width="0.1524" layer="91"/> -<wire x1="53.34" y1="68.58" x2="53.34" y2="73.66" width="0.1524" layer="91"/> -<pinref part="U$1" gate="G$2" pin="VDD@103"/> -<wire x1="76.2" y1="60.96" x2="76.2" y2="68.58" width="0.1524" layer="91"/> -<wire x1="76.2" y1="68.58" x2="71.12" y2="68.58" width="0.1524" layer="91"/> -<junction x="53.34" y="68.58"/> -<pinref part="U$1" gate="G$2" pin="VDD@94"/> -<wire x1="71.12" y1="68.58" x2="66.04" y2="68.58" width="0.1524" layer="91"/> -<wire x1="66.04" y1="68.58" x2="53.34" y2="68.58" width="0.1524" layer="91"/> -<wire x1="71.12" y1="60.96" x2="71.12" y2="68.58" width="0.1524" layer="91"/> -<junction x="71.12" y="68.58"/> -<pinref part="U$1" gate="G$2" pin="VDD@83"/> -<wire x1="66.04" y1="60.96" x2="66.04" y2="68.58" width="0.1524" layer="91"/> -<junction x="66.04" y="68.58"/> -<pinref part="U$1" gate="G$2" pin="VDD@73"/> -<wire x1="38.1" y1="60.96" x2="38.1" y2="68.58" width="0.1524" layer="91"/> -<junction x="38.1" y="68.58"/> -<pinref part="P+9" gate="VCC" pin="VCC"/> -<label x="55.88" y="73.66" size="1.778" layer="95"/> -</segment> -<segment> -<pinref part="U$1" gate="G$1" pin="VBAT@6"/> -<wire x1="27.94" y1="208.28" x2="27.94" y2="215.9" width="0.1524" layer="91"/> -<wire x1="27.94" y1="215.9" x2="35.56" y2="215.9" width="0.1524" layer="91"/> -<wire x1="35.56" y1="215.9" x2="40.64" y2="215.9" width="0.1524" layer="91"/> -<wire x1="40.64" y1="215.9" x2="53.34" y2="215.9" width="0.1524" layer="91"/> -<wire x1="53.34" y1="215.9" x2="53.34" y2="220.98" width="0.1524" layer="91"/> -<pinref part="U$1" gate="G$1" pin="VDD@52"/> -<wire x1="73.66" y1="208.28" x2="73.66" y2="215.9" width="0.1524" layer="91"/> -<junction x="53.34" y="215.9"/> -<wire x1="73.66" y1="215.9" x2="68.58" y2="215.9" width="0.1524" layer="91"/> -<wire x1="68.58" y1="215.9" x2="53.34" y2="215.9" width="0.1524" layer="91"/> -<pinref part="U$1" gate="G$1" pin="VDD@39"/> -<wire x1="68.58" y1="208.28" x2="68.58" y2="215.9" width="0.1524" layer="91"/> -<junction x="68.58" y="215.9"/> -<pinref part="U$1" gate="G$1" pin="VDD@26"/> -<wire x1="40.64" y1="208.28" x2="40.64" y2="215.9" width="0.1524" layer="91"/> -<junction x="40.64" y="215.9"/> -<pinref part="U$1" gate="G$1" pin="VDD@15"/> -<wire x1="35.56" y1="208.28" x2="35.56" y2="215.9" width="0.1524" layer="91"/> -<junction x="35.56" y="215.9"/> -<pinref part="P+5" gate="VCC" pin="VCC"/> -<label x="55.88" y="220.98" size="1.778" layer="95"/> -</segment> -<segment> -<pinref part="U$1" gate="G$1" pin="VDDA@42"/> -<wire x1="81.28" y1="208.28" x2="81.28" y2="215.9" width="0.1524" layer="91"/> -<wire x1="81.28" y1="215.9" x2="81.28" y2="220.98" width="0.1524" layer="91"/> -<wire x1="81.28" y1="215.9" x2="96.52" y2="215.9" width="0.1524" layer="91"/> -<wire x1="96.52" y1="215.9" x2="96.52" y2="213.36" width="0.1524" layer="91"/> -<pinref part="C30" gate="G$1" pin="1"/> -<junction x="81.28" y="215.9"/> -<pinref part="P+12" gate="VCC" pin="VCC"/> -<label x="83.82" y="220.98" size="1.778" layer="95"/> -</segment> -<segment> -<pinref part="U$1" gate="G$3" pin="VDD@115"/> -<wire x1="205.74" y1="208.28" x2="205.74" y2="215.9" width="0.1524" layer="91"/> -<wire x1="205.74" y1="215.9" x2="210.82" y2="215.9" width="0.1524" layer="91"/> -<wire x1="210.82" y1="215.9" x2="226.06" y2="215.9" width="0.1524" layer="91"/> -<wire x1="226.06" y1="215.9" x2="226.06" y2="220.98" width="0.1524" layer="91"/> -<pinref part="U$1" gate="G$3" pin="VDD@150"/> -<wire x1="246.38" y1="208.28" x2="246.38" y2="215.9" width="0.1524" layer="91"/> -<wire x1="246.38" y1="215.9" x2="241.3" y2="215.9" width="0.1524" layer="91"/> -<junction x="226.06" y="215.9"/> -<pinref part="U$1" gate="G$3" pin="VDD@137"/> -<wire x1="241.3" y1="215.9" x2="226.06" y2="215.9" width="0.1524" layer="91"/> -<wire x1="241.3" y1="208.28" x2="241.3" y2="215.9" width="0.1524" layer="91"/> -<junction x="241.3" y="215.9"/> -<pinref part="U$1" gate="G$3" pin="VDD@124"/> -<wire x1="210.82" y1="208.28" x2="210.82" y2="215.9" width="0.1524" layer="91"/> -<junction x="210.82" y="215.9"/> -<pinref part="P+6" gate="VCC" pin="VCC"/> -<label x="228.6" y="220.98" size="1.778" layer="95"/> +<pinref part="P+17" gate="VCC" pin="VCC"/> +<label x="162.56" y="218.44" size="1.778" layer="95"/> +<pinref part="U$1" gate="CFG" pin="VREF+@41"/> +<wire x1="167.64" y1="200.66" x2="160.02" y2="200.66" width="0.1524" layer="91"/> +<wire x1="160.02" y1="200.66" x2="160.02" y2="218.44" width="0.1524" layer="91"/> +<junction x="160.02" y="200.66"/> +<pinref part="U$1" gate="CFG" pin="PDR_ON@203"/> +<wire x1="167.64" y1="195.58" x2="160.02" y2="195.58" width="0.1524" layer="91"/> +<wire x1="160.02" y1="195.58" x2="160.02" y2="200.66" width="0.1524" layer="91"/> </segment> +</net> +<net name="OSC_OUT" class="0"> <segment> -<pinref part="C38" gate="G$1" pin="1"/> -<wire x1="274.32" y1="210.82" x2="274.32" y2="213.36" width="0.1524" layer="91"/> -<pinref part="P+13" gate="VCC" pin="VCC"/> -<wire x1="274.32" y1="213.36" x2="274.32" y2="220.98" width="0.1524" layer="91"/> -<pinref part="C57" gate="G$1" pin="1"/> -<wire x1="279.4" y1="210.82" x2="279.4" y2="213.36" width="0.1524" layer="91"/> -<wire x1="279.4" y1="213.36" x2="274.32" y2="213.36" width="0.1524" layer="91"/> -<junction x="274.32" y="213.36"/> -<label x="259.08" y="220.98" size="1.778" layer="95"/> +<wire x1="81.28" y1="190.5" x2="88.9" y2="190.5" width="0.1524" layer="91"/> +<pinref part="C14" gate="G$1" pin="2"/> +<wire x1="88.9" y1="190.5" x2="88.9" y2="162.56" width="0.1524" layer="91"/> +<wire x1="88.9" y1="190.5" x2="96.52" y2="190.5" width="0.1524" layer="91"/> +<junction x="88.9" y="190.5"/> +<label x="86.36" y="170.18" size="1.778" layer="95" rot="R270"/> +<pinref part="Q4" gate="G$1" pin="X2"/> </segment> <segment> -<pinref part="C39" gate="G$1" pin="1"/> -<wire x1="101.6" y1="66.04" x2="101.6" y2="68.58" width="0.1524" layer="91"/> -<pinref part="P+14" gate="VCC" pin="VCC"/> -<wire x1="101.6" y1="68.58" x2="101.6" y2="73.66" width="0.1524" layer="91"/> -<pinref part="C56" gate="G$1" pin="1"/> -<wire x1="106.68" y1="66.04" x2="106.68" y2="68.58" width="0.1524" layer="91"/> -<wire x1="106.68" y1="68.58" x2="101.6" y2="68.58" width="0.1524" layer="91"/> -<junction x="101.6" y="68.58"/> -<label x="86.36" y="73.66" size="1.778" layer="95"/> +<pinref part="U$1" gate="CFG" pin="OSC_OUT/PH1"/> +<wire x1="167.64" y1="182.88" x2="160.02" y2="182.88" width="0.1524" layer="91"/> +<label x="152.4" y="182.88" size="1.27" layer="95"/> </segment> +</net> +<net name="OSC_IN" class="0"> <segment> -<pinref part="U$1" gate="G$1" pin="VREF+@41"/> -<wire x1="96.52" y1="160.02" x2="124.46" y2="160.02" width="0.1524" layer="91"/> -<pinref part="P+15" gate="VCC" pin="VCC"/> -<wire x1="124.46" y1="163.83" x2="124.46" y2="160.02" width="0.1524" layer="91"/> -<label x="127" y="165.1" size="1.778" layer="95"/> +<pinref part="R12" gate="G$1" pin="1"/> +<wire x1="63.5" y1="175.26" x2="63.5" y2="162.56" width="0.1524" layer="91"/> +<label x="60.96" y="170.18" size="1.778" layer="95" rot="R270"/> </segment> <segment> -<pinref part="C16" gate="G$1" pin="1"/> -<wire x1="345.44" y1="142.24" x2="345.44" y2="144.78" width="0.1524" layer="91"/> -<wire x1="345.44" y1="144.78" x2="350.52" y2="144.78" width="0.1524" layer="91"/> -<wire x1="350.52" y1="144.78" x2="350.52" y2="149.86" width="0.1524" layer="91"/> -<pinref part="C17" gate="G$1" pin="1"/> -<wire x1="355.6" y1="142.24" x2="355.6" y2="144.78" width="0.1524" layer="91"/> -<wire x1="355.6" y1="144.78" x2="350.52" y2="144.78" width="0.1524" layer="91"/> -<junction x="350.52" y="144.78"/> -<pinref part="P+10" gate="VCC" pin="VCC"/> -<label x="353.06" y="149.86" size="1.778" layer="95"/> +<pinref part="U$1" gate="CFG" pin="OSC_IN/PH0"/> +<wire x1="167.64" y1="185.42" x2="160.02" y2="185.42" width="0.1524" layer="91"/> +<label x="152.4" y="185.42" size="1.27" layer="95"/> </segment> +</net> +<net name="SWDIO" class="0"> <segment> -<pinref part="U$2" gate="G$1" pin="VCC"/> -<wire x1="436.88" y1="43.18" x2="414.02" y2="43.18" width="0.1524" layer="91"/> -<wire x1="414.02" y1="43.18" x2="414.02" y2="50.8" width="0.1524" layer="91"/> -<pinref part="P+16" gate="VCC" pin="VCC"/> -<label x="416.56" y="50.8" size="1.778" layer="95"/> -<pinref part="C6" gate="G$1" pin="1"/> -<wire x1="414.02" y1="38.1" x2="414.02" y2="43.18" width="0.1524" layer="91"/> -<junction x="414.02" y="43.18"/> +<pinref part="U$2" gate="G$1" pin="SWDIO"/> +<wire x1="317.5" y1="208.28" x2="314.96" y2="208.28" width="0.1524" layer="91"/> +<label x="314.96" y="208.28" size="1.27" layer="95" rot="R180"/> </segment> <segment> -<pinref part="U$1" gate="G$4" pin="PDR_ON@203"/> -<wire x1="269.24" y1="17.78" x2="297.18" y2="17.78" width="0.1524" layer="91"/> -<wire x1="297.18" y1="17.78" x2="297.18" y2="22.86" width="0.1524" layer="91"/> -<pinref part="P+17" gate="VCC" pin="VCC"/> -<label x="299.72" y="22.86" size="1.778" layer="95"/> +<wire x1="226.06" y1="187.96" x2="233.68" y2="187.96" width="0.1524" layer="91"/> +<label x="233.68" y="187.96" size="1.27" layer="95"/> +<pinref part="U$1" gate="CFG" pin="PA13/JTMS-SWDIO"/> </segment> </net> -<net name="FMC_CLK" class="0"> +<net name="SWDCLK" class="0"> <segment> -<pinref part="U$1" gate="G$4" pin="PD3/FMC_CLK"/> -<wire x1="187.96" y1="10.16" x2="180.34" y2="10.16" width="0.1524" layer="91"/> -<label x="180.34" y="10.16" size="1.27" layer="95" rot="R180" xref="yes"/> +<pinref part="U$2" gate="G$1" pin="SWDCLK"/> +<wire x1="317.5" y1="205.74" x2="314.96" y2="205.74" width="0.1524" layer="91"/> +<label x="314.96" y="205.74" size="1.27" layer="95" rot="R180"/> +</segment> +<segment> +<pinref part="U$1" gate="CFG" pin="PA14/JTCK-SWCLK"/> +<wire x1="226.06" y1="190.5" x2="233.68" y2="190.5" width="0.1524" layer="91"/> +<label x="233.68" y="190.5" size="1.27" layer="95"/> </segment> </net> -<net name="FMC_D0" class="2"> +<net name="NRST" class="0"> <segment> -<pinref part="U$1" gate="G$3" pin="PD14/FMC_D0"/> -<wire x1="187.96" y1="157.48" x2="147.32" y2="157.48" width="0.1524" layer="91"/> +<pinref part="U$2" gate="G$1" pin="NRST"/> +<pinref part="C40" gate="G$1" pin="1"/> +<wire x1="317.5" y1="195.58" x2="317.5" y2="200.66" width="0.1524" layer="91"/> +<wire x1="317.5" y1="200.66" x2="314.96" y2="200.66" width="0.1524" layer="91"/> +<junction x="317.5" y="200.66"/> +<label x="314.96" y="200.66" size="1.27" layer="95" rot="R180"/> +</segment> +<segment> +<pinref part="U$1" gate="CFG" pin="NRST"/> +<wire x1="226.06" y1="193.04" x2="233.68" y2="193.04" width="0.1524" layer="91"/> +<label x="233.68" y="193.04" size="1.27" layer="95"/> </segment> </net> -<net name="FMC_D1" class="2"> +<net name="BOOT0" class="1"> <segment> -<pinref part="U$1" gate="G$3" pin="PD15/FMC_D1"/> -<wire x1="187.96" y1="154.94" x2="147.32" y2="154.94" width="0.1524" layer="91"/> +<pinref part="U$1" gate="CFG" pin="BOOT0@197"/> +<wire x1="167.64" y1="167.64" x2="160.02" y2="167.64" width="0.1524" layer="91"/> +<wire x1="160.02" y1="167.64" x2="160.02" y2="162.56" width="0.1524" layer="91"/> +<pinref part="R10" gate="G$1" pin="2"/> </segment> </net> -<net name="FMC_D13" class="2"> +<net name="N$21" class="0"> <segment> -<pinref part="U$1" gate="G$3" pin="PD8/FMC_D13"/> -<wire x1="187.96" y1="177.8" x2="147.32" y2="177.8" width="0.1524" layer="91"/> +<pinref part="C15" gate="G$1" pin="2"/> +<wire x1="71.12" y1="190.5" x2="63.5" y2="190.5" width="0.1524" layer="91"/> +<wire x1="63.5" y1="190.5" x2="55.88" y2="190.5" width="0.1524" layer="91"/> +<wire x1="63.5" y1="190.5" x2="63.5" y2="185.42" width="0.1524" layer="91"/> +<junction x="63.5" y="190.5"/> +<pinref part="R12" gate="G$1" pin="2"/> +<pinref part="Q4" gate="G$1" pin="X1"/> </segment> </net> -<net name="FMC_D14" class="2"> +<net name="ARM_LED1" class="0"> <segment> -<pinref part="U$1" gate="G$3" pin="PD9/FMC_D14"/> -<wire x1="187.96" y1="175.26" x2="147.32" y2="175.26" width="0.1524" layer="91"/> +<wire x1="304.8" y1="144.78" x2="299.72" y2="144.78" width="0.1524" layer="91"/> +<label x="299.72" y="144.78" size="1.27" layer="95" rot="R180"/> +<pinref part="R8" gate="A" pin="5"/> </segment> </net> -<net name="FMC_D15" class="2"> +<net name="ARM_LED2" class="0"> <segment> -<pinref part="U$1" gate="G$3" pin="PD10/FMC_D15"/> -<wire x1="187.96" y1="172.72" x2="147.32" y2="172.72" width="0.1524" layer="91"/> +<wire x1="304.8" y1="142.24" x2="299.72" y2="142.24" width="0.1524" layer="91"/> +<label x="299.72" y="142.24" size="1.27" layer="95" rot="R180"/> +<pinref part="R8" gate="A" pin="6"/> </segment> </net> -<net name="FMC_D22" class="2"> +<net name="ARM_LED3" class="0"> <segment> -<pinref part="U$1" gate="G$3" pin="FMC_D22/PH14"/> -<wire x1="294.64" y1="172.72" x2="266.7" y2="172.72" width="0.1524" layer="91"/> +<wire x1="304.8" y1="139.7" x2="299.72" y2="139.7" width="0.1524" layer="91"/> +<label x="299.72" y="139.7" size="1.27" layer="95" rot="R180"/> +<pinref part="R8" gate="A" pin="7"/> </segment> </net> -<net name="FMC_D23" class="2"> +<net name="ARM_LED4" class="0"> <segment> -<pinref part="U$1" gate="G$3" pin="FMC_D23/PH15"/> -<wire x1="294.64" y1="175.26" x2="266.7" y2="175.26" width="0.1524" layer="91"/> +<wire x1="304.8" y1="137.16" x2="299.72" y2="137.16" width="0.1524" layer="91"/> +<label x="299.72" y="137.16" size="1.27" layer="95" rot="R180"/> +<pinref part="R8" gate="A" pin="8"/> </segment> </net> -<net name="FMC_D24" class="2"> +<net name="N$17" class="0"> <segment> -<pinref part="U$1" gate="G$3" pin="FMC_D24/PI0"/> -<wire x1="294.64" y1="177.8" x2="266.7" y2="177.8" width="0.1524" layer="91"/> +<pinref part="LED5" gate="G$1" pin="A"/> +<wire x1="325.12" y1="144.78" x2="332.74" y2="144.78" width="0.1524" layer="91"/> +<pinref part="R8" gate="A" pin="4"/> </segment> </net> -<net name="FMC_D25" class="2"> +<net name="N$18" class="0"> <segment> -<pinref part="U$1" gate="G$3" pin="FMC_D25/PI1"/> -<wire x1="294.64" y1="180.34" x2="266.7" y2="180.34" width="0.1524" layer="91"/> +<pinref part="LED6" gate="G$1" pin="A"/> +<wire x1="325.12" y1="142.24" x2="327.66" y2="142.24" width="0.1524" layer="91"/> +<pinref part="R8" gate="A" pin="3"/> </segment> </net> -<net name="FMC_D26" class="2"> +<net name="N$19" class="0"> <segment> -<pinref part="U$1" gate="G$3" pin="FMC_D26/PI2"/> -<wire x1="294.64" y1="182.88" x2="266.7" y2="182.88" width="0.1524" layer="91"/> +<pinref part="LED7" gate="G$1" pin="A"/> +<wire x1="325.12" y1="139.7" x2="332.74" y2="139.7" width="0.1524" layer="91"/> +<pinref part="R8" gate="A" pin="2"/> </segment> </net> -<net name="FMC_A12" class="3"> +<net name="N$20" class="0"> <segment> -<pinref part="U$1" gate="G$3" pin="PG2/FMC_A12"/> -<wire x1="187.96" y1="124.46" x2="147.32" y2="124.46" width="0.1524" layer="91"/> +<pinref part="LED8" gate="G$1" pin="A"/> +<wire x1="325.12" y1="137.16" x2="327.66" y2="137.16" width="0.1524" layer="91"/> +<pinref part="R8" gate="A" pin="1"/> </segment> </net> -<net name="FMC_A13" class="3"> +</nets> +</sheet> +<sheet> +<description>ARM Power</description> +<plain> +<text x="114.3" y="20.32" size="1.778" layer="91">ST AN8844 §2.2 +One bypass capacitor for every VDD. +Use 0.1 uF X7R (X5R?) 10V.</text> +<text x="34.29" y="19.05" size="1.778" layer="91">ST AN8844 §2.2 +One 10uF bypass cap for the package. +(two used for extra comfort)</text> +<text x="-40.64" y="19.05" size="1.778" layer="91">2*2*2.2uF LowESR or +2*1*4.7uF LowESR +< 1 ohm +(ST AN4488 §2.2)</text> +<text x="-154.94" y="88.9" size="3.81" layer="91">Power and bypass capacitors, STM32</text> +</plain> +<instances> +<instance part="FRAME26" gate="G$1" x="-193.04" y="-129.54"/> +<instance part="C16" gate="G$1" x="48.26" y="-5.08" smashed="yes"> +<attribute name="NAME" x="44.45" y="-3.81" size="1.6764" layer="95" rot="R180"/> +<attribute name="VALUE" x="45.72" y="-6.35" size="1.6764" layer="96" rot="R180"/> +<attribute name="DIELECTRIC" x="48.26" y="-5.08" size="1.6764" layer="96" display="off"/> +<attribute name="RATED_VOLTAGE" x="48.26" y="-5.08" size="1.6764" layer="96" display="off"/> +</instance> +<instance part="C17" gate="G$1" x="58.42" y="-5.08" smashed="yes"> +<attribute name="NAME" x="62.23" y="-5.08" size="1.6764" layer="95"/> +<attribute name="VALUE" x="60.96" y="-7.62" size="1.6764" layer="96"/> +<attribute name="DIELECTRIC" x="58.42" y="-5.08" size="1.6764" layer="96" display="off"/> +<attribute name="RATED_VOLTAGE" x="58.42" y="-5.08" size="1.6764" layer="96" display="off"/> +</instance> +<instance part="SUPPLY25" gate="GND" x="53.34" y="-20.32"/> +<instance part="P+10" gate="VCC" x="53.34" y="7.62" smashed="yes"/> +<instance part="P+11" gate="VCC" x="106.68" y="19.05" smashed="yes"/> +<instance part="SUPPLY26" gate="GND" x="106.68" y="-20.32"/> +<instance part="C18" gate="G$1" x="152.4" y="7.62" smashed="yes"> +<attribute name="NAME" x="152.4" y="12.7" size="1.27" layer="95" font="vector"/> +<attribute name="VALUE" x="160.02" y="10.16" size="1.27" layer="96" font="vector"/> +</instance> +<instance part="C19" gate="G$1" x="147.32" y="7.62" smashed="yes"> +<attribute name="NAME" x="147.32" y="12.7" size="1.27" layer="95" font="vector"/> +</instance> +<instance part="C20" gate="G$1" x="142.24" y="7.62" smashed="yes"> +<attribute name="NAME" x="142.24" y="12.7" size="1.27" layer="95" font="vector"/> +</instance> +<instance part="C21" gate="G$1" x="137.16" y="7.62" smashed="yes"> +<attribute name="NAME" x="137.16" y="12.7" size="1.27" layer="95" font="vector"/> +</instance> +<instance part="C22" gate="G$1" x="132.08" y="7.62" smashed="yes"> +<attribute name="NAME" x="132.08" y="12.7" size="1.27" layer="95" font="vector"/> +</instance> +<instance part="C23" gate="G$1" x="127" y="7.62" smashed="yes"> +<attribute name="NAME" x="127" y="12.7" size="1.27" layer="95" font="vector"/> +</instance> +<instance part="C24" gate="G$1" x="121.92" y="7.62" smashed="yes"> +<attribute name="NAME" x="121.92" y="12.7" size="1.27" layer="95" font="vector"/> +</instance> +<instance part="C25" gate="G$1" x="116.84" y="7.62" smashed="yes"> +<attribute name="NAME" x="116.84" y="12.7" size="1.27" layer="95" font="vector"/> +<attribute name="DIELECTRIC" x="116.84" y="7.62" size="1.6764" layer="96" display="off"/> +<attribute name="RATED_VOLTAGE" x="116.84" y="7.62" size="1.6764" layer="96" display="off"/> +</instance> +<instance part="C26" gate="G$1" x="116.84" y="-5.08" smashed="yes"> +<attribute name="NAME" x="114.3" y="-12.7" size="1.27" layer="95" font="vector"/> +</instance> +<instance part="C27" gate="G$1" x="111.76" y="-5.08" smashed="yes"> +<attribute name="NAME" x="109.22" y="-12.7" size="1.27" layer="95" font="vector"/> +</instance> +<instance part="C28" gate="G$1" x="111.76" y="7.62" smashed="yes"> +<attribute name="NAME" x="111.76" y="12.7" size="1.27" layer="95" font="vector"/> +<attribute name="RATED_VOLTAGE" x="111.76" y="7.62" size="1.6764" layer="96" display="off"/> +</instance> +<instance part="C29" gate="G$1" x="106.68" y="7.62" smashed="yes"> +<attribute name="NAME" x="106.68" y="12.7" size="1.27" layer="95" font="vector"/> +<attribute name="DIELECTRIC" x="106.68" y="7.62" size="1.6764" layer="96" display="off"/> +<attribute name="RATED_VOLTAGE" x="106.68" y="7.62" size="1.6764" layer="96" display="off"/> +</instance> +<instance part="C31" gate="G$1" x="152.4" y="-5.08" smashed="yes"> +<attribute name="NAME" x="149.86" y="-12.7" size="1.27" layer="95" font="vector"/> +<attribute name="VALUE" x="157.48" y="-5.08" size="1.27" layer="96" font="vector"/> +</instance> +<instance part="C32" gate="G$1" x="147.32" y="-5.08" smashed="yes"> +<attribute name="NAME" x="144.78" y="-12.7" size="1.27" layer="95" font="vector"/> +</instance> +<instance part="C33" gate="G$1" x="142.24" y="-5.08" smashed="yes"> +<attribute name="NAME" x="139.7" y="-12.7" size="1.27" layer="95" font="vector"/> +</instance> +<instance part="C34" gate="G$1" x="137.16" y="-5.08" smashed="yes"> +<attribute name="NAME" x="134.62" y="-12.7" size="1.27" layer="95" font="vector"/> +</instance> +<instance part="C35" gate="G$1" x="132.08" y="-5.08" smashed="yes"> +<attribute name="NAME" x="129.54" y="-12.7" size="1.27" layer="95" font="vector"/> +</instance> +<instance part="C36" gate="G$1" x="127" y="-5.08" smashed="yes"> +<attribute name="NAME" x="124.46" y="-12.7" size="1.27" layer="95" font="vector"/> +</instance> +<instance part="C37" gate="G$1" x="121.92" y="-5.08" smashed="yes"> +<attribute name="NAME" x="119.38" y="-12.7" size="1.27" layer="95" font="vector"/> +</instance> +<instance part="C30" gate="G$1" x="-152.4" y="27.94" smashed="yes"> +<attribute name="NAME" x="-160.02" y="30.48" size="1.27" layer="95" font="vector"/> +<attribute name="VALUE" x="-160.02" y="27.94" size="1.27" layer="96" font="vector"/> +<attribute name="DIELECTRIC" x="-152.4" y="27.94" size="1.6764" layer="96" display="off"/> +<attribute name="RATED_VOLTAGE" x="-152.4" y="27.94" size="1.6764" layer="96" display="off"/> +</instance> +<instance part="SUPPLY27" gate="GND" x="-152.4" y="17.78"/> +<instance part="C38" gate="G$1" x="-22.86" y="0" smashed="yes"> +<attribute name="NAME" x="-15.24" y="0" size="1.27" layer="95" font="vector"/> +<attribute name="VALUE" x="-15.24" y="-2.54" size="1.27" layer="96" font="vector"/> +<attribute name="DIELECTRIC" x="-22.86" y="0" size="1.778" layer="96" display="off"/> +<attribute name="RATED_VOLTAGE" x="-22.86" y="0" size="1.778" layer="96" display="off"/> +</instance> +<instance part="P+14" gate="VCC" x="-43.18" y="12.7" smashed="yes"/> +<instance part="C39" gate="G$1" x="-43.18" y="0" smashed="yes"> +<attribute name="NAME" x="-35.56" y="0" size="1.27" layer="95" font="vector"/> +<attribute name="VALUE" x="-35.56" y="-2.54" size="1.27" layer="96" font="vector"/> +<attribute name="DIELECTRIC" x="-43.18" y="0" size="1.778" layer="96" display="off"/> +<attribute name="RATED_VOLTAGE" x="-43.18" y="0" size="1.778" layer="96" display="off"/> +</instance> +<instance part="C56" gate="G$1" x="-38.1" y="0" smashed="yes"> +<attribute name="NAME" x="-35.56" y="2.54" size="1.27" layer="95" font="vector"/> +<attribute name="DIELECTRIC" x="-38.1" y="0" size="1.778" layer="96" display="off"/> +<attribute name="RATED_VOLTAGE" x="-38.1" y="0" size="1.778" layer="96" display="off"/> +</instance> +<instance part="C57" gate="G$1" x="-17.78" y="0" smashed="yes"> +<attribute name="NAME" x="-15.24" y="2.54" size="1.27" layer="95" font="vector"/> +<attribute name="DIELECTRIC" x="-17.78" y="0" size="1.778" layer="96" display="off"/> +<attribute name="RATED_VOLTAGE" x="-17.78" y="0" size="1.778" layer="96" display="off"/> +</instance> +<instance part="U$1" gate="PWR" x="-116.84" y="2.54"/> +<instance part="P+65" gate="VCC" x="-142.24" y="52.07" smashed="yes"/> +<instance part="SUPPLY225" gate="GND" x="-91.44" y="-38.1"/> +</instances> +<busses> +</busses> +<nets> +<net name="GND" class="1"> +<segment> +<pinref part="C16" gate="G$1" pin="2"/> +<wire x1="48.26" y1="-10.16" x2="48.26" y2="-12.7" width="0.1524" layer="91"/> +<wire x1="48.26" y1="-12.7" x2="53.34" y2="-12.7" width="0.1524" layer="91"/> +<pinref part="SUPPLY25" gate="GND" pin="GND"/> +<wire x1="53.34" y1="-12.7" x2="53.34" y2="-17.78" width="0.1524" layer="91"/> +<pinref part="C17" gate="G$1" pin="2"/> +<wire x1="58.42" y1="-10.16" x2="58.42" y2="-12.7" width="0.1524" layer="91"/> +<wire x1="58.42" y1="-12.7" x2="53.34" y2="-12.7" width="0.1524" layer="91"/> +<junction x="53.34" y="-12.7"/> +</segment> +<segment> +<pinref part="C18" gate="G$1" pin="2"/> +<pinref part="C29" gate="G$1" pin="2"/> +<wire x1="152.4" y1="2.54" x2="147.32" y2="2.54" width="0.1524" layer="91"/> +<pinref part="SUPPLY26" gate="GND" pin="GND"/> +<wire x1="147.32" y1="2.54" x2="142.24" y2="2.54" width="0.1524" layer="91"/> +<wire x1="142.24" y1="2.54" x2="137.16" y2="2.54" width="0.1524" layer="91"/> +<wire x1="137.16" y1="2.54" x2="132.08" y2="2.54" width="0.1524" layer="91"/> +<wire x1="132.08" y1="2.54" x2="127" y2="2.54" width="0.1524" layer="91"/> +<wire x1="127" y1="2.54" x2="121.92" y2="2.54" width="0.1524" layer="91"/> +<wire x1="121.92" y1="2.54" x2="116.84" y2="2.54" width="0.1524" layer="91"/> +<wire x1="116.84" y1="2.54" x2="111.76" y2="2.54" width="0.1524" layer="91"/> +<wire x1="111.76" y1="2.54" x2="106.68" y2="2.54" width="0.1524" layer="91"/> +<wire x1="106.68" y1="2.54" x2="106.68" y2="-10.16" width="0.1524" layer="91"/> +<junction x="106.68" y="2.54"/> +<wire x1="106.68" y1="-10.16" x2="106.68" y2="-17.78" width="0.1524" layer="91"/> +<junction x="106.68" y="-10.16"/> +<pinref part="C19" gate="G$1" pin="2"/> +<junction x="147.32" y="2.54"/> +<pinref part="C20" gate="G$1" pin="2"/> +<junction x="142.24" y="2.54"/> +<pinref part="C21" gate="G$1" pin="2"/> +<junction x="137.16" y="2.54"/> +<pinref part="C22" gate="G$1" pin="2"/> +<junction x="132.08" y="2.54"/> +<pinref part="C23" gate="G$1" pin="2"/> +<junction x="127" y="2.54"/> +<pinref part="C24" gate="G$1" pin="2"/> +<junction x="121.92" y="2.54"/> +<pinref part="C25" gate="G$1" pin="2"/> +<junction x="116.84" y="2.54"/> +<pinref part="C28" gate="G$1" pin="2"/> +<junction x="111.76" y="2.54"/> +<pinref part="C31" gate="G$1" pin="2"/> +<wire x1="152.4" y1="-10.16" x2="147.32" y2="-10.16" width="0.1524" layer="91"/> +<pinref part="C32" gate="G$1" pin="2"/> +<junction x="147.32" y="-10.16"/> +<wire x1="147.32" y1="-10.16" x2="142.24" y2="-10.16" width="0.1524" layer="91"/> +<pinref part="C33" gate="G$1" pin="2"/> +<junction x="142.24" y="-10.16"/> +<wire x1="142.24" y1="-10.16" x2="137.16" y2="-10.16" width="0.1524" layer="91"/> +<pinref part="C34" gate="G$1" pin="2"/> +<junction x="137.16" y="-10.16"/> +<wire x1="137.16" y1="-10.16" x2="132.08" y2="-10.16" width="0.1524" layer="91"/> +<pinref part="C35" gate="G$1" pin="2"/> +<junction x="132.08" y="-10.16"/> +<wire x1="132.08" y1="-10.16" x2="127" y2="-10.16" width="0.1524" layer="91"/> +<pinref part="C36" gate="G$1" pin="2"/> +<junction x="127" y="-10.16"/> +<wire x1="127" y1="-10.16" x2="121.92" y2="-10.16" width="0.1524" layer="91"/> +<pinref part="C37" gate="G$1" pin="2"/> +<junction x="121.92" y="-10.16"/> +<wire x1="121.92" y1="-10.16" x2="116.84" y2="-10.16" width="0.1524" layer="91"/> +<pinref part="C26" gate="G$1" pin="2"/> +<junction x="116.84" y="-10.16"/> +<wire x1="116.84" y1="-10.16" x2="111.76" y2="-10.16" width="0.1524" layer="91"/> +<pinref part="C27" gate="G$1" pin="2"/> +<junction x="111.76" y="-10.16"/> +<wire x1="111.76" y1="-10.16" x2="106.68" y2="-10.16" width="0.1524" layer="91"/> +</segment> <segment> -<pinref part="U$1" gate="G$3" pin="PG3/FMC_A13"/> -<wire x1="187.96" y1="121.92" x2="147.32" y2="121.92" width="0.1524" layer="91"/> +<pinref part="SUPPLY27" gate="GND" pin="GND"/> +<pinref part="C30" gate="G$1" pin="2"/> +<wire x1="-152.4" y1="22.86" x2="-152.4" y2="20.32" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="SUPPLY225" gate="GND" pin="GND"/> +<pinref part="U$1" gate="PWR" pin="VSSA@40"/> +<wire x1="-96.52" y1="27.94" x2="-91.44" y2="27.94" width="0.1524" layer="91"/> +<wire x1="-91.44" y1="27.94" x2="-91.44" y2="20.32" width="0.1524" layer="91"/> +<pinref part="U$1" gate="PWR" pin="VSS@14"/> +<wire x1="-91.44" y1="20.32" x2="-91.44" y2="17.78" width="0.1524" layer="91"/> +<wire x1="-91.44" y1="17.78" x2="-91.44" y2="15.24" width="0.1524" layer="91"/> +<wire x1="-91.44" y1="15.24" x2="-91.44" y2="10.16" width="0.1524" layer="91"/> +<wire x1="-91.44" y1="10.16" x2="-91.44" y2="7.62" width="0.1524" layer="91"/> +<wire x1="-91.44" y1="7.62" x2="-91.44" y2="5.08" width="0.1524" layer="91"/> +<wire x1="-91.44" y1="5.08" x2="-91.44" y2="2.54" width="0.1524" layer="91"/> +<wire x1="-91.44" y1="2.54" x2="-91.44" y2="-5.08" width="0.1524" layer="91"/> +<wire x1="-91.44" y1="-5.08" x2="-91.44" y2="-7.62" width="0.1524" layer="91"/> +<wire x1="-91.44" y1="-7.62" x2="-91.44" y2="-10.16" width="0.1524" layer="91"/> +<wire x1="-91.44" y1="-10.16" x2="-91.44" y2="-12.7" width="0.1524" layer="91"/> +<wire x1="-91.44" y1="-12.7" x2="-91.44" y2="-17.78" width="0.1524" layer="91"/> +<wire x1="-91.44" y1="-17.78" x2="-91.44" y2="-20.32" width="0.1524" layer="91"/> +<wire x1="-91.44" y1="-20.32" x2="-91.44" y2="-22.86" width="0.1524" layer="91"/> +<wire x1="-91.44" y1="-22.86" x2="-91.44" y2="-35.56" width="0.1524" layer="91"/> +<wire x1="-96.52" y1="20.32" x2="-91.44" y2="20.32" width="0.1524" layer="91"/> +<junction x="-91.44" y="20.32"/> +<pinref part="U$1" gate="PWR" pin="VSS@25"/> +<wire x1="-96.52" y1="17.78" x2="-91.44" y2="17.78" width="0.1524" layer="91"/> +<junction x="-91.44" y="17.78"/> +<pinref part="U$1" gate="PWR" pin="VSS@51"/> +<wire x1="-96.52" y1="15.24" x2="-91.44" y2="15.24" width="0.1524" layer="91"/> +<junction x="-91.44" y="15.24"/> +<pinref part="U$1" gate="PWR" pin="VSS@60"/> +<wire x1="-96.52" y1="10.16" x2="-91.44" y2="10.16" width="0.1524" layer="91"/> +<junction x="-91.44" y="10.16"/> +<pinref part="U$1" gate="PWR" pin="VSS@72"/> +<wire x1="-96.52" y1="7.62" x2="-91.44" y2="7.62" width="0.1524" layer="91"/> +<junction x="-91.44" y="7.62"/> +<pinref part="U$1" gate="PWR" pin="VSS@82"/> +<wire x1="-96.52" y1="5.08" x2="-91.44" y2="5.08" width="0.1524" layer="91"/> +<junction x="-91.44" y="5.08"/> +<pinref part="U$1" gate="PWR" pin="VSS@93"/> +<wire x1="-96.52" y1="2.54" x2="-91.44" y2="2.54" width="0.1524" layer="91"/> +<junction x="-91.44" y="2.54"/> +<pinref part="U$1" gate="PWR" pin="VSS@114"/> +<wire x1="-96.52" y1="-5.08" x2="-91.44" y2="-5.08" width="0.1524" layer="91"/> +<junction x="-91.44" y="-5.08"/> +<pinref part="U$1" gate="PWR" pin="VSS@125"/> +<wire x1="-96.52" y1="-7.62" x2="-91.44" y2="-7.62" width="0.1524" layer="91"/> +<junction x="-91.44" y="-7.62"/> +<pinref part="U$1" gate="PWR" pin="VSS@136"/> +<wire x1="-96.52" y1="-10.16" x2="-91.44" y2="-10.16" width="0.1524" layer="91"/> +<junction x="-91.44" y="-10.16"/> +<pinref part="U$1" gate="PWR" pin="VSS@149"/> +<wire x1="-96.52" y1="-12.7" x2="-91.44" y2="-12.7" width="0.1524" layer="91"/> +<junction x="-91.44" y="-12.7"/> +<pinref part="U$1" gate="PWR" pin="VSS@170"/> +<wire x1="-96.52" y1="-17.78" x2="-91.44" y2="-17.78" width="0.1524" layer="91"/> +<junction x="-91.44" y="-17.78"/> +<pinref part="U$1" gate="PWR" pin="VSS@184"/> +<wire x1="-96.52" y1="-20.32" x2="-91.44" y2="-20.32" width="0.1524" layer="91"/> +<junction x="-91.44" y="-20.32"/> +<pinref part="U$1" gate="PWR" pin="VSS@202"/> +<wire x1="-96.52" y1="-22.86" x2="-91.44" y2="-22.86" width="0.1524" layer="91"/> +<junction x="-91.44" y="-22.86"/> </segment> </net> -<net name="FMC_A14" class="3"> +<net name="VCCO_3V3" class="0"> <segment> -<pinref part="U$1" gate="G$3" pin="PG4/FMC_A14"/> -<wire x1="187.96" y1="119.38" x2="147.32" y2="119.38" width="0.1524" layer="91"/> +<pinref part="C29" gate="G$1" pin="1"/> +<wire x1="106.68" y1="15.24" x2="106.68" y2="16.51" width="0.1524" layer="91"/> +<pinref part="C18" gate="G$1" pin="1"/> +<wire x1="106.68" y1="16.51" x2="106.68" y2="10.16" width="0.1524" layer="91"/> +<wire x1="106.68" y1="10.16" x2="111.76" y2="10.16" width="0.1524" layer="91"/> +<junction x="106.68" y="10.16"/> +<wire x1="111.76" y1="10.16" x2="116.84" y2="10.16" width="0.1524" layer="91"/> +<wire x1="116.84" y1="10.16" x2="121.92" y2="10.16" width="0.1524" layer="91"/> +<wire x1="121.92" y1="10.16" x2="127" y2="10.16" width="0.1524" layer="91"/> +<wire x1="127" y1="10.16" x2="132.08" y2="10.16" width="0.1524" layer="91"/> +<wire x1="132.08" y1="10.16" x2="137.16" y2="10.16" width="0.1524" layer="91"/> +<wire x1="137.16" y1="10.16" x2="142.24" y2="10.16" width="0.1524" layer="91"/> +<wire x1="142.24" y1="10.16" x2="147.32" y2="10.16" width="0.1524" layer="91"/> +<wire x1="147.32" y1="10.16" x2="152.4" y2="10.16" width="0.1524" layer="91"/> +<wire x1="152.4" y1="10.16" x2="157.48" y2="10.16" width="0.1524" layer="91"/> +<junction x="152.4" y="10.16"/> +<wire x1="157.48" y1="10.16" x2="157.48" y2="-2.54" width="0.1524" layer="91"/> +<pinref part="C27" gate="G$1" pin="1"/> +<wire x1="157.48" y1="-2.54" x2="152.4" y2="-2.54" width="0.1524" layer="91"/> +<pinref part="C28" gate="G$1" pin="1"/> +<junction x="111.76" y="10.16"/> +<pinref part="C25" gate="G$1" pin="1"/> +<junction x="116.84" y="10.16"/> +<pinref part="C24" gate="G$1" pin="1"/> +<junction x="121.92" y="10.16"/> +<pinref part="C23" gate="G$1" pin="1"/> +<junction x="127" y="10.16"/> +<pinref part="C22" gate="G$1" pin="1"/> +<junction x="132.08" y="10.16"/> +<pinref part="C21" gate="G$1" pin="1"/> +<junction x="137.16" y="10.16"/> +<pinref part="C20" gate="G$1" pin="1"/> +<junction x="142.24" y="10.16"/> +<pinref part="C19" gate="G$1" pin="1"/> +<junction x="147.32" y="10.16"/> +<pinref part="C26" gate="G$1" pin="1"/> +<junction x="116.84" y="-2.54"/> +<wire x1="152.4" y1="-2.54" x2="147.32" y2="-2.54" width="0.1524" layer="91"/> +<wire x1="147.32" y1="-2.54" x2="142.24" y2="-2.54" width="0.1524" layer="91"/> +<wire x1="142.24" y1="-2.54" x2="137.16" y2="-2.54" width="0.1524" layer="91"/> +<wire x1="137.16" y1="-2.54" x2="132.08" y2="-2.54" width="0.1524" layer="91"/> +<wire x1="132.08" y1="-2.54" x2="127" y2="-2.54" width="0.1524" layer="91"/> +<wire x1="127" y1="-2.54" x2="121.92" y2="-2.54" width="0.1524" layer="91"/> +<wire x1="121.92" y1="-2.54" x2="116.84" y2="-2.54" width="0.1524" layer="91"/> +<wire x1="116.84" y1="-2.54" x2="111.76" y2="-2.54" width="0.1524" layer="91"/> +<pinref part="C37" gate="G$1" pin="1"/> +<junction x="121.92" y="-2.54"/> +<pinref part="C36" gate="G$1" pin="1"/> +<junction x="127" y="-2.54"/> +<pinref part="C35" gate="G$1" pin="1"/> +<junction x="132.08" y="-2.54"/> +<pinref part="C34" gate="G$1" pin="1"/> +<junction x="137.16" y="-2.54"/> +<pinref part="C33" gate="G$1" pin="1"/> +<junction x="142.24" y="-2.54"/> +<pinref part="C32" gate="G$1" pin="1"/> +<junction x="147.32" y="-2.54"/> +<pinref part="C31" gate="G$1" pin="1"/> +<junction x="152.4" y="-2.54"/> +<pinref part="P+11" gate="VCC" pin="VCC"/> +<label x="99.06" y="22.86" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="C39" gate="G$1" pin="1"/> +<wire x1="-43.18" y1="2.54" x2="-43.18" y2="5.08" width="0.1524" layer="91"/> +<pinref part="P+14" gate="VCC" pin="VCC"/> +<wire x1="-43.18" y1="5.08" x2="-43.18" y2="10.16" width="0.1524" layer="91"/> +<pinref part="C56" gate="G$1" pin="1"/> +<wire x1="-38.1" y1="2.54" x2="-38.1" y2="5.08" width="0.1524" layer="91"/> +<wire x1="-38.1" y1="5.08" x2="-43.18" y2="5.08" width="0.1524" layer="91"/> +<junction x="-43.18" y="5.08"/> +<label x="-40.64" y="10.16" size="1.778" layer="95"/> +<pinref part="C38" gate="G$1" pin="1"/> +<wire x1="-22.86" y1="2.54" x2="-22.86" y2="5.08" width="0.1524" layer="91"/> +<pinref part="C57" gate="G$1" pin="1"/> +<wire x1="-17.78" y1="2.54" x2="-17.78" y2="5.08" width="0.1524" layer="91"/> +<wire x1="-17.78" y1="5.08" x2="-22.86" y2="5.08" width="0.1524" layer="91"/> +<wire x1="-22.86" y1="5.08" x2="-38.1" y2="5.08" width="0.1524" layer="91"/> +<junction x="-22.86" y="5.08"/> +<junction x="-38.1" y="5.08"/> +</segment> +<segment> +<pinref part="C16" gate="G$1" pin="1"/> +<wire x1="48.26" y1="-2.54" x2="48.26" y2="0" width="0.1524" layer="91"/> +<wire x1="48.26" y1="0" x2="53.34" y2="0" width="0.1524" layer="91"/> +<wire x1="53.34" y1="0" x2="53.34" y2="5.08" width="0.1524" layer="91"/> +<pinref part="C17" gate="G$1" pin="1"/> +<wire x1="58.42" y1="-2.54" x2="58.42" y2="0" width="0.1524" layer="91"/> +<wire x1="58.42" y1="0" x2="53.34" y2="0" width="0.1524" layer="91"/> +<junction x="53.34" y="0"/> +<pinref part="P+10" gate="VCC" pin="VCC"/> +<label x="55.88" y="5.08" size="1.778" layer="95"/> +</segment> +<segment> +<wire x1="-142.24" y1="48.26" x2="-142.24" y2="49.53" width="0.1524" layer="91"/> +<pinref part="P+65" gate="VCC" pin="VCC"/> +<label x="-160.02" y="48.26" size="1.778" layer="95"/> +<wire x1="-142.24" y1="49.53" x2="-142.24" y2="33.02" width="0.1524" layer="91"/> +<pinref part="U$1" gate="PWR" pin="VDD@158"/> +<wire x1="-142.24" y1="33.02" x2="-142.24" y2="27.94" width="0.1524" layer="91"/> +<wire x1="-142.24" y1="27.94" x2="-142.24" y2="22.86" width="0.1524" layer="91"/> +<wire x1="-142.24" y1="22.86" x2="-142.24" y2="20.32" width="0.1524" layer="91"/> +<wire x1="-142.24" y1="20.32" x2="-142.24" y2="17.78" width="0.1524" layer="91"/> +<wire x1="-142.24" y1="17.78" x2="-142.24" y2="15.24" width="0.1524" layer="91"/> +<wire x1="-142.24" y1="15.24" x2="-142.24" y2="10.16" width="0.1524" layer="91"/> +<wire x1="-142.24" y1="10.16" x2="-142.24" y2="7.62" width="0.1524" layer="91"/> +<wire x1="-142.24" y1="7.62" x2="-142.24" y2="5.08" width="0.1524" layer="91"/> +<wire x1="-142.24" y1="5.08" x2="-142.24" y2="2.54" width="0.1524" layer="91"/> +<wire x1="-142.24" y1="2.54" x2="-142.24" y2="0" width="0.1524" layer="91"/> +<wire x1="-142.24" y1="0" x2="-142.24" y2="-5.08" width="0.1524" layer="91"/> +<wire x1="-142.24" y1="-5.08" x2="-142.24" y2="-7.62" width="0.1524" layer="91"/> +<wire x1="-142.24" y1="-7.62" x2="-142.24" y2="-10.16" width="0.1524" layer="91"/> +<wire x1="-142.24" y1="-10.16" x2="-142.24" y2="-12.7" width="0.1524" layer="91"/> +<wire x1="-142.24" y1="-12.7" x2="-142.24" y2="-17.78" width="0.1524" layer="91"/> +<wire x1="-142.24" y1="-17.78" x2="-142.24" y2="-20.32" width="0.1524" layer="91"/> +<wire x1="-142.24" y1="-20.32" x2="-142.24" y2="-22.86" width="0.1524" layer="91"/> +<wire x1="-142.24" y1="-22.86" x2="-142.24" y2="-25.4" width="0.1524" layer="91"/> +<wire x1="-142.24" y1="-25.4" x2="-137.16" y2="-25.4" width="0.1524" layer="91"/> +<pinref part="U$1" gate="PWR" pin="VDD@171"/> +<wire x1="-137.16" y1="-22.86" x2="-142.24" y2="-22.86" width="0.1524" layer="91"/> +<junction x="-142.24" y="-22.86"/> +<pinref part="U$1" gate="PWR" pin="VDD@185"/> +<wire x1="-137.16" y1="-20.32" x2="-142.24" y2="-20.32" width="0.1524" layer="91"/> +<junction x="-142.24" y="-20.32"/> +<pinref part="U$1" gate="PWR" pin="VDD@204"/> +<wire x1="-137.16" y1="-17.78" x2="-142.24" y2="-17.78" width="0.1524" layer="91"/> +<junction x="-142.24" y="-17.78"/> +<pinref part="U$1" gate="PWR" pin="VDD@150"/> +<wire x1="-137.16" y1="-12.7" x2="-142.24" y2="-12.7" width="0.1524" layer="91"/> +<junction x="-142.24" y="-12.7"/> +<pinref part="U$1" gate="PWR" pin="VDD@137"/> +<wire x1="-137.16" y1="-10.16" x2="-142.24" y2="-10.16" width="0.1524" layer="91"/> +<junction x="-142.24" y="-10.16"/> +<pinref part="U$1" gate="PWR" pin="VDD@124"/> +<wire x1="-137.16" y1="-7.62" x2="-142.24" y2="-7.62" width="0.1524" layer="91"/> +<junction x="-142.24" y="-7.62"/> +<pinref part="U$1" gate="PWR" pin="VDD@115"/> +<wire x1="-137.16" y1="-5.08" x2="-142.24" y2="-5.08" width="0.1524" layer="91"/> +<junction x="-142.24" y="-5.08"/> +<pinref part="U$1" gate="PWR" pin="VDD@103"/> +<wire x1="-137.16" y1="0" x2="-142.24" y2="0" width="0.1524" layer="91"/> +<junction x="-142.24" y="0"/> +<pinref part="U$1" gate="PWR" pin="VDD@94"/> +<wire x1="-137.16" y1="2.54" x2="-142.24" y2="2.54" width="0.1524" layer="91"/> +<junction x="-142.24" y="2.54"/> +<pinref part="U$1" gate="PWR" pin="VDD@83"/> +<wire x1="-137.16" y1="5.08" x2="-142.24" y2="5.08" width="0.1524" layer="91"/> +<junction x="-142.24" y="5.08"/> +<pinref part="U$1" gate="PWR" pin="VDD@73"/> +<wire x1="-137.16" y1="7.62" x2="-142.24" y2="7.62" width="0.1524" layer="91"/> +<junction x="-142.24" y="7.62"/> +<pinref part="U$1" gate="PWR" pin="VDD@59"/> +<wire x1="-137.16" y1="10.16" x2="-142.24" y2="10.16" width="0.1524" layer="91"/> +<junction x="-142.24" y="10.16"/> +<pinref part="U$1" gate="PWR" pin="VDD@52"/> +<wire x1="-137.16" y1="15.24" x2="-142.24" y2="15.24" width="0.1524" layer="91"/> +<junction x="-142.24" y="15.24"/> +<pinref part="U$1" gate="PWR" pin="VDD@39"/> +<wire x1="-137.16" y1="17.78" x2="-142.24" y2="17.78" width="0.1524" layer="91"/> +<junction x="-142.24" y="17.78"/> +<pinref part="U$1" gate="PWR" pin="VDD@26"/> +<wire x1="-137.16" y1="20.32" x2="-142.24" y2="20.32" width="0.1524" layer="91"/> +<junction x="-142.24" y="20.32"/> +<pinref part="U$1" gate="PWR" pin="VDD@15"/> +<wire x1="-137.16" y1="22.86" x2="-142.24" y2="22.86" width="0.1524" layer="91"/> +<junction x="-142.24" y="22.86"/> +<pinref part="U$1" gate="PWR" pin="VDDA@42"/> +<wire x1="-137.16" y1="27.94" x2="-142.24" y2="27.94" width="0.1524" layer="91"/> +<junction x="-142.24" y="27.94"/> +<pinref part="U$1" gate="PWR" pin="VBAT@6"/> +<wire x1="-137.16" y1="33.02" x2="-142.24" y2="33.02" width="0.1524" layer="91"/> +<junction x="-142.24" y="33.02"/> +<wire x1="-152.4" y1="33.02" x2="-152.4" y2="30.48" width="0.1524" layer="91"/> +<pinref part="C30" gate="G$1" pin="1"/> +<wire x1="-142.24" y1="33.02" x2="-152.4" y2="33.02" width="0.1524" layer="91"/> </segment> </net> -<net name="FMC_A16" class="3"> +<net name="VCAP2" class="0"> +<segment> +<pinref part="C38" gate="G$1" pin="2"/> +<pinref part="C57" gate="G$1" pin="2"/> +<wire x1="-17.78" y1="-5.08" x2="-17.78" y2="-7.62" width="0.1524" layer="91"/> +<wire x1="-17.78" y1="-7.62" x2="-22.86" y2="-7.62" width="0.1524" layer="91"/> +<wire x1="-22.86" y1="-7.62" x2="-22.86" y2="-5.08" width="0.1524" layer="91"/> +<wire x1="-22.86" y1="-7.62" x2="-22.86" y2="-12.7" width="0.1524" layer="91"/> +<junction x="-22.86" y="-7.62"/> +<label x="-22.86" y="-17.78" size="1.27" layer="95" rot="R90"/> +</segment> <segment> -<pinref part="U$1" gate="G$3" pin="PD11/FMC_A16"/> -<wire x1="187.96" y1="170.18" x2="147.32" y2="170.18" width="0.1524" layer="91"/> +<pinref part="U$1" gate="PWR" pin="VCAP2@148"/> +<wire x1="-114.3" y1="43.18" x2="-114.3" y2="48.26" width="0.1524" layer="91"/> +<label x="-114.3" y="48.26" size="1.27" layer="95" rot="R90"/> </segment> </net> -<net name="FMC_A17" class="3"> +<net name="VCAP1" class="0"> <segment> -<pinref part="U$1" gate="G$3" pin="PD12/FMC_A17"/> -<wire x1="187.96" y1="167.64" x2="147.32" y2="167.64" width="0.1524" layer="91"/> +<pinref part="C39" gate="G$1" pin="2"/> +<pinref part="C56" gate="G$1" pin="2"/> +<wire x1="-38.1" y1="-5.08" x2="-38.1" y2="-7.62" width="0.1524" layer="91"/> +<wire x1="-38.1" y1="-7.62" x2="-43.18" y2="-7.62" width="0.1524" layer="91"/> +<wire x1="-43.18" y1="-7.62" x2="-43.18" y2="-5.08" width="0.1524" layer="91"/> +<wire x1="-38.1" y1="-7.62" x2="-38.1" y2="-12.7" width="0.1524" layer="91"/> +<junction x="-38.1" y="-7.62"/> +<label x="-38.1" y="-17.78" size="1.27" layer="95" rot="R90"/> +</segment> +<segment> +<pinref part="U$1" gate="PWR" pin="VCAP1@92"/> +<wire x1="-119.38" y1="43.18" x2="-119.38" y2="48.26" width="0.1524" layer="91"/> +<label x="-119.38" y="48.26" size="1.27" layer="95" rot="R90"/> </segment> </net> -<net name="FMC_A18" class="3"> +</nets> +</sheet> +<sheet> +<description>ARM I/O</description> +<plain> +<text x="-12.7" y="91.44" size="1.27" layer="91">FPGA_DONE can be swapped with any +other available GPIO pin on the ARM</text> +<text x="-170.18" y="66.04" size="1.27" layer="91">XXX cross RTS/CTS?</text> +<text x="-175.26" y="50.8" size="1.27" layer="91">XXX cross RTS/CTS?</text> +<text x="-17.78" y="100.33" size="1.778" layer="91">*) FPGA_GPIO_*, FPGA_IRQ_N_* and +FPGA_{PROGRAM,INIT}_B signals +can be swapped with any other +available GPIO on the ARM</text> +<text x="-167.64" y="104.14" size="3.81" layer="91">Input/output, STM32</text> +</plain> +<instances> +<instance part="FRAME25" gate="G$1" x="-193.04" y="-129.54"/> +<instance part="U$1" gate="FMC" x="99.06" y="2.54"/> +<instance part="U$1" gate="IO" x="-83.82" y="-7.62"/> +</instances> +<busses> +<bus name="FMC_D[0..31],FMC_A[0..25]"> <segment> -<pinref part="U$1" gate="G$3" pin="PD13/FMC_A18"/> -<wire x1="187.96" y1="165.1" x2="147.32" y2="165.1" width="0.1524" layer="91"/> +<wire x1="134.62" y1="60.96" x2="170.18" y2="60.96" width="0.762" layer="92"/> +<wire x1="134.62" y1="60.96" x2="134.62" y2="-22.86" width="0.762" layer="92"/> +<label x="134.62" y="63.5" size="1.778" layer="95"/> +</segment> +<segment> +<wire x1="58.42" y1="60.96" x2="58.42" y2="-7.62" width="0.762" layer="92"/> +<wire x1="58.42" y1="60.96" x2="22.86" y2="60.96" width="0.762" layer="92"/> +<label x="22.86" y="63.5" size="1.778" layer="95"/> +</segment> +</bus> +</busses> +<nets> +<net name="FMC_CLK" class="0"> +<segment> +<wire x1="66.04" y1="-38.1" x2="58.42" y2="-38.1" width="0.1524" layer="91"/> +<label x="58.42" y="-38.1" size="1.27" layer="95" rot="R180" xref="yes"/> +<pinref part="U$1" gate="FMC" pin="FMC_CLK/PD3"/> </segment> </net> <net name="FMC_NL" class="0"> <segment> -<pinref part="U$1" gate="G$4" pin="FMC_NL/PB7"/> -<wire x1="274.32" y1="0" x2="266.7" y2="0" width="0.1524" layer="91"/> -<label x="274.32" y="0" size="1.27" layer="95" xref="yes"/> +<wire x1="58.42" y1="-30.48" x2="66.04" y2="-30.48" width="0.1524" layer="91"/> +<label x="58.42" y="-30.48" size="1.27" layer="95" rot="R180" xref="yes"/> +<pinref part="U$1" gate="FMC" pin="FMC_NL/PB7"/> </segment> </net> -<net name="FMC_D28" class="2"> +<net name="FMC_NOE" class="0"> <segment> -<pinref part="U$1" gate="G$4" pin="FMC_D28/PI6"/> -<wire x1="294.64" y1="27.94" x2="266.7" y2="27.94" width="0.1524" layer="91"/> +<wire x1="66.04" y1="-40.64" x2="58.42" y2="-40.64" width="0.1524" layer="91"/> +<label x="58.42" y="-40.64" size="1.27" layer="95" rot="R180" xref="yes"/> +<pinref part="U$1" gate="FMC" pin="FMC_NOE/PD4"/> </segment> </net> -<net name="FMC_D29" class="2"> +<net name="FMC_NWE" class="0"> <segment> -<pinref part="U$1" gate="G$4" pin="FMC_D29/PI7"/> -<wire x1="266.7" y1="30.48" x2="294.64" y2="30.48" width="0.1524" layer="91"/> +<wire x1="66.04" y1="-43.18" x2="58.42" y2="-43.18" width="0.1524" layer="91"/> +<label x="58.42" y="-43.18" size="1.27" layer="95" rot="R180" xref="yes"/> +<pinref part="U$1" gate="FMC" pin="FMC_NWE/PD5"/> </segment> </net> -<net name="FMC_D27" class="2"> +<net name="FMC_NWAIT" class="0"> <segment> -<pinref part="U$1" gate="G$4" pin="PI3/FMC_D27"/> -<wire x1="187.96" y1="35.56" x2="144.78" y2="35.56" width="0.1524" layer="91"/> +<wire x1="66.04" y1="-45.72" x2="58.42" y2="-45.72" width="0.1524" layer="91"/> +<label x="58.42" y="-45.72" size="1.27" layer="95" rot="R180" xref="yes"/> +<pinref part="U$1" gate="FMC" pin="FMC_NWAIT/PD6"/> </segment> </net> -<net name="FMC_D3" class="2"> +<net name="FMC_NE1" class="0"> <segment> -<pinref part="U$1" gate="G$4" pin="PD1/FMC_D3"/> -<wire x1="187.96" y1="15.24" x2="144.78" y2="15.24" width="0.1524" layer="91"/> +<wire x1="66.04" y1="-48.26" x2="58.42" y2="-48.26" width="0.1524" layer="91"/> +<label x="58.42" y="-48.26" size="1.27" layer="95" rot="R180" xref="yes"/> +<pinref part="U$1" gate="FMC" pin="FMC_NE1/PD7"/> </segment> </net> -<net name="FMC_NOE" class="0"> +<net name="FMC_SDNCAS" class="0"> <segment> -<pinref part="U$1" gate="G$4" pin="PD4/FMC_NOE"/> -<wire x1="187.96" y1="7.62" x2="180.34" y2="7.62" width="0.1524" layer="91"/> -<label x="180.34" y="7.62" size="1.27" layer="95" rot="R180" xref="yes"/> +<wire x1="127" y1="-53.34" x2="134.62" y2="-53.34" width="0.1524" layer="91"/> +<label x="134.62" y="-53.34" size="1.27" layer="95" xref="yes"/> +<pinref part="U$1" gate="FMC" pin="PG15/FMC_SDNCAS"/> </segment> </net> -<net name="FMC_NWE" class="0"> +<net name="FMC_SDNRAS" class="0"> <segment> -<pinref part="U$1" gate="G$4" pin="PD5/FMC_NWE"/> -<wire x1="187.96" y1="5.08" x2="180.34" y2="5.08" width="0.1524" layer="91"/> -<label x="180.34" y="5.08" size="1.27" layer="95" rot="R180" xref="yes"/> +<wire x1="127" y1="-55.88" x2="134.62" y2="-55.88" width="0.1524" layer="91"/> +<label x="134.62" y="-55.88" size="1.27" layer="95" xref="yes"/> +<pinref part="U$1" gate="FMC" pin="PF11/FMC_SDNRAS"/> </segment> </net> -<net name="FMC_NWAIT" class="0"> +<net name="FMC_NBL0" class="0"> <segment> -<pinref part="U$1" gate="G$4" pin="PD6/FMC_NWAIT"/> -<wire x1="187.96" y1="-2.54" x2="180.34" y2="-2.54" width="0.1524" layer="91"/> -<label x="180.34" y="-2.54" size="1.27" layer="95" rot="R180" xref="yes"/> +<wire x1="66.04" y1="-15.24" x2="58.42" y2="-15.24" width="0.1524" layer="91"/> +<label x="58.42" y="-15.24" size="1.27" layer="95" rot="R180" xref="yes"/> +<pinref part="U$1" gate="FMC" pin="FMC_NBL0/PE0"/> </segment> </net> -<net name="FMC_A19" class="3"> +<net name="FMC_NBL1" class="0"> <segment> -<pinref part="U$1" gate="G$1" pin="PE3/FMC_A19"/> -<wire x1="15.24" y1="182.88" x2="-15.24" y2="182.88" width="0.1524" layer="91"/> +<wire x1="66.04" y1="-17.78" x2="58.42" y2="-17.78" width="0.1524" layer="91"/> +<label x="58.42" y="-17.78" size="1.27" layer="95" rot="R180" xref="yes"/> +<pinref part="U$1" gate="FMC" pin="FMC_NBL1/PE1"/> </segment> </net> -<net name="FMC_D30" class="2"> +<net name="FMC_NBL2" class="0"> <segment> -<pinref part="U$1" gate="G$1" pin="PI9/FMC_D30"/> -<wire x1="15.24" y1="160.02" x2="-15.24" y2="160.02" width="0.1524" layer="91"/> +<wire x1="66.04" y1="-20.32" x2="58.42" y2="-20.32" width="0.1524" layer="91"/> +<label x="58.42" y="-20.32" size="1.27" layer="95" rot="R180" xref="yes"/> +<pinref part="U$1" gate="FMC" pin="FMC_NBL2/PI4"/> </segment> </net> -<net name="FMC_D31" class="2"> +<net name="FMC_NBL3" class="0"> +<segment> +<wire x1="66.04" y1="-22.86" x2="58.42" y2="-22.86" width="0.1524" layer="91"/> +<label x="58.42" y="-22.86" size="1.27" layer="95" rot="R180" xref="yes"/> +<pinref part="U$1" gate="FMC" pin="FMC_NBL3/PI5"/> +</segment> +</net> +<net name="FMC_SDCKE1" class="0"> <segment> -<pinref part="U$1" gate="G$1" pin="PI10/FMC_D31"/> -<wire x1="15.24" y1="157.48" x2="-15.24" y2="157.48" width="0.1524" layer="91"/> +<wire x1="127" y1="-48.26" x2="134.62" y2="-48.26" width="0.1524" layer="91"/> +<label x="134.62" y="-48.26" size="1.27" layer="95" xref="yes"/> +<pinref part="U$1" gate="FMC" pin="PB5/FMC_SDCKE1"/> +</segment> +</net> +<net name="FMC_SDNE1" class="0"> +<segment> +<wire x1="127" y1="-40.64" x2="134.62" y2="-40.64" width="0.1524" layer="91"/> +<label x="134.62" y="-40.64" size="1.27" layer="95" xref="yes"/> +<pinref part="U$1" gate="FMC" pin="PB6/FMC_SDNE1"/> </segment> </net> <net name="FMC_A0" class="3"> <segment> -<pinref part="U$1" gate="G$1" pin="PF0/FMC_A0"/> -<wire x1="15.24" y1="147.32" x2="-15.24" y2="147.32" width="0.1524" layer="91"/> +<pinref part="U$1" gate="FMC" pin="FMC_A0/PF0"/> +<wire x1="58.42" y1="55.88" x2="66.04" y2="55.88" width="0.1524" layer="91"/> </segment> </net> <net name="FMC_A1" class="3"> <segment> -<pinref part="U$1" gate="G$1" pin="PF1/FMC_A1"/> -<wire x1="15.24" y1="144.78" x2="-15.24" y2="144.78" width="0.1524" layer="91"/> +<pinref part="U$1" gate="FMC" pin="FMC_A1/PF1"/> +<wire x1="58.42" y1="53.34" x2="66.04" y2="53.34" width="0.1524" layer="91"/> </segment> </net> <net name="FMC_A2" class="3"> <segment> -<pinref part="U$1" gate="G$1" pin="PF2/FMC_A2"/> -<wire x1="15.24" y1="142.24" x2="-15.24" y2="142.24" width="0.1524" layer="91"/> +<pinref part="U$1" gate="FMC" pin="FMC_A2/PF2"/> +<wire x1="58.42" y1="50.8" x2="66.04" y2="50.8" width="0.1524" layer="91"/> </segment> </net> <net name="FMC_A3" class="3"> <segment> -<pinref part="U$1" gate="G$1" pin="PF3/FMC_A3"/> -<wire x1="15.24" y1="132.08" x2="-15.24" y2="132.08" width="0.1524" layer="91"/> +<pinref part="U$1" gate="FMC" pin="FMC_A3/PF3"/> +<wire x1="58.42" y1="48.26" x2="66.04" y2="48.26" width="0.1524" layer="91"/> </segment> </net> <net name="FMC_A4" class="3"> <segment> -<pinref part="U$1" gate="G$1" pin="PF4/FMC_A4"/> -<wire x1="15.24" y1="129.54" x2="-15.24" y2="129.54" width="0.1524" layer="91"/> +<pinref part="U$1" gate="FMC" pin="FMC_A4/PF4"/> +<wire x1="58.42" y1="45.72" x2="66.04" y2="45.72" width="0.1524" layer="91"/> </segment> </net> <net name="FMC_A5" class="3"> <segment> -<pinref part="U$1" gate="G$1" pin="PF5/FMC_A5"/> -<wire x1="15.24" y1="127" x2="-15.24" y2="127" width="0.1524" layer="91"/> +<pinref part="U$1" gate="FMC" pin="FMC_A5/PF5"/> +<wire x1="58.42" y1="43.18" x2="66.04" y2="43.18" width="0.1524" layer="91"/> </segment> </net> <net name="FMC_A6" class="3"> <segment> -<pinref part="U$1" gate="G$2" pin="PF12/FMC_A6"/> -<wire x1="15.24" y1="-7.62" x2="-7.62" y2="-7.62" width="0.1524" layer="91"/> +<pinref part="U$1" gate="FMC" pin="FMC_A6/PF12"/> +<wire x1="58.42" y1="40.64" x2="66.04" y2="40.64" width="0.1524" layer="91"/> </segment> </net> <net name="FMC_A7" class="3"> <segment> -<pinref part="U$1" gate="G$2" pin="PF13/FMC_A7"/> -<wire x1="15.24" y1="-15.24" x2="-7.62" y2="-15.24" width="0.1524" layer="91"/> +<pinref part="U$1" gate="FMC" pin="FMC_A7/PF13"/> +<wire x1="58.42" y1="38.1" x2="66.04" y2="38.1" width="0.1524" layer="91"/> </segment> </net> <net name="FMC_A8" class="3"> <segment> -<pinref part="U$1" gate="G$2" pin="PF14/FMC_A8"/> -<wire x1="15.24" y1="-17.78" x2="-7.62" y2="-17.78" width="0.1524" layer="91"/> +<pinref part="U$1" gate="FMC" pin="FMC_A8/PF14"/> +<wire x1="58.42" y1="35.56" x2="66.04" y2="35.56" width="0.1524" layer="91"/> </segment> </net> <net name="FMC_A9" class="3"> <segment> -<pinref part="U$1" gate="G$2" pin="PF15/FMC_A9"/> -<wire x1="15.24" y1="-20.32" x2="-7.62" y2="-20.32" width="0.1524" layer="91"/> +<pinref part="U$1" gate="FMC" pin="FMC_A9/PF15"/> +<wire x1="58.42" y1="33.02" x2="66.04" y2="33.02" width="0.1524" layer="91"/> </segment> </net> <net name="FMC_A10" class="3"> <segment> -<pinref part="U$1" gate="G$2" pin="PG0/FMC_A10"/> -<wire x1="15.24" y1="-22.86" x2="-7.62" y2="-22.86" width="0.1524" layer="91"/> +<pinref part="U$1" gate="FMC" pin="FMC_A10/PG0"/> +<wire x1="58.42" y1="30.48" x2="66.04" y2="30.48" width="0.1524" layer="91"/> </segment> </net> <net name="FMC_A11" class="3"> <segment> -<pinref part="U$1" gate="G$2" pin="PG1/FMC_A11"/> -<wire x1="15.24" y1="-25.4" x2="-7.62" y2="-25.4" width="0.1524" layer="91"/> +<pinref part="U$1" gate="FMC" pin="FMC_A11/PG1"/> +<wire x1="58.42" y1="27.94" x2="66.04" y2="27.94" width="0.1524" layer="91"/> </segment> </net> -<net name="FMC_D4" class="2"> +<net name="FMC_A12" class="3"> <segment> -<pinref part="U$1" gate="G$2" pin="PE7/FMC_D4"/> -<wire x1="15.24" y1="-27.94" x2="-7.62" y2="-27.94" width="0.1524" layer="91"/> +<pinref part="U$1" gate="FMC" pin="FMC_A12/PG2"/> +<wire x1="58.42" y1="25.4" x2="66.04" y2="25.4" width="0.1524" layer="91"/> </segment> </net> -<net name="FMC_D20" class="2"> +<net name="FMC_A13" class="3"> <segment> -<pinref part="U$1" gate="G$2" pin="FMC_D20/PH12"/> -<wire x1="93.98" y1="30.48" x2="116.84" y2="30.48" width="0.1524" layer="91"/> +<pinref part="U$1" gate="FMC" pin="FMC_A13/PG3"/> +<wire x1="58.42" y1="22.86" x2="66.04" y2="22.86" width="0.1524" layer="91"/> </segment> </net> -<net name="FMC_D19" class="2"> +<net name="FMC_A14" class="3"> <segment> -<pinref part="U$1" gate="G$2" pin="FMC_D19/PH11"/> -<wire x1="93.98" y1="27.94" x2="116.84" y2="27.94" width="0.1524" layer="91"/> +<pinref part="U$1" gate="FMC" pin="FMC_A14/PG4"/> +<wire x1="58.42" y1="20.32" x2="66.04" y2="20.32" width="0.1524" layer="91"/> </segment> </net> -<net name="FMC_D18" class="2"> +<net name="FMC_A15" class="3"> <segment> -<pinref part="U$1" gate="G$2" pin="FMC_D18/PH10"/> -<wire x1="93.98" y1="25.4" x2="116.84" y2="25.4" width="0.1524" layer="91"/> +<pinref part="U$1" gate="FMC" pin="FMC_A15/PG5"/> +<wire x1="58.42" y1="17.78" x2="66.04" y2="17.78" width="0.1524" layer="91"/> </segment> </net> -<net name="FMC_D17" class="2"> +<net name="FMC_A16" class="3"> <segment> -<pinref part="U$1" gate="G$2" pin="FMC_D17/PH9"/> -<wire x1="93.98" y1="22.86" x2="116.84" y2="22.86" width="0.1524" layer="91"/> +<pinref part="U$1" gate="FMC" pin="FMC_A16/PD11"/> +<wire x1="58.42" y1="15.24" x2="66.04" y2="15.24" width="0.1524" layer="91"/> </segment> </net> -<net name="FMC_D16" class="2"> +<net name="FMC_A17" class="3"> <segment> -<pinref part="U$1" gate="G$2" pin="FMC_D16/PH8"/> -<wire x1="93.98" y1="20.32" x2="116.84" y2="20.32" width="0.1524" layer="91"/> +<pinref part="U$1" gate="FMC" pin="FMC_A17/PD12"/> +<wire x1="58.42" y1="12.7" x2="66.04" y2="12.7" width="0.1524" layer="91"/> </segment> </net> -<net name="FMC_D12" class="2"> +<net name="FMC_A18" class="3"> <segment> -<pinref part="U$1" gate="G$2" pin="FMC_D12/PE15"/> -<wire x1="93.98" y1="-2.54" x2="116.84" y2="-2.54" width="0.1524" layer="91"/> +<pinref part="U$1" gate="FMC" pin="FMC_A18/PD13"/> +<wire x1="58.42" y1="10.16" x2="66.04" y2="10.16" width="0.1524" layer="91"/> </segment> </net> -<net name="FMC_D11" class="2"> +<net name="FMC_A19" class="3"> <segment> -<pinref part="U$1" gate="G$2" pin="FMC_D11/PE14"/> -<wire x1="93.98" y1="-5.08" x2="116.84" y2="-5.08" width="0.1524" layer="91"/> +<pinref part="U$1" gate="FMC" pin="FMC_A19/PE3"/> +<wire x1="58.42" y1="7.62" x2="66.04" y2="7.62" width="0.1524" layer="91"/> </segment> </net> -<net name="FMC_D10" class="2"> +<net name="FMC_A20" class="0"> <segment> -<pinref part="U$1" gate="G$2" pin="FMC_D10/PE13"/> -<wire x1="93.98" y1="-7.62" x2="116.84" y2="-7.62" width="0.1524" layer="91"/> +<pinref part="U$1" gate="FMC" pin="FMC_A20/PE4"/> +<wire x1="58.42" y1="5.08" x2="66.04" y2="5.08" width="0.1524" layer="91"/> </segment> </net> -<net name="FMC_D9" class="2"> +<net name="FMC_A21" class="0"> <segment> -<pinref part="U$1" gate="G$2" pin="FMC_D9/PE12"/> -<wire x1="93.98" y1="-10.16" x2="116.84" y2="-10.16" width="0.1524" layer="91"/> +<pinref part="U$1" gate="FMC" pin="FMC_A21/PE5"/> +<wire x1="58.42" y1="2.54" x2="66.04" y2="2.54" width="0.1524" layer="91"/> </segment> </net> -<net name="FMC_D8" class="2"> +<net name="FMC_A22" class="0"> <segment> -<pinref part="U$1" gate="G$2" pin="FMC_D8/PE11"/> -<wire x1="93.98" y1="-12.7" x2="116.84" y2="-12.7" width="0.1524" layer="91"/> +<pinref part="U$1" gate="FMC" pin="FMC_A22/PE6"/> +<wire x1="58.42" y1="0" x2="66.04" y2="0" width="0.1524" layer="91"/> </segment> </net> -<net name="FMC_D7" class="2"> +<net name="FMC_A23" class="0"> <segment> -<pinref part="U$1" gate="G$2" pin="FMC_D7/PE10"/> -<wire x1="93.98" y1="-15.24" x2="116.84" y2="-15.24" width="0.1524" layer="91"/> +<pinref part="U$1" gate="FMC" pin="FMC_A23/PE2"/> +<wire x1="58.42" y1="-2.54" x2="66.04" y2="-2.54" width="0.1524" layer="91"/> </segment> </net> -<net name="FMC_D6" class="2"> +<net name="FMC_A24" class="0"> <segment> -<pinref part="U$1" gate="G$2" pin="FMC_D6/PE9"/> -<wire x1="93.98" y1="-22.86" x2="116.84" y2="-22.86" width="0.1524" layer="91"/> +<pinref part="U$1" gate="FMC" pin="FMC_A24/PG13"/> +<wire x1="58.42" y1="-5.08" x2="66.04" y2="-5.08" width="0.1524" layer="91"/> </segment> </net> -<net name="FMC_D5" class="2"> +<net name="FMC_A25" class="0"> <segment> -<pinref part="U$1" gate="G$2" pin="FMC_D5/PE8"/> -<wire x1="93.98" y1="-25.4" x2="116.84" y2="-25.4" width="0.1524" layer="91"/> +<pinref part="U$1" gate="FMC" pin="FMC_A25/PG14"/> +<wire x1="58.42" y1="-7.62" x2="66.04" y2="-7.62" width="0.1524" layer="91"/> </segment> </net> -<net name="FMC_D21" class="2"> +<net name="FMC_D0" class="2"> <segment> -<pinref part="U$1" gate="G$3" pin="FMC_D21/PH13"/> -<wire x1="266.7" y1="170.18" x2="294.64" y2="170.18" width="0.1524" layer="91"/> +<pinref part="U$1" gate="FMC" pin="PD14/FMC_D0"/> +<wire x1="134.62" y1="55.88" x2="127" y2="55.88" width="0.1524" layer="91"/> </segment> </net> -<net name="FMC_A15" class="3"> +<net name="FMC_D1" class="2"> <segment> -<pinref part="U$1" gate="G$3" pin="FMC_A15/PG5"/> -<wire x1="266.7" y1="119.38" x2="294.64" y2="119.38" width="0.1524" layer="91"/> +<pinref part="U$1" gate="FMC" pin="PD15/FMC_D1"/> +<wire x1="134.62" y1="53.34" x2="127" y2="53.34" width="0.1524" layer="91"/> </segment> </net> <net name="FMC_D2" class="2"> <segment> -<pinref part="U$1" gate="G$4" pin="PD0/FMC_D2"/> -<wire x1="187.96" y1="17.78" x2="144.78" y2="17.78" width="0.1524" layer="91"/> +<pinref part="U$1" gate="FMC" pin="PD0/FMC_D2"/> +<wire x1="134.62" y1="50.8" x2="127" y2="50.8" width="0.1524" layer="91"/> </segment> </net> -<net name="FMC_NE1" class="0"> +<net name="FMC_D3" class="2"> <segment> -<pinref part="U$1" gate="G$4" pin="PD7/FMC_NE1/FMC_NCE2"/> -<wire x1="187.96" y1="-5.08" x2="180.34" y2="-5.08" width="0.1524" layer="91"/> -<label x="180.34" y="-5.08" size="1.27" layer="95" rot="R180" xref="yes"/> +<pinref part="U$1" gate="FMC" pin="PD1/FMC_D3"/> +<wire x1="134.62" y1="48.26" x2="127" y2="48.26" width="0.1524" layer="91"/> </segment> </net> -<net name="OSC_OUT" class="0"> -<segment> -<wire x1="368.3" y1="38.1" x2="375.92" y2="38.1" width="0.1524" layer="91"/> -<pinref part="C14" gate="G$1" pin="2"/> -<wire x1="375.92" y1="38.1" x2="375.92" y2="10.16" width="0.1524" layer="91"/> -<wire x1="375.92" y1="38.1" x2="383.54" y2="38.1" width="0.1524" layer="91"/> -<junction x="375.92" y="38.1"/> -<label x="373.38" y="17.78" size="1.778" layer="95" rot="R270"/> -<pinref part="Q4" gate="G$1" pin="X2"/> -</segment> +<net name="FMC_D4" class="2"> <segment> -<pinref part="U$1" gate="G$1" pin="OSC_OUT/PH1"/> -<wire x1="93.98" y1="137.16" x2="104.14" y2="137.16" width="0.1524" layer="91"/> -<label x="97.79" y="137.16" size="1.27" layer="95"/> +<pinref part="U$1" gate="FMC" pin="PE7/FMC_D4"/> +<wire x1="134.62" y1="45.72" x2="127" y2="45.72" width="0.1524" layer="91"/> </segment> </net> -<net name="OSC_IN" class="0"> -<segment> -<pinref part="U$1" gate="G$1" pin="OSC_IN/PH0"/> -<wire x1="93.98" y1="134.62" x2="104.14" y2="134.62" width="0.1524" layer="91"/> -<label x="97.79" y="134.62" size="1.27" layer="95"/> -</segment> +<net name="FMC_D5" class="2"> <segment> -<pinref part="R12" gate="G$1" pin="1"/> -<wire x1="350.52" y1="22.86" x2="350.52" y2="10.16" width="0.1524" layer="91"/> -<label x="347.98" y="17.78" size="1.778" layer="95" rot="R270"/> +<wire x1="134.62" y1="43.18" x2="127" y2="43.18" width="0.1524" layer="91"/> +<pinref part="U$1" gate="FMC" pin="PE8/FMC_D5"/> </segment> </net> -<net name="SWDIO" class="0"> -<segment> -<pinref part="U$2" gate="G$1" pin="SWDIO"/> -<wire x1="436.88" y1="38.1" x2="434.34" y2="38.1" width="0.1524" layer="91"/> -<label x="434.34" y="38.1" size="1.27" layer="95" rot="R180"/> -</segment> +<net name="FMC_D6" class="2"> <segment> -<pinref part="U$1" gate="G$3" pin="JTMS-SWDIO/PA13"/> -<wire x1="266.7" y1="160.02" x2="274.32" y2="160.02" width="0.1524" layer="91"/> -<label x="275.59" y="160.02" size="1.27" layer="95"/> +<pinref part="U$1" gate="FMC" pin="PE9/FMC_D6"/> +<wire x1="134.62" y1="40.64" x2="127" y2="40.64" width="0.1524" layer="91"/> </segment> </net> -<net name="SWDCLK" class="0"> -<segment> -<pinref part="U$2" gate="G$1" pin="SWDCLK"/> -<wire x1="436.88" y1="35.56" x2="434.34" y2="35.56" width="0.1524" layer="91"/> -<label x="434.34" y="35.56" size="1.27" layer="95" rot="R180"/> -</segment> +<net name="FMC_D7" class="2"> <segment> -<pinref part="U$1" gate="G$4" pin="PA14/JTCK-SWCLK"/> -<wire x1="187.96" y1="30.48" x2="180.34" y2="30.48" width="0.1524" layer="91"/> -<label x="180.34" y="30.48" size="1.27" layer="95" rot="R180"/> +<pinref part="U$1" gate="FMC" pin="PE10/FMC_D7"/> +<wire x1="134.62" y1="38.1" x2="127" y2="38.1" width="0.1524" layer="91"/> </segment> </net> -<net name="NRST" class="0"> -<segment> -<pinref part="U$2" gate="G$1" pin="NRST"/> -<pinref part="C40" gate="G$1" pin="1"/> -<wire x1="436.88" y1="25.4" x2="436.88" y2="30.48" width="0.1524" layer="91"/> -<wire x1="436.88" y1="30.48" x2="434.34" y2="30.48" width="0.1524" layer="91"/> -<junction x="436.88" y="30.48"/> -<label x="434.34" y="30.48" size="1.27" layer="95" rot="R180"/> -</segment> +<net name="FMC_D8" class="2"> <segment> -<pinref part="U$1" gate="G$1" pin="NRST@34"/> -<wire x1="96.52" y1="139.7" x2="104.14" y2="139.7" width="0.1524" layer="91"/> -<label x="100.33" y="139.7" size="1.27" layer="95"/> +<pinref part="U$1" gate="FMC" pin="PE11/FMC_D8"/> +<wire x1="134.62" y1="35.56" x2="127" y2="35.56" width="0.1524" layer="91"/> </segment> </net> -<net name="VCAP2" class="0"> +<net name="FMC_D9" class="2"> <segment> -<pinref part="U$1" gate="G$3" pin="VCAP2@148"/> -<wire x1="269.24" y1="198.12" x2="274.32" y2="198.12" width="0.1524" layer="91"/> -<pinref part="C38" gate="G$1" pin="2"/> -<wire x1="274.32" y1="198.12" x2="274.32" y2="200.66" width="0.1524" layer="91"/> -<pinref part="C57" gate="G$1" pin="2"/> -<wire x1="279.4" y1="203.2" x2="279.4" y2="200.66" width="0.1524" layer="91"/> -<wire x1="279.4" y1="200.66" x2="274.32" y2="200.66" width="0.1524" layer="91"/> -<wire x1="274.32" y1="200.66" x2="274.32" y2="203.2" width="0.1524" layer="91"/> -<junction x="274.32" y="200.66"/> +<pinref part="U$1" gate="FMC" pin="PE12/FMC_D9"/> +<wire x1="134.62" y1="33.02" x2="127" y2="33.02" width="0.1524" layer="91"/> </segment> </net> -<net name="VCAP1" class="0"> +<net name="FMC_D10" class="2"> <segment> -<wire x1="96.52" y1="53.34" x2="101.6" y2="53.34" width="0.1524" layer="91"/> -<pinref part="C39" gate="G$1" pin="2"/> -<wire x1="101.6" y1="53.34" x2="101.6" y2="55.88" width="0.1524" layer="91"/> -<pinref part="U$1" gate="G$2" pin="VCAP1@92"/> -<pinref part="C56" gate="G$1" pin="2"/> -<wire x1="106.68" y1="58.42" x2="106.68" y2="55.88" width="0.1524" layer="91"/> -<wire x1="106.68" y1="55.88" x2="101.6" y2="55.88" width="0.1524" layer="91"/> -<wire x1="101.6" y1="55.88" x2="101.6" y2="58.42" width="0.1524" layer="91"/> -<junction x="101.6" y="55.88"/> +<pinref part="U$1" gate="FMC" pin="PE13/FMC_D10"/> +<wire x1="134.62" y1="30.48" x2="127" y2="30.48" width="0.1524" layer="91"/> </segment> </net> -<net name="BOOT0" class="1"> +<net name="FMC_D11" class="2"> <segment> -<pinref part="U$1" gate="G$4" pin="BOOT0@197"/> -<wire x1="269.24" y1="-43.18" x2="274.32" y2="-43.18" width="0.1524" layer="91"/> -<pinref part="R10" gate="G$1" pin="2"/> +<pinref part="U$1" gate="FMC" pin="PE14/FMC_D11"/> +<wire x1="134.62" y1="27.94" x2="127" y2="27.94" width="0.1524" layer="91"/> </segment> </net> -<net name="N$21" class="0"> +<net name="FMC_D12" class="2"> <segment> -<pinref part="C15" gate="G$1" pin="2"/> -<wire x1="358.14" y1="38.1" x2="350.52" y2="38.1" width="0.1524" layer="91"/> -<wire x1="350.52" y1="38.1" x2="342.9" y2="38.1" width="0.1524" layer="91"/> -<wire x1="350.52" y1="38.1" x2="350.52" y2="33.02" width="0.1524" layer="91"/> -<junction x="350.52" y="38.1"/> -<pinref part="R12" gate="G$1" pin="2"/> -<pinref part="Q4" gate="G$1" pin="X1"/> +<pinref part="U$1" gate="FMC" pin="PE15/FMC_D12"/> +<wire x1="134.62" y1="25.4" x2="127" y2="25.4" width="0.1524" layer="91"/> </segment> </net> -<net name="FT_TXD" class="0"> +<net name="FMC_D13" class="2"> <segment> -<pinref part="U$1" gate="G$1" pin="USART2_RX/PA3"/> -<wire x1="93.98" y1="182.88" x2="101.6" y2="182.88" width="0.1524" layer="91"/> -<label x="101.6" y="182.88" size="1.27" layer="95" xref="yes"/> +<pinref part="U$1" gate="FMC" pin="PD8/FMC_D13"/> +<wire x1="134.62" y1="22.86" x2="127" y2="22.86" width="0.1524" layer="91"/> </segment> </net> -<net name="FT_RXD" class="0"> +<net name="FMC_D14" class="2"> <segment> -<pinref part="U$1" gate="G$1" pin="USART2_TX/PA2"/> -<wire x1="93.98" y1="170.18" x2="101.6" y2="170.18" width="0.1524" layer="91"/> -<label x="101.6" y="170.18" size="1.27" layer="95" xref="yes"/> +<pinref part="U$1" gate="FMC" pin="PD9/FMC_D14"/> +<wire x1="134.62" y1="20.32" x2="127" y2="20.32" width="0.1524" layer="91"/> </segment> </net> -<net name="ARM_LED1" class="0"> -<segment> -<pinref part="U$1" gate="G$2" pin="PJ4"/> -<wire x1="15.24" y1="-2.54" x2="10.16" y2="-2.54" width="0.1524" layer="91"/> -<label x="2.54" y="-2.54" size="1.27" layer="95"/> -</segment> +<net name="FMC_D15" class="2"> <segment> -<wire x1="403.86" y1="-20.32" x2="398.78" y2="-20.32" width="0.1524" layer="91"/> -<label x="398.78" y="-20.32" size="1.27" layer="95" rot="R180"/> -<pinref part="R8" gate="A" pin="5"/> +<pinref part="U$1" gate="FMC" pin="PD10/FMC_D15"/> +<wire x1="134.62" y1="17.78" x2="127" y2="17.78" width="0.1524" layer="91"/> </segment> </net> -<net name="ARM_LED2" class="0"> -<segment> -<pinref part="U$1" gate="G$2" pin="PJ3"/> -<wire x1="15.24" y1="0" x2="10.16" y2="0" width="0.1524" layer="91"/> -<label x="2.54" y="0" size="1.27" layer="95"/> -</segment> +<net name="FMC_D16" class="2"> <segment> -<wire x1="403.86" y1="-22.86" x2="398.78" y2="-22.86" width="0.1524" layer="91"/> -<label x="398.78" y="-22.86" size="1.27" layer="95" rot="R180"/> -<pinref part="R8" gate="A" pin="6"/> +<pinref part="U$1" gate="FMC" pin="PH8/FMC_D16"/> +<wire x1="134.62" y1="15.24" x2="127" y2="15.24" width="0.1524" layer="91"/> </segment> </net> -<net name="ARM_LED3" class="0"> -<segment> -<pinref part="U$1" gate="G$2" pin="PJ2"/> -<wire x1="15.24" y1="2.54" x2="10.16" y2="2.54" width="0.1524" layer="91"/> -<label x="2.54" y="2.54" size="1.27" layer="95"/> -</segment> +<net name="FMC_D17" class="2"> <segment> -<wire x1="403.86" y1="-25.4" x2="398.78" y2="-25.4" width="0.1524" layer="91"/> -<label x="398.78" y="-25.4" size="1.27" layer="95" rot="R180"/> -<pinref part="R8" gate="A" pin="7"/> +<pinref part="U$1" gate="FMC" pin="PH9/FMC_D17"/> +<wire x1="134.62" y1="12.7" x2="127" y2="12.7" width="0.1524" layer="91"/> </segment> </net> -<net name="ARM_LED4" class="0"> -<segment> -<pinref part="U$1" gate="G$2" pin="PJ1"/> -<wire x1="15.24" y1="5.08" x2="10.16" y2="5.08" width="0.1524" layer="91"/> -<label x="2.54" y="5.08" size="1.27" layer="95"/> -</segment> +<net name="FMC_D18" class="2"> <segment> -<wire x1="403.86" y1="-27.94" x2="398.78" y2="-27.94" width="0.1524" layer="91"/> -<label x="398.78" y="-27.94" size="1.27" layer="95" rot="R180"/> -<pinref part="R8" gate="A" pin="8"/> +<pinref part="U$1" gate="FMC" pin="PH10/FMC_D18"/> +<wire x1="134.62" y1="10.16" x2="127" y2="10.16" width="0.1524" layer="91"/> </segment> </net> -<net name="AVR_GPIO_11" class="0"> +<net name="FMC_D19" class="2"> <segment> -<wire x1="15.24" y1="154.94" x2="12.7" y2="154.94" width="0.1524" layer="91"/> -<label x="12.7" y="154.94" size="1.27" layer="95" rot="R180" xref="yes"/> -<pinref part="U$1" gate="G$1" pin="PI11"/> +<pinref part="U$1" gate="FMC" pin="PH11/FMC_D19"/> +<wire x1="134.62" y1="7.62" x2="127" y2="7.62" width="0.1524" layer="91"/> </segment> </net> -<net name="AVR_GPIO_10" class="0"> +<net name="FMC_D20" class="2"> <segment> -<wire x1="15.24" y1="167.64" x2="12.7" y2="167.64" width="0.1524" layer="91"/> -<label x="12.7" y="167.64" size="1.27" layer="95" rot="R180" xref="yes"/> -<pinref part="U$1" gate="G$1" pin="PC13"/> +<pinref part="U$1" gate="FMC" pin="PH12/FMC_D20"/> +<wire x1="134.62" y1="5.08" x2="127" y2="5.08" width="0.1524" layer="91"/> </segment> </net> -<net name="RTC_SCL" class="0"> +<net name="FMC_D21" class="2"> <segment> -<pinref part="U$1" gate="G$1" pin="I2C2_SCL/PH4"/> -<wire x1="93.98" y1="177.8" x2="101.6" y2="177.8" width="0.1524" layer="91"/> -<label x="101.6" y="177.8" size="1.27" layer="95" xref="yes"/> +<pinref part="U$1" gate="FMC" pin="PH13/FMC_D21"/> +<wire x1="134.62" y1="2.54" x2="127" y2="2.54" width="0.1524" layer="91"/> </segment> </net> -<net name="RTC_SDA" class="0"> +<net name="FMC_D22" class="2"> <segment> -<pinref part="U$1" gate="G$1" pin="I2C2_SDA/FMC_SDNWE/PH5"/> -<wire x1="93.98" y1="180.34" x2="101.6" y2="180.34" width="0.1524" layer="91"/> -<label x="101.6" y="180.34" size="1.27" layer="95" xref="yes"/> +<pinref part="U$1" gate="FMC" pin="PH14/FMC_D22"/> +<wire x1="134.62" y1="0" x2="127" y2="0" width="0.1524" layer="91"/> </segment> </net> -<net name="RTC_MFP" class="0"> +<net name="FMC_D23" class="2"> <segment> -<pinref part="U$1" gate="G$1" pin="FMC_SDNE0/PH3"/> -<wire x1="93.98" y1="175.26" x2="101.6" y2="175.26" width="0.1524" layer="91"/> -<label x="101.6" y="175.26" size="1.27" layer="95" xref="yes"/> +<pinref part="U$1" gate="FMC" pin="PH15/FMC_D23"/> +<wire x1="134.62" y1="-2.54" x2="127" y2="-2.54" width="0.1524" layer="91"/> </segment> </net> -<net name="N$17" class="0"> +<net name="FMC_D24" class="2"> <segment> -<pinref part="LED5" gate="G$1" pin="A"/> -<wire x1="424.18" y1="-20.32" x2="431.8" y2="-20.32" width="0.1524" layer="91"/> -<pinref part="R8" gate="A" pin="4"/> +<pinref part="U$1" gate="FMC" pin="PI0/FMC_D24"/> +<wire x1="134.62" y1="-5.08" x2="127" y2="-5.08" width="0.1524" layer="91"/> </segment> </net> -<net name="N$18" class="0"> +<net name="FMC_D25" class="2"> <segment> -<pinref part="LED6" gate="G$1" pin="A"/> -<wire x1="424.18" y1="-22.86" x2="426.72" y2="-22.86" width="0.1524" layer="91"/> -<pinref part="R8" gate="A" pin="3"/> +<pinref part="U$1" gate="FMC" pin="PI1/FMC_D25"/> +<wire x1="134.62" y1="-7.62" x2="127" y2="-7.62" width="0.1524" layer="91"/> </segment> </net> -<net name="N$19" class="0"> +<net name="FMC_D26" class="2"> <segment> -<pinref part="LED7" gate="G$1" pin="A"/> -<wire x1="424.18" y1="-25.4" x2="431.8" y2="-25.4" width="0.1524" layer="91"/> -<pinref part="R8" gate="A" pin="2"/> +<pinref part="U$1" gate="FMC" pin="PI2/FMC_D26"/> +<wire x1="134.62" y1="-10.16" x2="127" y2="-10.16" width="0.1524" layer="91"/> </segment> </net> -<net name="N$20" class="0"> +<net name="FMC_D27" class="2"> <segment> -<pinref part="LED8" gate="G$1" pin="A"/> -<wire x1="424.18" y1="-27.94" x2="426.72" y2="-27.94" width="0.1524" layer="91"/> -<pinref part="R8" gate="A" pin="1"/> +<pinref part="U$1" gate="FMC" pin="PI3/FMC_D27"/> +<wire x1="134.62" y1="-12.7" x2="127" y2="-12.7" width="0.1524" layer="91"/> </segment> </net> -<net name="FPGA_DONE" class="0"> +<net name="FMC_D28" class="2"> <segment> -<pinref part="U$1" gate="G$1" pin="PC1"/> -<wire x1="93.98" y1="144.78" x2="104.14" y2="144.78" width="0.1524" layer="91"/> -<label x="104.14" y="144.78" size="1.27" layer="95" xref="yes"/> +<pinref part="U$1" gate="FMC" pin="PI6/FMC_D28"/> +<wire x1="134.62" y1="-15.24" x2="127" y2="-15.24" width="0.1524" layer="91"/> </segment> </net> -<net name="FPGA_IRQ_N_0" class="0"> +<net name="FMC_D29" class="2"> <segment> -<wire x1="187.96" y1="-25.4" x2="180.34" y2="-25.4" width="0.1524" layer="91"/> -<label x="180.34" y="-25.4" size="1.27" layer="95" rot="R180" xref="yes"/> -<pinref part="U$1" gate="G$4" pin="PG12/FMC_NE4"/> +<pinref part="U$1" gate="FMC" pin="PI7/FMC_D29"/> +<wire x1="134.62" y1="-17.78" x2="127" y2="-17.78" width="0.1524" layer="91"/> </segment> </net> -<net name="FPGA_IRQ_N_1" class="0"> +<net name="FMC_D30" class="2"> <segment> -<wire x1="187.96" y1="-22.86" x2="180.34" y2="-22.86" width="0.1524" layer="91"/> -<label x="180.34" y="-22.86" size="1.27" layer="95" rot="R180" xref="yes"/> -<pinref part="U$1" gate="G$4" pin="PG11/FMC_NCE4_2"/> +<pinref part="U$1" gate="FMC" pin="PI9/FMC_D30"/> +<wire x1="134.62" y1="-20.32" x2="127" y2="-20.32" width="0.1524" layer="91"/> </segment> </net> -<net name="FPGA_IRQ_N_2" class="0"> +<net name="FMC_D31" class="2"> <segment> -<wire x1="187.96" y1="-20.32" x2="180.34" y2="-20.32" width="0.1524" layer="91"/> -<label x="180.34" y="-20.32" size="1.27" layer="95" rot="R180" xref="yes"/> -<pinref part="U$1" gate="G$4" pin="PG10/FMC_NCE4_1/FMC_NE3"/> +<pinref part="U$1" gate="FMC" pin="PI10/FMC_D31"/> +<wire x1="134.62" y1="-22.86" x2="127" y2="-22.86" width="0.1524" layer="91"/> </segment> </net> -<net name="FPGA_IRQ_N_3" class="0"> +<net name="FMC_SDCKE0" class="0"> <segment> -<wire x1="187.96" y1="-17.78" x2="180.34" y2="-17.78" width="0.1524" layer="91"/> -<label x="180.34" y="-17.78" size="1.27" layer="95" rot="R180" xref="yes"/> -<pinref part="U$1" gate="G$4" pin="PG9/FMC_NE2/FMC_NCE3"/> +<wire x1="127" y1="-45.72" x2="134.62" y2="-45.72" width="0.1524" layer="91"/> +<label x="134.62" y="-45.72" size="1.27" layer="95" xref="yes"/> +<pinref part="U$1" gate="FMC" pin="PC3/FMC_SDCKE0"/> </segment> </net> -<net name="FPGA_PROGRAM_B" class="0"> +<net name="FMC_SDNE0" class="0"> <segment> -<pinref part="U$1" gate="G$4" pin="PJ15"/> -<wire x1="187.96" y1="-15.24" x2="180.34" y2="-15.24" width="0.1524" layer="91"/> -<label x="180.34" y="-15.24" size="1.27" layer="95" rot="R180" xref="yes"/> +<wire x1="127" y1="-38.1" x2="134.62" y2="-38.1" width="0.1524" layer="91"/> +<label x="134.62" y="-38.1" size="1.27" layer="95" xref="yes"/> +<pinref part="U$1" gate="FMC" pin="PC2/FMC_SDNE0"/> </segment> </net> -<net name="FPGA_INIT_B" class="0"> +<net name="FMC_SDNWE" class="0"> <segment> -<pinref part="U$1" gate="G$4" pin="PJ14"/> -<wire x1="187.96" y1="-12.7" x2="180.34" y2="-12.7" width="0.1524" layer="91"/> -<label x="180.34" y="-12.7" size="1.27" layer="95" rot="R180" xref="yes"/> +<wire x1="127" y1="-33.02" x2="134.62" y2="-33.02" width="0.1524" layer="91"/> +<label x="134.62" y="-33.02" size="1.27" layer="95" xref="yes"/> +<pinref part="U$1" gate="FMC" pin="PC0/FMC_SDNWE"/> </segment> </net> -<net name="ARM_FPGA_CFG_SCLK" class="0"> +<net name="FMC_SDCLK" class="0"> <segment> -<wire x1="187.96" y1="185.42" x2="180.34" y2="185.42" width="0.1524" layer="91"/> -<label x="180.34" y="185.42" size="1.27" layer="95" rot="R180" xref="yes"/> -<pinref part="U$1" gate="G$3" pin="PB13/SPI2_SCK"/> +<wire x1="127" y1="-30.48" x2="134.62" y2="-30.48" width="0.1524" layer="91"/> +<label x="134.62" y="-30.48" size="1.27" layer="95" xref="yes"/> +<pinref part="U$1" gate="FMC" pin="PG8/FMC_SDCLK"/> </segment> </net> -<net name="ARM_FPGA_CFG_MISO" class="0"> +<net name="FT_TXD" class="0"> <segment> -<wire x1="187.96" y1="182.88" x2="180.34" y2="182.88" width="0.1524" layer="91"/> -<label x="180.34" y="182.88" size="1.27" layer="95" rot="R180" xref="yes"/> -<pinref part="U$1" gate="G$3" pin="PB14/SPI2_MISO"/> +<pinref part="U$1" gate="IO" pin="USART2_RX/PA3"/> +<wire x1="-124.46" y1="71.12" x2="-132.08" y2="71.12" width="0.1524" layer="91"/> +<label x="-132.08" y="71.12" size="1.27" layer="95" rot="R180" xref="yes"/> </segment> </net> -<net name="ARM_FPGA_CFG_MOSI" class="0"> +<net name="FT_RXD" class="0"> <segment> -<wire x1="187.96" y1="180.34" x2="180.34" y2="180.34" width="0.1524" layer="91"/> -<label x="180.34" y="180.34" size="1.27" layer="95" rot="R180" xref="yes"/> -<pinref part="U$1" gate="G$3" pin="PB15/SPI2_MOSI"/> +<pinref part="U$1" gate="IO" pin="USART2_TX/PA2"/> +<wire x1="-124.46" y1="73.66" x2="-132.08" y2="73.66" width="0.1524" layer="91"/> +<label x="-132.08" y="73.66" size="1.27" layer="95" rot="R180" xref="yes"/> </segment> </net> -<net name="ARM_FPGA_CFG_CONTROL" class="0"> +<net name="ARM_LED1" class="0"> <segment> -<wire x1="187.96" y1="152.4" x2="180.34" y2="152.4" width="0.1524" layer="91"/> -<label x="180.34" y="152.4" size="1.27" layer="95" rot="R180" xref="yes"/> -<pinref part="U$1" gate="G$3" pin="PJ6"/> +<wire x1="-45.72" y1="-7.62" x2="-38.1" y2="-7.62" width="0.1524" layer="91"/> +<label x="-38.1" y="-7.62" size="1.27" layer="95" xref="yes"/> +<pinref part="U$1" gate="IO" pin="PJ4"/> </segment> </net> -<net name="FMC_A20" class="0"> +<net name="ARM_LED2" class="0"> <segment> -<pinref part="U$1" gate="G$1" pin="PE4/FMC_A20"/> -<wire x1="-15.24" y1="180.34" x2="15.24" y2="180.34" width="0.1524" layer="91"/> +<wire x1="-45.72" y1="-5.08" x2="-38.1" y2="-5.08" width="0.1524" layer="91"/> +<label x="-38.1" y="-5.08" size="1.27" layer="95" xref="yes"/> +<pinref part="U$1" gate="IO" pin="PJ3"/> </segment> </net> -<net name="FMC_A21" class="0"> +<net name="ARM_LED3" class="0"> <segment> -<pinref part="U$1" gate="G$1" pin="PE5/FMC_A21"/> -<wire x1="-15.24" y1="177.8" x2="15.24" y2="177.8" width="0.1524" layer="91"/> +<wire x1="-45.72" y1="-2.54" x2="-38.1" y2="-2.54" width="0.1524" layer="91"/> +<label x="-38.1" y="-2.54" size="1.27" layer="95" xref="yes"/> +<pinref part="U$1" gate="IO" pin="PJ2"/> </segment> </net> -<net name="FMC_A22" class="0"> +<net name="ARM_LED4" class="0"> <segment> -<pinref part="U$1" gate="G$1" pin="PE6/FMC_A22"/> -<wire x1="-15.24" y1="175.26" x2="15.24" y2="175.26" width="0.1524" layer="91"/> +<wire x1="-45.72" y1="0" x2="-38.1" y2="0" width="0.1524" layer="91"/> +<label x="-38.1" y="0" size="1.27" layer="95" xref="yes"/> +<pinref part="U$1" gate="IO" pin="PJ1"/> </segment> </net> -<net name="FMC_A23" class="0"> +<net name="AVR_GPIO_11" class="0"> <segment> -<pinref part="U$1" gate="G$1" pin="PE2/FMC_A23"/> -<wire x1="-15.24" y1="185.42" x2="15.24" y2="185.42" width="0.1524" layer="91"/> +<wire x1="-132.08" y1="-68.58" x2="-124.46" y2="-68.58" width="0.1524" layer="91"/> +<label x="-132.08" y="-68.58" size="1.27" layer="95" rot="R180" xref="yes"/> </segment> </net> -<net name="FMC_A24" class="0"> +<net name="AVR_GPIO_10" class="0"> <segment> -<pinref part="U$1" gate="G$4" pin="PG13/FMC_A24"/> -<wire x1="144.78" y1="-27.94" x2="187.96" y2="-27.94" width="0.1524" layer="91"/> +<wire x1="-124.46" y1="-66.04" x2="-132.08" y2="-66.04" width="0.1524" layer="91"/> +<label x="-132.08" y="-66.04" size="1.27" layer="95" rot="R180" xref="yes"/> +<pinref part="U$1" gate="IO" pin="PC13"/> </segment> </net> -<net name="FMC_A25" class="0"> +<net name="RTC_SCL" class="0"> <segment> -<pinref part="U$1" gate="G$4" pin="PG14/FMC_A25"/> -<wire x1="144.78" y1="-30.48" x2="187.96" y2="-30.48" width="0.1524" layer="91"/> +<pinref part="U$1" gate="IO" pin="I2C2_SCL/PH4"/> +<wire x1="-124.46" y1="-5.08" x2="-132.08" y2="-5.08" width="0.1524" layer="91"/> +<label x="-132.08" y="-5.08" size="1.27" layer="95" rot="R180" xref="yes"/> </segment> </net> -<net name="FMC_SDCKE0" class="0"> +<net name="RTC_SDA" class="0"> <segment> -<pinref part="U$1" gate="G$1" pin="FMC_SDCKE0/PC3"/> -<wire x1="93.98" y1="149.86" x2="104.14" y2="149.86" width="0.1524" layer="91"/> -<label x="104.14" y="149.86" size="1.27" layer="95" xref="yes"/> +<pinref part="U$1" gate="IO" pin="I2C2_SDA/FMC_SDNWE/PH5"/> +<wire x1="-124.46" y1="-2.54" x2="-132.08" y2="-2.54" width="0.1524" layer="91"/> +<label x="-132.08" y="-2.54" size="1.27" layer="95" rot="R180" xref="yes"/> </segment> </net> -<net name="FMC_SDNE0" class="0"> +<net name="RTC_MFP" class="0"> <segment> -<pinref part="U$1" gate="G$1" pin="FMC_SDNE0/PC2"/> -<wire x1="93.98" y1="147.32" x2="104.14" y2="147.32" width="0.1524" layer="91"/> -<label x="104.14" y="147.32" size="1.27" layer="95" xref="yes"/> +<wire x1="-124.46" y1="-7.62" x2="-132.08" y2="-7.62" width="0.1524" layer="91"/> +<label x="-132.08" y="-7.62" size="1.27" layer="95" rot="R180" xref="yes"/> +<pinref part="U$1" gate="IO" pin="PH3/FMC_SDNE0"/> </segment> </net> -<net name="FMC_SDNWE" class="0"> +<net name="FPGA_IRQ_N_0" class="0"> <segment> -<pinref part="U$1" gate="G$1" pin="FMC_SDNWE/PC0"/> -<wire x1="93.98" y1="142.24" x2="104.14" y2="142.24" width="0.1524" layer="91"/> -<label x="104.14" y="142.24" size="1.27" layer="95" xref="yes"/> +<wire x1="-45.72" y1="-30.48" x2="-38.1" y2="-30.48" width="0.1524" layer="91"/> +<label x="-38.1" y="-30.48" size="1.27" layer="95" xref="yes"/> +<pinref part="U$1" gate="IO" pin="PJ13"/> </segment> </net> -<net name="FMC_SDNCAS" class="0"> +<net name="FPGA_IRQ_N_1" class="0"> <segment> -<pinref part="U$1" gate="G$4" pin="FMC_SDNCAS/PG15"/> -<wire x1="266.7" y1="-12.7" x2="274.32" y2="-12.7" width="0.1524" layer="91"/> -<label x="274.32" y="-12.7" size="1.27" layer="95" xref="yes"/> +<wire x1="-45.72" y1="-27.94" x2="-38.1" y2="-27.94" width="0.1524" layer="91"/> +<label x="-38.1" y="-27.94" size="1.27" layer="95" xref="yes"/> +<pinref part="U$1" gate="IO" pin="PJ12"/> </segment> </net> -<net name="FMC_SDNRAS" class="0"> +<net name="FPGA_IRQ_N_2" class="0"> <segment> -<pinref part="U$1" gate="G$2" pin="PF11/FMC_SDNRAS"/> -<wire x1="15.24" y1="-5.08" x2="10.16" y2="-5.08" width="0.1524" layer="91"/> -<label x="10.16" y="-5.08" size="1.27" layer="95" rot="R180" xref="yes"/> +<wire x1="-45.72" y1="-25.4" x2="-38.1" y2="-25.4" width="0.1524" layer="91"/> +<label x="-38.1" y="-25.4" size="1.27" layer="95" xref="yes"/> +<pinref part="U$1" gate="IO" pin="PJ11"/> </segment> </net> -<net name="FMC_NBL0" class="0"> +<net name="FPGA_IRQ_N_3" class="0"> <segment> -<pinref part="U$1" gate="G$4" pin="FMC_NBL0/PE0"/> -<wire x1="266.7" y1="10.16" x2="274.32" y2="10.16" width="0.1524" layer="91"/> -<label x="274.32" y="10.16" size="1.27" layer="95" xref="yes"/> +<wire x1="-45.72" y1="-22.86" x2="-38.1" y2="-22.86" width="0.1524" layer="91"/> +<label x="-38.1" y="-22.86" size="1.27" layer="95" xref="yes"/> +<pinref part="U$1" gate="IO" pin="PJ10"/> </segment> </net> -<net name="FMC_NBL1" class="0"> +<net name="FPGA_PROGRAM_B" class="0"> <segment> -<pinref part="U$1" gate="G$4" pin="FMC_NBL1/PE1"/> -<wire x1="266.7" y1="12.7" x2="274.32" y2="12.7" width="0.1524" layer="91"/> -<label x="274.32" y="12.7" size="1.27" layer="95" xref="yes"/> +<wire x1="-45.72" y1="-35.56" x2="-38.1" y2="-35.56" width="0.1524" layer="91"/> +<label x="-38.1" y="-35.56" size="1.27" layer="95" xref="yes"/> +<pinref part="U$1" gate="IO" pin="PJ15"/> </segment> </net> -<net name="FMC_NBL2" class="0"> +<net name="FPGA_INIT_B" class="0"> <segment> -<pinref part="U$1" gate="G$4" pin="FMC_NBL2/PI4"/> -<wire x1="266.7" y1="22.86" x2="274.32" y2="22.86" width="0.1524" layer="91"/> -<label x="274.32" y="22.86" size="1.27" layer="95" xref="yes"/> +<wire x1="-45.72" y1="-33.02" x2="-38.1" y2="-33.02" width="0.1524" layer="91"/> +<label x="-38.1" y="-33.02" size="1.27" layer="95" xref="yes"/> +<pinref part="U$1" gate="IO" pin="PJ14"/> </segment> </net> -<net name="FMC_NBL3" class="0"> +<net name="ARM_FPGA_CFG_SCLK" class="0"> <segment> -<pinref part="U$1" gate="G$4" pin="FMC_NBL3/PI5"/> -<wire x1="266.7" y1="25.4" x2="274.32" y2="25.4" width="0.1524" layer="91"/> -<label x="274.32" y="25.4" size="1.27" layer="95" xref="yes"/> +<wire x1="-124.46" y1="43.18" x2="-132.08" y2="43.18" width="0.1524" layer="91"/> +<label x="-132.08" y="43.18" size="1.27" layer="95" rot="R180" xref="yes"/> +<pinref part="U$1" gate="IO" pin="SPI2_SCK/PB13"/> </segment> </net> -<net name="FMC_SDCLK" class="0"> +<net name="ARM_FPGA_CFG_MISO" class="0"> <segment> -<pinref part="U$1" gate="G$3" pin="FMC_SDCLK/PG8"/> -<wire x1="266.7" y1="127" x2="274.32" y2="127" width="0.1524" layer="91"/> -<label x="274.32" y="127" size="1.27" layer="95" xref="yes"/> +<wire x1="-124.46" y1="40.64" x2="-132.08" y2="40.64" width="0.1524" layer="91"/> +<label x="-132.08" y="40.64" size="1.27" layer="95" rot="R180" xref="yes"/> +<pinref part="U$1" gate="IO" pin="SPI2_MISO/PB14"/> </segment> </net> -<net name="FMC_SDCKE1" class="0"> +<net name="ARM_FPGA_CFG_MOSI" class="0"> <segment> -<pinref part="U$1" gate="G$4" pin="FMC_SDCKE1/PB5"/> -<wire x1="266.7" y1="-5.08" x2="274.32" y2="-5.08" width="0.1524" layer="91"/> -<label x="274.32" y="-5.08" size="1.27" layer="95" xref="yes"/> +<wire x1="-124.46" y1="38.1" x2="-132.08" y2="38.1" width="0.1524" layer="91"/> +<label x="-132.08" y="38.1" size="1.27" layer="95" rot="R180" xref="yes"/> +<pinref part="U$1" gate="IO" pin="SPI2_MOSI/PB15"/> </segment> </net> -<net name="FMC_SDNE1" class="0"> +<net name="ARM_FPGA_CFG_CONTROL" class="0"> <segment> -<pinref part="U$1" gate="G$4" pin="FMC_SDNE1/PB6"/> -<wire x1="266.7" y1="-2.54" x2="274.32" y2="-2.54" width="0.1524" layer="91"/> -<label x="274.32" y="-2.54" size="1.27" layer="95" xref="yes"/> +<wire x1="-45.72" y1="-12.7" x2="-38.1" y2="-12.7" width="0.1524" layer="91"/> +<label x="-38.1" y="-12.7" size="1.27" layer="95" xref="yes"/> +<pinref part="U$1" gate="IO" pin="PJ6"/> </segment> </net> <net name="KSM_PROM_SCLK" class="0"> <segment> -<pinref part="U$1" gate="G$2" pin="PA5/SPI1_SCK"/> -<wire x1="15.24" y1="35.56" x2="7.62" y2="35.56" width="0.1524" layer="91"/> -<label x="7.62" y="35.56" size="1.27" layer="95" rot="R180" xref="yes"/> +<wire x1="-124.46" y1="30.48" x2="-132.08" y2="30.48" width="0.1524" layer="91"/> +<label x="-132.08" y="30.48" size="1.27" layer="95" rot="R180" xref="yes"/> +<pinref part="U$1" gate="IO" pin="SPI1_SCK/PA5"/> </segment> </net> <net name="KSM_PROM_MISO" class="0"> <segment> -<pinref part="U$1" gate="G$2" pin="PA6/SPI1_MISO"/> -<wire x1="15.24" y1="33.02" x2="7.62" y2="33.02" width="0.1524" layer="91"/> -<label x="7.62" y="33.02" size="1.27" layer="95" rot="R180" xref="yes"/> +<wire x1="-124.46" y1="27.94" x2="-132.08" y2="27.94" width="0.1524" layer="91"/> +<label x="-132.08" y="27.94" size="1.27" layer="95" rot="R180" xref="yes"/> +<pinref part="U$1" gate="IO" pin="SPI1_MISO/PA6"/> </segment> </net> <net name="KSM_PROM_MOSI" class="0"> <segment> -<pinref part="U$1" gate="G$2" pin="PA7/SPI1_MOSI"/> -<wire x1="15.24" y1="30.48" x2="7.62" y2="30.48" width="0.1524" layer="91"/> -<label x="7.62" y="30.48" size="1.27" layer="95" rot="R180" xref="yes"/> +<wire x1="-124.46" y1="25.4" x2="-132.08" y2="25.4" width="0.1524" layer="91"/> +<label x="-132.08" y="25.4" size="1.27" layer="95" rot="R180" xref="yes"/> +<pinref part="U$1" gate="IO" pin="SPI1_MOSI/PA7"/> </segment> </net> <net name="SDIO_CK" class="0"> <segment> -<pinref part="U$1" gate="G$4" pin="PC12/SPI3_MOSI/SDIO_CK"/> -<wire x1="187.96" y1="20.32" x2="180.34" y2="20.32" width="0.1524" layer="91"/> -<label x="180.34" y="20.32" size="1.27" layer="95" rot="R180" xref="yes"/> +<wire x1="-124.46" y1="15.24" x2="-132.08" y2="15.24" width="0.1524" layer="91"/> +<label x="-132.08" y="15.24" size="1.27" layer="95" rot="R180" xref="yes"/> +<pinref part="U$1" gate="IO" pin="SDIO_CK/SPI3_MOSI/PC12"/> </segment> </net> <net name="SDIO_CMD" class="0"> <segment> -<pinref part="U$1" gate="G$4" pin="PD2/SDIO_CMD"/> -<wire x1="187.96" y1="12.7" x2="180.34" y2="12.7" width="0.1524" layer="91"/> -<label x="180.34" y="12.7" size="1.27" layer="95" rot="R180" xref="yes"/> +<wire x1="-124.46" y1="17.78" x2="-132.08" y2="17.78" width="0.1524" layer="91"/> +<label x="-132.08" y="17.78" size="1.27" layer="95" rot="R180" xref="yes"/> +<pinref part="U$1" gate="IO" pin="SDIO_CMD/PD2"/> </segment> </net> <net name="SDIO_D3" class="0"> <segment> -<pinref part="U$1" gate="G$4" pin="PC11/SPI3_MISO/SDIO_D3"/> -<wire x1="187.96" y1="22.86" x2="180.34" y2="22.86" width="0.1524" layer="91"/> -<label x="180.34" y="22.86" size="1.27" layer="95" rot="R180" xref="yes"/> +<wire x1="-124.46" y1="5.08" x2="-132.08" y2="5.08" width="0.1524" layer="91"/> +<label x="-132.08" y="5.08" size="1.27" layer="95" rot="R180" xref="yes"/> +<pinref part="U$1" gate="IO" pin="SDIO_D3/SPI3_MISO/PC11"/> </segment> </net> <net name="SDIO_D2" class="0"> <segment> -<pinref part="U$1" gate="G$4" pin="PC10/SPI3_SCK/SDIO_D2"/> -<wire x1="187.96" y1="25.4" x2="180.34" y2="25.4" width="0.1524" layer="91"/> -<label x="180.34" y="25.4" size="1.27" layer="95" rot="R180" xref="yes"/> +<wire x1="-124.46" y1="7.62" x2="-132.08" y2="7.62" width="0.1524" layer="91"/> +<label x="-132.08" y="7.62" size="1.27" layer="95" rot="R180" xref="yes"/> +<pinref part="U$1" gate="IO" pin="SDIO_D2/SPI3_SCK/PC10"/> </segment> </net> <net name="SDIO_D0" class="0"> <segment> -<pinref part="U$1" gate="G$3" pin="SDIO_D0/PC8"/> -<wire x1="266.7" y1="142.24" x2="274.32" y2="142.24" width="0.1524" layer="91"/> -<label x="274.32" y="142.24" size="1.27" layer="95" xref="yes"/> +<wire x1="-124.46" y1="12.7" x2="-132.08" y2="12.7" width="0.1524" layer="91"/> +<label x="-132.08" y="12.7" size="1.27" layer="95" rot="R180" xref="yes"/> +<pinref part="U$1" gate="IO" pin="SDIO_D0/PC8"/> </segment> </net> <net name="SDIO_D1" class="0"> <segment> -<pinref part="U$1" gate="G$3" pin="SDIO_D1/PC9"/> -<wire x1="266.7" y1="144.78" x2="274.32" y2="144.78" width="0.1524" layer="91"/> -<label x="274.32" y="144.78" size="1.27" layer="95" xref="yes"/> +<wire x1="-124.46" y1="10.16" x2="-132.08" y2="10.16" width="0.1524" layer="91"/> +<label x="-132.08" y="10.16" size="1.27" layer="95" rot="R180" xref="yes"/> +<pinref part="U$1" gate="IO" pin="SDIO_D1/PC9"/> </segment> </net> <net name="FT_RTS" class="0"> <segment> -<pinref part="U$1" gate="G$1" pin="USART2_RTS/PA1"/> -<wire x1="93.98" y1="167.64" x2="101.6" y2="167.64" width="0.1524" layer="91"/> -<label x="101.6" y="167.64" size="1.27" layer="95" xref="yes"/> +<pinref part="U$1" gate="IO" pin="USART2_RTS/PA1"/> +<wire x1="-124.46" y1="68.58" x2="-132.08" y2="68.58" width="0.1524" layer="91"/> +<label x="-132.08" y="68.58" size="1.27" layer="95" rot="R180" xref="yes"/> </segment> </net> <net name="FT_CTS" class="0"> <segment> -<pinref part="U$1" gate="G$1" pin="WKUP/USART2_CTS/PA0"/> -<wire x1="93.98" y1="165.1" x2="101.6" y2="165.1" width="0.1524" layer="91"/> -<label x="101.6" y="165.1" size="1.27" layer="95" xref="yes"/> +<wire x1="-124.46" y1="66.04" x2="-132.08" y2="66.04" width="0.1524" layer="91"/> +<label x="-132.08" y="66.04" size="1.27" layer="95" rot="R180" xref="yes"/> +<pinref part="U$1" gate="IO" pin="USART2_CTS/WKUP/PA0"/> +</segment> +</net> +<net name="FT_MGMT_RXD" class="0"> +<segment> +<wire x1="-124.46" y1="55.88" x2="-132.08" y2="55.88" width="0.1524" layer="91"/> +<pinref part="U$1" gate="IO" pin="USART1_TX/PA9"/> +<label x="-132.08" y="55.88" size="1.27" layer="95" rot="R180" xref="yes"/> </segment> </net> -<net name="N$23" class="0"> +<net name="FT_MGMT_TXD" class="0"> <segment> -<pinref part="U$1" gate="G$3" pin="USART1_TX/PA9"/> -<wire x1="266.7" y1="149.86" x2="274.32" y2="149.86" width="0.1524" layer="91"/> +<wire x1="-124.46" y1="58.42" x2="-132.08" y2="58.42" width="0.1524" layer="91"/> +<pinref part="U$1" gate="IO" pin="USART1_RX/PA10"/> +<label x="-132.08" y="58.42" size="1.27" layer="95" rot="R180" xref="yes"/> </segment> </net> -<net name="N$25" class="0"> +<net name="FT_MGMT_CTS" class="0"> <segment> -<pinref part="U$1" gate="G$3" pin="USART1_RX/PA10"/> -<wire x1="266.7" y1="152.4" x2="274.32" y2="152.4" width="0.1524" layer="91"/> +<wire x1="-124.46" y1="50.8" x2="-132.08" y2="50.8" width="0.1524" layer="91"/> +<pinref part="U$1" gate="IO" pin="USART1_CTS/PA11"/> +<label x="-132.08" y="50.8" size="1.27" layer="95" rot="R180" xref="yes"/> </segment> </net> -<net name="N$57" class="0"> +<net name="FT_MGMT_RTS" class="0"> <segment> -<pinref part="U$1" gate="G$3" pin="USART1_CTS/PA11"/> -<wire x1="266.7" y1="154.94" x2="274.32" y2="154.94" width="0.1524" layer="91"/> +<wire x1="-124.46" y1="53.34" x2="-132.08" y2="53.34" width="0.1524" layer="91"/> +<pinref part="U$1" gate="IO" pin="USART1_RTS/PA12"/> +<label x="-132.08" y="53.34" size="1.27" layer="95" rot="R180" xref="yes"/> </segment> </net> -<net name="N$58" class="0"> +<net name="FPGA_DONE" class="0"> <segment> -<pinref part="U$1" gate="G$3" pin="USART1_RTS/PA12"/> -<wire x1="266.7" y1="157.48" x2="274.32" y2="157.48" width="0.1524" layer="91"/> +<wire x1="-45.72" y1="-15.24" x2="-38.1" y2="-15.24" width="0.1524" layer="91"/> +<label x="-38.1" y="-15.24" size="1.27" layer="95" xref="yes"/> +<pinref part="U$1" gate="IO" pin="PJ7"/> </segment> </net> </nets> @@ -39313,12 +39232,12 @@ available GPIO on the ARM</text> <bus name="FMC_A[0..25]"> <segment> <wire x1="-134.62" y1="93.98" x2="-148.59" y2="93.98" width="0.762" layer="92"/> -<wire x1="-134.62" y1="93.98" x2="-134.62" y2="45.72" width="0.762" layer="92"/> +<wire x1="-134.62" y1="93.98" x2="-134.62" y2="48.26" width="0.762" layer="92"/> <label x="-151.13" y="96.52" size="1.778" layer="95"/> </segment> <segment> <wire x1="43.18" y1="91.44" x2="29.21" y2="91.44" width="0.762" layer="92"/> -<wire x1="43.18" y1="91.44" x2="43.18" y2="43.18" width="0.762" layer="92"/> +<wire x1="43.18" y1="91.44" x2="43.18" y2="45.72" width="0.762" layer="92"/> <label x="26.67" y="93.98" size="1.778" layer="95"/> </segment> </bus> @@ -40416,13 +40335,13 @@ GPIO output from RTC.</text> <text x="30.48" y="22.86" size="1.778" layer="91">Questions: 1) Which connector to use? -Haven't found good one with Eagle symbol. Some different kinds available. +Haven't found a good one with Eagle symbol. Some different kinds available. 2) Novena seems to have card reset capability (power control from MCU). Do we want the same? 3) Novena has two SD slots, and list power at 200mA. -Do we need special power for the SD card, or can we use VCCO_3V3?</text> +Do we need a separate power regulator for the SD card, or can we use VCCO_3V3?</text> <text x="-147.32" y="53.34" size="1.778" layer="91">Should we keep this separate chip or rather connect VBAT to the STM32 and use the internal RTC?</text> </plain> @@ -47234,7 +47153,7 @@ should be tweaked after experiments <approved hash="102,4,274.32,217.17,VCC,3V3,,,,"/> <approved hash="102,4,101.6,72.39,VCC,3V3,,,,"/> <approved hash="102,4,104.14,163.83,VCC,3V3,,,,"/> -<approved hash="102,8,124.46,60.96,VCC,FT_VCC3V3,,,,"/> +<approved hash="102,10,124.46,60.96,VCC,FT_VCC3V3,,,,"/> <approved hash="104,4,213.36,99.06,U$1G$3,VSS,GND,,,"/> <approved hash="104,4,218.44,99.06,U$1G$3,VSS,GND,,,"/> <approved hash="104,4,233.68,99.06,U$1G$3,VSS,GND,,,"/> @@ -47247,13 +47166,13 @@ should be tweaked after experiments <approved hash="104,4,238.76,-50.8,U$1G$4,VSS,GND,,,"/> <approved hash="104,4,246.38,58.42,U$1G$4,VDD,3V3,,,"/> <approved hash="104,4,436.88,43.18,U$2,VCC,3V3,,,"/> -<approved hash="104,8,45.72,73.66,U$3,VREGIN,FT_VREGIN,,,"/> -<approved hash="104,8,45.72,68.58,U$3,VCCD,FT_VCC3V3,,,"/> -<approved hash="104,8,45.72,66.04,U$3,VCCORE,FT_VCCORE,,,"/> -<approved hash="104,8,45.72,63.5,U$3,VCCA,FT_VCCA,,,"/> -<approved hash="104,8,63.5,5.08,U$3,AGND,GND,,,"/> -<approved hash="104,8,66.04,5.08,U$3,AGND,GND,,,"/> -<approved hash="104,8,68.58,5.08,U$3,AGND,GND,,,"/> +<approved hash="104,10,45.72,73.66,U$3,VREGIN,FT_VREGIN,,,"/> +<approved hash="104,10,45.72,68.58,U$3,VCCD,FT_VCC3V3,,,"/> +<approved hash="104,10,45.72,66.04,U$3,VCCORE,FT_VCCORE,,,"/> +<approved hash="104,10,45.72,63.5,U$3,VCCA,FT_VCCA,,,"/> +<approved hash="104,10,63.5,5.08,U$3,AGND,GND,,,"/> +<approved hash="104,10,66.04,5.08,U$3,AGND,GND,,,"/> +<approved hash="104,10,68.58,5.08,U$3,AGND,GND,,,"/> <approved hash="208,4,226.06,67.31,3V3,sup,,,,"/> <approved hash="208,4,226.06,222.25,3V3,sup,,,,"/> <approved hash="208,4,274.32,217.17,3V3,sup,,,,"/> diff --git a/eagle/lbr/Alpha-IC.lbr b/eagle/lbr/Alpha-IC.lbr index 6486c84..453e73b 100644 --- a/eagle/lbr/Alpha-IC.lbr +++ b/eagle/lbr/Alpha-IC.lbr @@ -6,7 +6,7 @@ <setting alwaysvectorfont="no"/> <setting verticaltext="up"/> </settings> -<grid distance="0.1" unitdist="inch" unit="inch" style="lines" multiple="1" display="no" altdistance="0.01" altunitdist="inch" altunit="inch"/> +<grid distance="0.1" unitdist="inch" unit="inch" style="lines" multiple="1" display="yes" altdistance="0.01" altunitdist="inch" altunit="inch"/> <layers> <layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes"/> <layer number="2" name="Route2" color="1" fill="3" visible="no" active="yes"/> @@ -244,6 +244,1092 @@ Auto generated by <i>make-symbol-device-package-bsdl.ulp Rev. 44</i> <text x="-3.88" y="11.635" size="1.27" layer="25">>NAME</text> <text x="-5.88" y="-13.905" size="1.27" layer="27">>VALUE</text> </package> +<package name="LQFP-208"> +<smd name="1" x="-14.5796" y="12.7508" dx="0.3" dy="1.7" layer="1" rot="R270"/> +<smd name="2" x="-14.5796" y="12.2428" dx="0.3" dy="1.7" layer="1" rot="R270"/> +<smd name="3" x="-14.5796" y="11.7602" dx="0.3" dy="1.7" layer="1" rot="R270"/> +<smd name="4" x="-14.5796" y="11.2522" dx="0.3" dy="1.7" layer="1" rot="R270"/> +<smd name="5" x="-14.5796" y="10.7442" dx="0.3" dy="1.7" layer="1" rot="R270"/> +<smd name="6" x="-14.5796" y="10.2616" dx="0.3" dy="1.7" layer="1" rot="R270"/> +<smd name="7" x="-14.5796" y="9.7536" dx="0.3" dy="1.7" layer="1" rot="R270"/> +<smd name="8" x="-14.5796" y="9.2456" dx="0.3" dy="1.7" layer="1" rot="R270"/> +<smd name="9" x="-14.5796" y="8.7376" dx="0.3" dy="1.7" layer="1" rot="R270"/> +<smd name="10" x="-14.5796" y="8.255" dx="0.3" dy="1.7" layer="1" rot="R270"/> +<smd name="11" x="-14.5796" y="7.747" dx="0.3" dy="1.7" layer="1" rot="R270"/> +<smd name="12" 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+<pin name="PD1/FMC_D3" x="27.94" y="45.72" length="short" rot="R180"/> +<pin name="PI6/FMC_D28" x="27.94" y="-17.78" length="short" rot="R180"/> +<pin name="PI7/FMC_D29" x="27.94" y="-20.32" length="short" rot="R180"/> +<pin name="PH8/FMC_D16" x="27.94" y="12.7" length="short" rot="R180"/> +<pin name="PH9/FMC_D17" x="27.94" y="10.16" length="short" rot="R180"/> +<pin name="PH10/FMC_D18" x="27.94" y="7.62" length="short" rot="R180"/> +<pin name="PH11/FMC_D19" x="27.94" y="5.08" length="short" rot="R180"/> +<pin name="PH12/FMC_D20" x="27.94" y="2.54" length="short" rot="R180"/> +<pin name="PI9/FMC_D30" x="27.94" y="-22.86" length="short" rot="R180"/> +<pin name="PI10/FMC_D31" x="27.94" y="-25.4" length="short" rot="R180"/> +<pin name="PI3/FMC_D27" x="27.94" y="-15.24" length="short" rot="R180"/> +<pin name="FMC_A23/PE2" x="-33.02" y="-5.08" length="short"/> +<pin name="FMC_A19/PE3" x="-33.02" y="5.08" length="short"/> +<pin name="FMC_A20/PE4" x="-33.02" y="2.54" length="short"/> +<pin name="FMC_A21/PE5" x="-33.02" y="0" length="short"/> +<pin name="FMC_A22/PE6" x="-33.02" y="-2.54" length="short"/> +<pin name="FMC_A0/PF0" x="-33.02" y="53.34" length="short"/> +<pin name="FMC_A1/PF1" x="-33.02" y="50.8" length="short"/> +<pin name="FMC_A2/PF2" x="-33.02" y="48.26" length="short"/> +<pin name="FMC_A3/PF3" x="-33.02" y="45.72" length="short"/> +<pin name="FMC_A4/PF4" x="-33.02" y="43.18" length="short"/> +<pin name="FMC_A5/PF5" x="-33.02" y="40.64" length="short"/> +<pin name="FMC_A6/PF12" x="-33.02" y="38.1" length="short"/> +<pin name="FMC_A7/PF13" x="-33.02" y="35.56" length="short"/> +<pin name="FMC_A8/PF14" x="-33.02" y="33.02" length="short"/> +<pin name="FMC_A9/PF15" x="-33.02" y="30.48" length="short"/> +<pin name="FMC_A10/PG0" x="-33.02" y="27.94" length="short"/> +<pin name="FMC_A11/PG1" x="-33.02" y="25.4" length="short"/> +<pin name="FMC_A16/PD11" x="-33.02" y="12.7" length="short"/> +<pin name="FMC_A17/PD12" x="-33.02" y="10.16" length="short"/> +<pin name="FMC_A18/PD13" x="-33.02" y="7.62" length="short"/> +<pin name="FMC_A12/PG2" x="-33.02" y="22.86" length="short"/> +<pin name="FMC_A13/PG3" x="-33.02" y="20.32" length="short"/> +<pin name="FMC_A14/PG4" x="-33.02" y="17.78" length="short"/> +<pin name="FMC_A15/PG5" x="-33.02" y="15.24" length="short"/> +<pin name="FMC_A24/PG13" x="-33.02" y="-7.62" length="short"/> +<pin name="FMC_A25/PG14" x="-33.02" y="-10.16" length="short"/> +<pin name="FMC_CLK/PD3" x="-33.02" y="-40.64" length="short"/> +<pin name="FMC_NOE/PD4" x="-33.02" y="-43.18" length="short"/> +<pin name="FMC_NWE/PD5" x="-33.02" y="-45.72" length="short"/> +<pin name="FMC_NWAIT/PD6" x="-33.02" y="-48.26" length="short"/> +<pin name="FMC_NE1/PD7" x="-33.02" y="-50.8" length="short"/> +<pin name="PG15/FMC_SDNCAS" x="27.94" y="-55.88" length="short" rot="R180"/> +<pin name="PB5/FMC_SDCKE1" x="27.94" y="-50.8" length="short" rot="R180"/> +<pin name="PB6/FMC_SDNE1" x="27.94" y="-43.18" length="short" rot="R180"/> +<pin name="FMC_NL/PB7" x="-33.02" y="-33.02" length="short"/> +<pin name="FMC_NBL2/PI4" x="-33.02" y="-22.86" length="short"/> +<pin name="FMC_NBL3/PI5" x="-33.02" y="-25.4" length="short"/> +<pin name="FMC_NBL0/PE0" x="-33.02" y="-17.78" length="short"/> +<pin name="FMC_NBL1/PE1" x="-33.02" y="-20.32" length="short"/> +<pin name="PG8/FMC_SDCLK" x="27.94" y="-33.02" length="short" rot="R180"/> +<pin name="PF11/FMC_SDNRAS" x="27.94" y="-58.42" length="short" rot="R180"/> +<pin name="PC0/FMC_SDNWE" x="27.94" y="-35.56" length="short" rot="R180"/> +<pin name="PC2/FMC_SDNE0" x="27.94" y="-40.64" length="short" rot="R180"/> +<pin name="PC3/FMC_SDCKE0" x="27.94" y="-48.26" length="short" rot="R180"/> +</symbol> </symbols> <devicesets> <deviceset name="IS45S32160F" prefix="IC"> @@ -435,6 +1764,235 @@ Clock frequency: 166, 143 MHz</description> </device> </devices> </deviceset> +<deviceset name="STM32F429BIT6"> +<description>STM32F429 Cortex-M4 CPU +180 MHz, 256 KB RAM, 2 MB Flash</description> +<gates> +<gate name="IO" symbol="STM32F429_LQFP-208_IO" x="30.48" y="-10.16"/> +<gate name="CFG" symbol="STM32F429_LQFP-208_CFG" x="-78.74" y="-12.7"/> +<gate name="PWR" symbol="STM32F429_LQFP-208_PWR" x="-154.94" y="-12.7"/> +<gate name="FMC" symbol="STM32F429_LQFP-208_FMC" x="129.54" y="5.08"/> +</gates> +<devices> +<device name="" package="LQFP-208"> +<connects> +<connect gate="CFG" pin="BOOT0@197" pad="197"/> +<connect gate="CFG" pin="NRST" pad="34"/> +<connect gate="CFG" pin="OSC_IN/PH0" pad="32"/> +<connect gate="CFG" pin="OSC_OUT/PH1" pad="33"/> +<connect gate="CFG" pin="PA13/JTMS-SWDIO" pad="147"/> +<connect gate="CFG" pin="PA14/JTCK-SWCLK" pad="159"/> +<connect gate="CFG" pin="PA15/JTDI" pad="160"/> +<connect gate="CFG" pin="PB2/BOOT1" pad="63"/> +<connect gate="CFG" pin="PB3/JTDO/TRACESWO" pad="192"/> +<connect gate="CFG" pin="PB4/NJTRST" pad="193"/> +<connect gate="CFG" pin="PDR_ON@203" pad="203"/> +<connect gate="CFG" pin="VREF+@41" pad="41"/> +<connect gate="FMC" pin="FMC_A0/PF0" pad="16"/> +<connect gate="FMC" pin="FMC_A1/PF1" pad="17"/> +<connect gate="FMC" pin="FMC_A10/PG0" pad="77"/> +<connect gate="FMC" pin="FMC_A11/PG1" pad="78"/> +<connect gate="FMC" pin="FMC_A12/PG2" pad="129"/> +<connect gate="FMC" pin="FMC_A13/PG3" pad="130"/> +<connect gate="FMC" pin="FMC_A14/PG4" pad="131"/> +<connect gate="FMC" pin="FMC_A15/PG5" pad="132"/> +<connect gate="FMC" pin="FMC_A16/PD11" pad="111"/> +<connect gate="FMC" pin="FMC_A17/PD12" pad="112"/> +<connect gate="FMC" pin="FMC_A18/PD13" pad="113"/> +<connect gate="FMC" pin="FMC_A19/PE3" pad="2"/> +<connect gate="FMC" pin="FMC_A2/PF2" pad="18"/> +<connect gate="FMC" pin="FMC_A20/PE4" pad="3"/> +<connect gate="FMC" pin="FMC_A21/PE5" pad="4"/> +<connect gate="FMC" pin="FMC_A22/PE6" pad="5"/> +<connect gate="FMC" pin="FMC_A23/PE2" pad="1"/> +<connect gate="FMC" pin="FMC_A24/PG13" pad="182"/> +<connect gate="FMC" pin="FMC_A25/PG14" pad="183"/> +<connect gate="FMC" pin="FMC_A3/PF3" pad="22"/> +<connect gate="FMC" pin="FMC_A4/PF4" pad="23"/> +<connect gate="FMC" pin="FMC_A5/PF5" pad="24"/> +<connect gate="FMC" pin="FMC_A6/PF12" pad="71"/> +<connect gate="FMC" pin="FMC_A7/PF13" pad="74"/> +<connect gate="FMC" pin="FMC_A8/PF14" pad="75"/> +<connect gate="FMC" pin="FMC_A9/PF15" pad="76"/> +<connect gate="FMC" pin="FMC_CLK/PD3" pad="167"/> +<connect gate="FMC" pin="FMC_NBL0/PE0" pad="200"/> +<connect gate="FMC" pin="FMC_NBL1/PE1" pad="201"/> +<connect gate="FMC" pin="FMC_NBL2/PI4" pad="205"/> +<connect gate="FMC" pin="FMC_NBL3/PI5" pad="206"/> +<connect gate="FMC" pin="FMC_NE1/PD7" pad="173"/> +<connect gate="FMC" pin="FMC_NL/PB7" pad="196"/> +<connect gate="FMC" pin="FMC_NOE/PD4" pad="168"/> +<connect gate="FMC" pin="FMC_NWAIT/PD6" pad="172"/> +<connect gate="FMC" pin="FMC_NWE/PD5" pad="169"/> +<connect gate="FMC" pin="PB5/FMC_SDCKE1" pad="194"/> +<connect gate="FMC" pin="PB6/FMC_SDNE1" pad="195"/> +<connect gate="FMC" pin="PC0/FMC_SDNWE" pad="35"/> +<connect gate="FMC" pin="PC2/FMC_SDNE0" pad="37"/> +<connect gate="FMC" pin="PC3/FMC_SDCKE0" pad="38"/> +<connect gate="FMC" pin="PD0/FMC_D2" pad="164"/> +<connect gate="FMC" pin="PD1/FMC_D3" pad="165"/> +<connect gate="FMC" pin="PD10/FMC_D15" pad="110"/> +<connect gate="FMC" pin="PD14/FMC_D0" pad="116"/> +<connect gate="FMC" pin="PD15/FMC_D1" pad="117"/> +<connect gate="FMC" pin="PD8/FMC_D13" pad="108"/> +<connect gate="FMC" pin="PD9/FMC_D14" pad="109"/> +<connect gate="FMC" pin="PE10/FMC_D7" pad="84"/> +<connect gate="FMC" pin="PE11/FMC_D8" pad="85"/> +<connect gate="FMC" pin="PE12/FMC_D9" pad="86"/> +<connect gate="FMC" pin="PE13/FMC_D10" pad="87"/> +<connect gate="FMC" pin="PE14/FMC_D11" pad="88"/> +<connect gate="FMC" pin="PE15/FMC_D12" pad="89"/> +<connect gate="FMC" pin="PE7/FMC_D4" pad="79"/> +<connect gate="FMC" pin="PE8/FMC_D5" pad="80"/> +<connect gate="FMC" pin="PE9/FMC_D6" pad="81"/> +<connect gate="FMC" pin="PF11/FMC_SDNRAS" pad="70"/> +<connect gate="FMC" pin="PG15/FMC_SDNCAS" pad="191"/> +<connect gate="FMC" pin="PG8/FMC_SDCLK" pad="135"/> +<connect gate="FMC" pin="PH10/FMC_D18" pad="100"/> +<connect gate="FMC" pin="PH11/FMC_D19" pad="101"/> +<connect gate="FMC" pin="PH12/FMC_D20" pad="102"/> +<connect gate="FMC" pin="PH13/FMC_D21" pad="151"/> +<connect gate="FMC" pin="PH14/FMC_D22" pad="152"/> +<connect gate="FMC" pin="PH15/FMC_D23" pad="153"/> +<connect gate="FMC" pin="PH8/FMC_D16" pad="98"/> +<connect gate="FMC" pin="PH9/FMC_D17" pad="99"/> +<connect gate="FMC" pin="PI0/FMC_D24" pad="154"/> +<connect gate="FMC" pin="PI1/FMC_D25" pad="155"/> +<connect gate="FMC" pin="PI10/FMC_D31" pad="12"/> +<connect gate="FMC" pin="PI2/FMC_D26" pad="156"/> +<connect gate="FMC" pin="PI3/FMC_D27" pad="157"/> +<connect gate="FMC" pin="PI6/FMC_D28" pad="207"/> +<connect gate="FMC" pin="PI7/FMC_D29" pad="208"/> +<connect gate="FMC" pin="PI9/FMC_D30" pad="11"/> +<connect gate="IO" pin="FMC_CD/PF9" pad="30"/> +<connect gate="IO" pin="FMC_INT2/PG6" pad="133"/> +<connect gate="IO" pin="FMC_INT3/PG7" pad="134"/> +<connect gate="IO" pin="FMC_INTR/PF10" pad="31"/> +<connect gate="IO" pin="FMC_NCE4_1/FMC_NE3/PG10" pad="179"/> +<connect gate="IO" pin="FMC_NCE4_2/PG11" pad="180"/> +<connect gate="IO" pin="FMC_NE2/FMC_NCE3/PG9" pad="178"/> +<connect gate="IO" pin="FMC_NE4/PG12" pad="181"/> +<connect gate="IO" pin="FMC_NIORD/PF6" pad="27"/> +<connect gate="IO" pin="FMC_NIOWR/PF8" pad="29"/> +<connect gate="IO" pin="FMC_NREG/PF7" pad="28"/> +<connect gate="IO" pin="FMC_SDCKE0/PH2" pad="46"/> +<connect gate="IO" pin="FMC_SDCKE1/PH7" pad="97"/> +<connect gate="IO" pin="FMC_SDNE1/PH6" pad="96"/> +<connect gate="IO" pin="I2C2_SCL/PH4" pad="48"/> +<connect gate="IO" pin="I2C2_SDA/FMC_SDNWE/PH5" pad="49"/> +<connect gate="IO" pin="PA4" pad="53"/> +<connect gate="IO" pin="PA8" pad="142"/> +<connect gate="IO" pin="PB0" pad="61"/> +<connect gate="IO" pin="PB1" pad="62"/> +<connect gate="IO" pin="PB10" pad="90"/> +<connect gate="IO" pin="PB11" pad="91"/> +<connect gate="IO" pin="PB12" pad="104"/> +<connect gate="IO" pin="PB8/I2C1_SCL" pad="198"/> +<connect gate="IO" pin="PB9/I2C1_SDA" pad="199"/> +<connect gate="IO" pin="PC1" pad="36"/> +<connect gate="IO" pin="PC13" pad="8"/> +<connect gate="IO" pin="PC14" pad="9"/> +<connect gate="IO" pin="PC15" pad="10"/> +<connect gate="IO" pin="PC4" pad="57"/> +<connect gate="IO" pin="PC5" pad="58"/> +<connect gate="IO" pin="PC6" pad="138"/> +<connect gate="IO" pin="PC7" pad="139"/> +<connect gate="IO" pin="PH3/FMC_SDNE0" pad="47"/> +<connect gate="IO" pin="PI11" pad="13"/> +<connect gate="IO" pin="PI12" pad="19"/> +<connect gate="IO" pin="PI13" pad="20"/> +<connect gate="IO" pin="PI14" pad="21"/> +<connect gate="IO" pin="PI15" pad="64"/> +<connect gate="IO" pin="PI8" pad="7"/> +<connect gate="IO" pin="PJ0" pad="65"/> +<connect gate="IO" pin="PJ1" pad="66"/> +<connect gate="IO" pin="PJ10" pad="122"/> +<connect gate="IO" pin="PJ11" pad="123"/> +<connect gate="IO" pin="PJ12" pad="174"/> +<connect gate="IO" pin="PJ13" pad="175"/> +<connect gate="IO" pin="PJ14" pad="176"/> +<connect gate="IO" pin="PJ15" pad="177"/> +<connect gate="IO" pin="PJ2" pad="67"/> +<connect gate="IO" pin="PJ3" pad="68"/> +<connect gate="IO" pin="PJ4" pad="69"/> +<connect gate="IO" pin="PJ5" pad="95"/> +<connect gate="IO" pin="PJ6" pad="118"/> +<connect gate="IO" pin="PJ7" pad="119"/> +<connect gate="IO" pin="PJ8" pad="120"/> +<connect gate="IO" pin="PJ9" pad="121"/> +<connect gate="IO" pin="PK0" pad="126"/> +<connect gate="IO" pin="PK1" pad="127"/> +<connect gate="IO" pin="PK2" pad="128"/> +<connect gate="IO" pin="PK3" pad="186"/> +<connect gate="IO" pin="PK4" pad="187"/> +<connect gate="IO" pin="PK5" pad="188"/> +<connect gate="IO" pin="PK6" pad="189"/> +<connect gate="IO" pin="PK7" pad="190"/> +<connect gate="IO" pin="SDIO_CK/SPI3_MOSI/PC12" pad="163"/> +<connect gate="IO" pin="SDIO_CMD/PD2" pad="166"/> +<connect gate="IO" pin="SDIO_D0/PC8" pad="140"/> +<connect gate="IO" pin="SDIO_D1/PC9" pad="141"/> +<connect gate="IO" pin="SDIO_D2/SPI3_SCK/PC10" pad="161"/> +<connect gate="IO" pin="SDIO_D3/SPI3_MISO/PC11" pad="162"/> +<connect gate="IO" pin="SPI1_MISO/PA6" pad="55"/> +<connect gate="IO" pin="SPI1_MOSI/PA7" pad="56"/> +<connect gate="IO" pin="SPI1_SCK/PA5" pad="54"/> +<connect gate="IO" pin="SPI2_MISO/PB14" pad="106"/> +<connect gate="IO" pin="SPI2_MOSI/PB15" pad="107"/> +<connect gate="IO" pin="SPI2_SCK/PB13" pad="105"/> +<connect gate="IO" pin="USART1_CTS/PA11" pad="145"/> +<connect gate="IO" pin="USART1_RTS/PA12" pad="146"/> +<connect gate="IO" pin="USART1_RX/PA10" pad="144"/> +<connect gate="IO" pin="USART1_TX/PA9" pad="143"/> +<connect gate="IO" pin="USART2_CTS/WKUP/PA0" pad="43"/> +<connect gate="IO" pin="USART2_RTS/PA1" pad="44"/> +<connect gate="IO" pin="USART2_RX/PA3" pad="50"/> +<connect gate="IO" pin="USART2_TX/PA2" pad="45"/> +<connect gate="PWR" pin="VBAT@6" pad="6"/> +<connect gate="PWR" pin="VCAP1@92" pad="92"/> +<connect gate="PWR" pin="VCAP2@148" pad="148"/> +<connect gate="PWR" pin="VDD@103" pad="103"/> +<connect gate="PWR" pin="VDD@115" pad="115"/> +<connect gate="PWR" pin="VDD@124" pad="124"/> +<connect gate="PWR" pin="VDD@137" pad="137"/> +<connect gate="PWR" pin="VDD@15" pad="15"/> +<connect gate="PWR" pin="VDD@150" pad="150"/> +<connect gate="PWR" pin="VDD@158" pad="158"/> +<connect gate="PWR" pin="VDD@171" pad="171"/> +<connect gate="PWR" pin="VDD@185" pad="185"/> +<connect gate="PWR" pin="VDD@204" pad="204"/> +<connect gate="PWR" pin="VDD@26" pad="26"/> +<connect gate="PWR" pin="VDD@39" pad="39"/> +<connect gate="PWR" pin="VDD@52" pad="52"/> +<connect gate="PWR" pin="VDD@59" pad="59"/> +<connect gate="PWR" pin="VDD@73" pad="73"/> +<connect gate="PWR" pin="VDD@83" pad="83"/> +<connect gate="PWR" pin="VDD@94" pad="94"/> +<connect gate="PWR" pin="VDDA@42" pad="42"/> +<connect gate="PWR" pin="VSS@114" pad="114"/> +<connect gate="PWR" pin="VSS@125" pad="125"/> +<connect gate="PWR" pin="VSS@136" pad="136"/> +<connect gate="PWR" pin="VSS@14" pad="14"/> +<connect gate="PWR" pin="VSS@149" pad="149"/> +<connect gate="PWR" pin="VSS@170" pad="170"/> +<connect gate="PWR" pin="VSS@184" pad="184"/> +<connect gate="PWR" pin="VSS@202" pad="202"/> +<connect gate="PWR" pin="VSS@25" pad="25"/> +<connect gate="PWR" pin="VSS@51" pad="51"/> +<connect gate="PWR" pin="VSS@60" pad="60"/> +<connect gate="PWR" pin="VSS@72" pad="72"/> +<connect gate="PWR" pin="VSS@82" pad="82"/> +<connect gate="PWR" pin="VSS@93" pad="93"/> +<connect gate="PWR" pin="VSSA@40" pad="40"/> +</connects> +<technologies> +<technology name=""> +<attribute name="OC_FARNELL" value="2469581" constant="no"/> +</technology> +</technologies> +</device> +</devices> +</deviceset> </devicesets> </library> </drawing> |