| Mode | Name | Size | |
|---|---|---|---|
| -rw-r--r-- | trng.v | 19518 | logplainblame |
| -rw-r--r-- | trng_csprng.v | 20603 | logplainblame |
| -rw-r--r-- | trng_csprng_fifo.v | 13949 | logplainblame |
| -rw-r--r-- | trng_mixer.v | 32060 | logplainblame |
 |
index : core/rng/trng | |
| True Random Number Generator core implemented in Verilog | git repositories |
| aboutsummaryrefslogtreecommitdiff |