diff options
| -rw-r--r-- | src/rtl/trng_mixer.v | 185 |
1 files changed, 52 insertions, 133 deletions
diff --git a/src/rtl/trng_mixer.v b/src/rtl/trng_mixer.v index edcc734..24ccaaa 100644 --- a/src/rtl/trng_mixer.v +++ b/src/rtl/trng_mixer.v @@ -214,6 +214,9 @@ module trng_mixer( reg restart_reg; reg restart_new; + reg [31 : 0] read_data_new; + reg [31 : 0] read_data_reg; + //---------------------------------------------------------------- // Wires. @@ -239,15 +242,13 @@ module trng_mixer( reg tmp_entropy1_ack; reg tmp_entropy2_ack; - reg [31 : 0] tmp_read_data; - reg [31 : 0] tmp_read_data_reg; reg tmp_error; //---------------------------------------------------------------- // Concurrent connectivity for ports etc. //---------------------------------------------------------------- - assign read_data = tmp_read_data_reg; + assign read_data = read_data_reg; assign error = tmp_error; assign security_error = 0; @@ -348,211 +349,135 @@ module trng_mixer( entropy_timeout_reg <= DEFAULT_ENTROPY_TIMEOUT; entropy_timeout_ctr_reg <= 24'h000000; entropy_collect_ctrl_reg <= CTRL_IDLE; + read_data_reg <= 32'h00000000; mixer_ctrl_reg <= CTRL_IDLE; end else begin restart_reg <= restart_new; + if (cs) + read_data_reg <= read_data_new; + if (block00_we) - begin - block00_reg <= muxed_entropy; - end + block00_reg <= muxed_entropy; if (block01_we) - begin - block01_reg <= muxed_entropy; - end + block01_reg <= muxed_entropy; if (block02_we) - begin - block02_reg <= muxed_entropy; - end + block02_reg <= muxed_entropy; if (block03_we) - begin - block03_reg <= muxed_entropy; - end + block03_reg <= muxed_entropy; if (block04_we) - begin - block04_reg <= muxed_entropy; - end + block04_reg <= muxed_entropy; if (block05_we) - begin - block05_reg <= muxed_entropy; - end + block05_reg <= muxed_entropy; if (block06_we) - begin - block06_reg <= muxed_entropy; - end + block06_reg <= muxed_entropy; if (block07_we) - begin - block07_reg <= muxed_entropy; - end + block07_reg <= muxed_entropy; if (block08_we) - begin - block08_reg <= muxed_entropy; - end + block08_reg <= muxed_entropy; if (block09_we) - begin - block09_reg <= muxed_entropy; - end + block09_reg <= muxed_entropy; if (block10_we) - begin - block10_reg <= muxed_entropy; - end + block10_reg <= muxed_entropy; if (block11_we) - begin - block11_reg <= muxed_entropy; - end + block11_reg <= muxed_entropy; if (block12_we) - begin - block12_reg <= muxed_entropy; - end + block12_reg <= muxed_entropy; if (block13_we) - begin - block13_reg <= muxed_entropy; - end + block13_reg <= muxed_entropy; if (block14_we) - begin - block14_reg <= muxed_entropy; - end + block14_reg <= muxed_entropy; if (block15_we) - begin - block15_reg <= muxed_entropy; - end + block15_reg <= muxed_entropy; if (block16_we) - begin - block16_reg <= muxed_entropy; - end + block16_reg <= muxed_entropy; if (block17_we) - begin - block17_reg <= muxed_entropy; - end + block17_reg <= muxed_entropy; if (block18_we) - begin - block18_reg <= muxed_entropy; - end + block18_reg <= muxed_entropy; if (block19_we) - begin - block19_reg <= muxed_entropy; - end + block19_reg <= muxed_entropy; if (block20_we) - begin - block20_reg <= muxed_entropy; - end + block20_reg <= muxed_entropy; if (block21_we) - begin - block21_reg <= muxed_entropy; - end + block21_reg <= muxed_entropy; if (block22_we) - begin - block22_reg <= muxed_entropy; - end + block22_reg <= muxed_entropy; if (block23_we) - begin - block23_reg <= muxed_entropy; - end + block23_reg <= muxed_entropy; if (block24_we) - begin - block24_reg <= muxed_entropy; - end + block24_reg <= muxed_entropy; if (block25_we) - begin - block25_reg <= muxed_entropy; - end + block25_reg <= muxed_entropy; if (block26_we) - begin - block26_reg <= muxed_entropy; - end + block26_reg <= muxed_entropy; if (block27_we) - begin - block27_reg <= muxed_entropy; - end + block27_reg <= muxed_entropy; if (block28_we) - begin - block28_reg <= muxed_entropy; - end + block28_reg <= muxed_entropy; if (block29_we) - begin - block29_reg <= muxed_entropy; - end + block29_reg <= muxed_entropy; if (block30_we) - begin - block30_reg <= muxed_entropy; - end + block30_reg <= muxed_entropy; if (block31_we) - begin - block31_reg <= muxed_entropy; - end + block31_reg <= muxed_entropy; if (init_done_we) - begin - init_done_reg <= init_done_new; - end + init_done_reg <= init_done_new; if (word_ctr_we) - begin - word_ctr_reg <= word_ctr_new; - end + word_ctr_reg <= word_ctr_new; if (seed_syn_we) - begin - seed_syn_reg <= seed_syn_new; - end + seed_syn_reg <= seed_syn_new; if (entropy_collect_ctrl_we) - begin - entropy_collect_ctrl_reg <= entropy_collect_ctrl_new; - end + entropy_collect_ctrl_reg <= entropy_collect_ctrl_new; if (enable_we) - begin - enable_reg <= enable_new; - end + enable_reg <= enable_new; if (mixer_ctrl_we) - begin - mixer_ctrl_reg <= mixer_ctrl_new; - end + mixer_ctrl_reg <= mixer_ctrl_new; if (entropy_timeout_we) - begin - entropy_timeout_reg <= entropy_timeout_new; - end + entropy_timeout_reg <= entropy_timeout_new; if (entropy_timeout_ctr_we) - begin - entropy_timeout_ctr_reg <= entropy_timeout_ctr_new; - end + entropy_timeout_ctr_reg <= entropy_timeout_ctr_new; end end // reg_update @@ -568,7 +493,7 @@ module trng_mixer( restart_new = 0; entropy_timeout_new = 24'h000000; entropy_timeout_we = 0; - tmp_read_data = 32'h00000000; + read_data_new = 32'h00000000; tmp_error = 0; if (cs) @@ -605,17 +530,17 @@ module trng_mixer( // Read operations. ADDR_MIXER_CTRL: begin - tmp_read_data = {30'h00000000, restart_reg, enable_reg}; + read_data_new = {30'h00000000, restart_reg, enable_reg}; end ADDR_MIXER_STATUS: begin - tmp_read_data = 32'h00000000; + read_data_new = 32'h00000000; end ADDR_MIXER_TIMEOUT: begin - tmp_read_data = {8'h00, entropy_timeout_reg}; + read_data_new = {8'h00, entropy_timeout_reg}; end default: @@ -627,12 +552,6 @@ module trng_mixer( end end // mixer_api_logic - // register data for eim output - always @(posedge clk) - begin - tmp_read_data_reg <= tmp_read_data; - end - //---------------------------------------------------------------- // entropy_collect_ctrl |