diff options
| -rw-r--r-- | src/tb/tb_csprng.v | 60 |
1 files changed, 53 insertions, 7 deletions
diff --git a/src/tb/tb_csprng.v b/src/tb/tb_csprng.v index 5cfb398..4e2efec 100644 --- a/src/tb/tb_csprng.v +++ b/src/tb/tb_csprng.v @@ -50,7 +50,7 @@ module tb_csprng(); //---------------------------------------------------------------- // Internal constant and parameter definitions. //---------------------------------------------------------------- - parameter DEBUG = 1; + parameter DEBUG = 1; parameter CLK_HALF_PERIOD = 1; parameter CLK_PERIOD = 2 * CLK_HALF_PERIOD; @@ -109,6 +109,7 @@ module tb_csprng(); reg tb_debug_update; reg [31 : 0] read_data; + reg [7 : 0] pbyte; //---------------------------------------------------------------- @@ -127,10 +128,9 @@ module tb_csprng(); .discard(tb_discard), .test_mode(tb_test_mode), - - .more_seed(tb_more_seed), .security_error(tb_security_error), + .more_seed(tb_more_seed), .seed_data(tb_seed_data), .seed_syn(tb_seed_syn), .seed_ack(tb_seed_ack), @@ -326,14 +326,37 @@ module tb_csprng(); tb_test_mode = 0; tb_seed_syn = 0; - tb_seed_data = {16{32'h00000000}}; + tb_seed_data = {8{64'h0000000000000000}}; tb_rnd_ack = 0; tb_debug_update = 0; + + pbyte = 8'h00; end endtask // init_sim //---------------------------------------------------------------- + // seed_generator + // + // When a seed_syn is observed this process will provide a new + // seed to the DUT, assert SYN, wait for ACK and then update + // the seed pattern state. + //---------------------------------------------------------------- + always @ (posedge tb_more_seed) + begin : seed_generator + #(CLK_PERIOD); + tb_seed_data = {64{pbyte}}; + tb_seed_syn = 1'b1; + + while (!tb_seed_ack) + #(CLK_PERIOD); + + tb_seed_syn = 1'b0; + pbyte = pbyte + 8'h01; + end + + + //---------------------------------------------------------------- // tc1_init_csprng() // // TC1: Test that the DUT automatically starts initialize when @@ -381,9 +404,9 @@ module tb_csprng(); write_word(ADDR_NUM_BLOCKS_LOW, 32'h00000001); // Start pulling data. - tb_cs = 1'b1; - tb_we = 1'b0; - tb_address = ADDR_RND_DATA; + tb_cs = 1'b1; + tb_we = 1'b0; + tb_address = ADDR_RND_DATA; #(200 * CLK_PERIOD); @@ -393,6 +416,28 @@ module tb_csprng(); //---------------------------------------------------------------- + //---------------------------------------------------------------- + task test_gen_data(); + integer i; + begin + pbyte = 8'h00; + i = 0; + + $display("Generating seed patterns.\n"); + + while (i < 256) + begin + tb_seed_data = {64{pbyte}}; + $display("seed %03d: 0x%064x", i, tb_seed_data); + #(CLK_PERIOD); + i = i + 1; + pbyte = pbyte + 8'h01; + end + end + endtask // test_gen_data + + + //---------------------------------------------------------------- // csprng_test // // The main test functionality. @@ -409,6 +454,7 @@ module tb_csprng(); reset_dut(); dump_dut_state(); + test_gen_data(); tc1_init_csprng(); tc2_reseed_csprng(); |