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2014-05-09Added functionality to change baud rate. Decreased comm delay. Now test cases...Joachim Strömbergson
2014-05-08Fixed error in (c). Drastically reduced processing delay. Adding missing expe...Joachim Strömbergson
2014-05-08Adding test case for dual block tests of SHA-512/x. All tests passed. Separat...Joachim Strömbergson
2014-05-08(1) Added functionality to do single block tests of all SHA-512/x modes. (2) ...Joachim Strömbergson
2014-05-07Adding prebuilt coretest_hashes that includes SHA-512.Joachim Strömbergson
2014-05-07Update of coretest_hashes to also include the sha512 core.Joachim Strömbergson
2014-05-07Update of prebuilt FPGA configuration with new coretest.Joachim Strömbergson
2014-04-01Refactored code to allow additions of test cases. Adding dual block message t...Joachim Strömbergson
2014-03-17Adding project, assignment and clock setup files for Quartus and the TerasIC ...Joachim Strömbergson
2014-03-17Adding bitstream file for coretest_hashes on the TerasIC C5G board.Joachim Strömbergson
2014-03-17Adding test program that checks the SHA-1 and SHA-256 cores and do single blo...Joachim Strömbergson
2014-03-17Updating address for uart to 8 bits which should be the default.Joachim Strömbergson
2014-03-13Adding Makefile to build the coretest_hashes subsystem.Joachim Strömbergson
2014-03-13Adding RTL to build the coretest_hashes subsystem with SHA-1 and SHA-256 cores.Joachim Strömbergson
2014-03-13Adding readme and license for the coretest_hashes subsystem.Joachim Strömbergson