Rearrange cores.

1 files changed, 36 insertions, 0 deletions

diff --git a/i2c/build/Makefile b/i2c/build/Makefile
new file mode 100644
index 0000000..3959c4f
--- /dev/null
+++ b/i2c/build/Makefile
@@ -0,0 +1,36 @@
+project = novena_i2c
+vendor = xilinx
+family = spartan6
+part = xc6slx45csg324-3
+top_module = novena_top
+isedir = /opt/Xilinx/14.7/ISE_DS
+xil_env = . $(isedir)/settings64.sh
+ucf = ../ucf/novena_i2c.ucf
+
+vfiles = \
+	../rtl/novena_i2c.v \
+	../rtl/novena_regs.v \
+	../../common/rtl/novena_clkmgr.v \
+	../../common/rtl/ipcore/clkmgr_dcm.v \
+	../../../common/core_selector/src/rtl/core_selector.v \
+	../../../common/core_selector/src/rtl/global_selector.v \
+	../../../common/core_selector/src/rtl/cipher_selector.v \
+	../../../common/core_selector/src/rtl/hash_selector.v \
+	../../../common/core_selector/src/rtl/rng_selector.v \
+	../../../../comm/i2c/src/rtl/i2c_regs.v \
+	../../../../comm/i2c/src/rtl/i2c_core.v \
+	../../../../comm/coretest/src/rtl/coretest.v \
+	../../../../hash/sha1/src/rtl/sha1.v \
+	../../../../hash/sha1/src/rtl/sha1_core.v \
+	../../../../hash/sha1/src/rtl/sha1_w_mem.v \
+	../../../../hash/sha256/src/rtl/sha256.v \
+	../../../../hash/sha256/src/rtl/sha256_core.v \
+	../../../../hash/sha256/src/rtl/sha256_k_constants.v \
+	../../../../hash/sha256/src/rtl/sha256_w_mem.v \
+	../../../../hash/sha512/src/rtl/sha512.v \
+	../../../../hash/sha512/src/rtl/sha512_core.v \
+	../../../../hash/sha512/src/rtl/sha512_h_constants.v \
+	../../../../hash/sha512/src/rtl/sha512_k_constants.v \
+	../../../../hash/sha512/src/rtl/sha512_w_mem.v
+
+include xilinx.mk