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authorPaul Selkirk <pselkirk@isc.org>2015-03-17 13:49:30 +0100
committerPaul Selkirk <pselkirk@isc.org>2015-03-17 13:49:30 +0100
commit283bfbeeb7fb5767815c10ea98bb155638d4bfb3 (patch)
tree5929001d84e6ef964d1338c71b27418ad8a146bf /README.md
parent21ef7967486b349d66703c13edfff58d5f13372a (diff)
Rearrange cores.
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-coretest_hashes
+platform/novena
===============
-The coretest system combined with cryptographic hash functions.
+Platform-specific files for the Novena PVT1.
## Introduction ##
-This is a HW subsystem that includes the coretest module connected to an
-I2C bus for external access and to hash function cores. This version
-includes the SHA-1, SHA-256, and SHA-512 cores.
+This includes the Verilog top-level files and build systems for Novena
+with either I2C or EIM interfaces.
## Status ##
+***(2015-03-16)***
+Reorganized. Built using Xilinx ISE 14.7.
+
***(2014-08-27)***
-Initial version. Build using Xilinx ISE 14.3.
+Initial version. Built using Xilinx ISE 14.3.