1 files changed, 10 insertions, 2 deletions
diff --git a/core_selector/src/rtl/core_selector.v b/core_selector/src/rtl/core_selector.v
index 1cd1d94..a18717a 100644
--- a/core_selector/src/rtl/core_selector.v
+++ b/core_selector/src/rtl/core_selector.v
@@ -44,11 +44,15 @@ module core_selector
    input wire          sys_clk,
    input wire          sys_rst,
 
+   input wire          noise, 
+
    input wire [16: 0]  sys_eim_addr,
    input wire          sys_eim_wr,
    input wire          sys_eim_rd,
    output wire [31: 0] sys_read_data,
-   input wire [31: 0]  sys_write_data
+   input wire [31: 0]  sys_write_data,
+
+   output wire [7 : 0] debug
    );
    
    
@@ -166,6 +170,8 @@ module core_selector
       .sys_clk(sys_clk),
       .sys_rst(sys_rst),
 
+      .noise(noise),
+
       .sys_ena(segment_enable_rngs),            // only enable active selector
 
       .sys_eim_addr(addr_segment_int),          // we only connect 14 lower bits of address here,
@@ -175,7 +181,9 @@ module core_selector
       .sys_eim_rd(sys_eim_rd),          
 
       .sys_write_data(sys_write_data),
-      .sys_read_data(segment_rngs_read_data)    // output from RNGS segment
+      .sys_read_data(segment_rngs_read_data),    // output from RNGS segment
+
+      .debug(debug)
       );