path: root/core_selector/src/rtl/core_selector.v

//======================================================================
//
// core_selector.v
// ---------------
// Top level wrapper that creates the Cryptech coretest system.
// The wrapper contains instances of external interface, coretest
// and the core to be tested. And if more than one core is
// present the wrapper also includes address and data muxes.
//
//
// Author: Pavel Shatov
// Copyright (c) 2014-2015, NORDUnet A/S All rights reserved.
// 
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are
// met:
// - Redistributions of source code must retain the above copyright notice,
//   this list of conditions and the following disclaimer.
//
// - Redistributions in binary form must reproduce the above copyright
//   notice, this list of conditions and the following disclaimer in the
//   documentation and/or other materials provided with the distribution.
//
// - Neither the name of the NORDUnet nor the names of its contributors may
//   be used to endorse or promote products derived from this software
//   without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
// IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
// TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
// PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
// TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//
//======================================================================

module core_selector
  (
   input wire          sys_clk,
   input wire          sys_rst,

   input wire [16: 0]  sys_eim_addr,
   input wire          sys_eim_wr,
   input wire          sys_eim_rd,
   output wire [31: 0] sys_read_data,
   input wire [31: 0]  sys_write_data,
   output wire         sys_error,

   input wire          noise,
   output wire [7 : 0] debug
   );
   
   
   /* Three upper bits of address [16:14] are used to select memory segment.
    * There can be eight segments. So far segment 0 is used for global
    * registers, segment 1 is used for hashes, segment 2 is reserved for
    * random number generators, segment 3 is reserved for chiphers. Other
    * segments are not used so far.
    */
   
   /* Every segment has its own memory map, take at look at corresponding
    * selectors for more information.
    */
   
   //----------------------------------------------------------------
   // Address Decoder
   //----------------------------------------------------------------
   //  3 upper bits are decoded here
   wire [ 2: 0] addr_segment            = sys_eim_addr[16:14];
   // 14 lower bits are decoded in corresponding segment selectors
   wire [13: 0] addr_segment_int        = sys_eim_addr[13: 0];


   //----------------------------------------------------------------
   // List of Available Segments
   //----------------------------------------------------------------
   // Comment following lines to exclude segments from implementation.
   `define      USE_SEGMENT_GLOBALS
   `define      USE_SEGMENT_HASHES
   `define      USE_SEGMENT_RNGS
// `define      USE_SEGMENT_CIPHERS


   //----------------------------------------------------------------
   // Segment Address Table
   //----------------------------------------------------------------
   localparam   SEGMENT_ADDR_GLOBALS    = 3'd0;
   localparam   SEGMENT_ADDR_HASHES     = 3'd1;
   localparam   SEGMENT_ADDR_RNGS       = 3'd2;
   localparam   SEGMENT_ADDR_CIPHERS    = 3'd3;


   //----------------------------------------------------------------
   // GLOBALS Segment
   //----------------------------------------------------------------
   `ifdef USE_SEGMENT_GLOBALS
   wire         segment_enable_globals = (addr_segment == SEGMENT_ADDR_GLOBALS) ? 1'b1 : 1'b0;
   wire [31: 0] segment_globals_read_data;
   wire         segment_globals_error;

   global_selector globals
     (
      .sys_clk(sys_clk),
      .sys_rst(sys_rst),
      .sys_ena(segment_enable_globals),

      .sys_eim_addr(addr_segment_int),
      .sys_eim_wr(sys_eim_wr),
      .sys_eim_rd(sys_eim_rd),                                          
      .sys_write_data(sys_write_data),
      .sys_read_data(segment_globals_read_data),
      .sys_error(segment_globals_error)
      );
   `endif


   //----------------------------------------------------------------
   // HASHES Segment
   //----------------------------------------------------------------
   `ifdef USE_SEGMENT_HASHES
   wire         segment_enable_hashes = (addr_segment == SEGMENT_ADDR_HASHES) ? 1'b1 : 1'b0;
   wire [31: 0] segment_hashes_read_data;
   wire         segment_hashes_error;

   hash_selector hashes
     (
      .sys_clk(sys_clk),
      .sys_rst(sys_rst),
      .sys_ena(segment_enable_hashes),

      .sys_eim_addr(addr_segment_int),
      .sys_eim_wr(sys_eim_wr),
      .sys_eim_rd(sys_eim_rd),                                          
      .sys_write_data(sys_write_data),
      .sys_read_data(segment_hashes_read_data),
      .sys_error(segment_hashes_error)
      );
   `endif


   //----------------------------------------------------------------
   // RNGS Segment
   //----------------------------------------------------------------
   `ifdef USE_SEGMENT_RNGS
   wire         segment_enable_rngs = (addr_segment == SEGMENT_ADDR_RNGS) ? 1'b1 : 1'b0;
   wire [31: 0] segment_rngs_read_data;
   wire         segment_rngs_error;

   rng_selector rngs
     (
      .sys_clk(sys_clk),
      .sys_rst(sys_rst),
      .sys_ena(segment_enable_rngs),

      .sys_eim_addr(addr_segment_int),
      .sys_eim_wr(sys_eim_wr),
      .sys_eim_rd(sys_eim_rd),                                          
      .sys_write_data(sys_write_data),
      .sys_read_data(segment_rngs_read_data),
      .sys_error(segment_rngs_error),

      .noise(noise),            // only RNG segment uses these ports
      .debug(debug)
      );
   `endif


   //----------------------------------------------------------------
   // CIPHERS Segment
   //----------------------------------------------------------------
   `ifdef USE_SEGMENT_CIPHERS
   wire         segment_enable_ciphers = (addr_segment == SEGMENT_ADDR_CIPHERS) ? 1'b1 : 1'b0;
   wire [31: 0] segment_ciphers_read_data;
   wire         segment_ciphers_error;

   cipher_selector ciphers
     (
      .sys_clk(sys_clk),
      .sys_rst(sys_rst),
      .sys_ena(segment_enable_ciphers),

      .sys_eim_addr(addr_segment_int),
      .sys_eim_wr(sys_eim_wr),
      .sys_eim_rd(sys_eim_rd),                                          
      .sys_write_data(sys_write_data),
      .sys_read_data(segment_ciphers_read_data),
      .sys_error(segment_ciphers_error)
      );
   `endif


   //----------------------------------------------------------------
   // Output (Read Data) Bus
   //----------------------------------------------------------------
   reg [31: 0]  sys_read_data_reg;
   assign       sys_read_data = sys_read_data_reg;
   reg          sys_error_reg;
   assign       sys_error = sys_error_reg;
   
   always @*
     //
     case (addr_segment)
   `ifdef USE_SEGMENT_GLOBALS
       SEGMENT_ADDR_GLOBALS:
         begin
            sys_read_data_reg = segment_globals_read_data;
            sys_error_reg     = segment_globals_error;
         end
   `endif
   `ifdef USE_SEGMENT_HASHES
       SEGMENT_ADDR_HASHES:
         begin
            sys_read_data_reg = segment_hashes_read_data;
            sys_error_reg     = segment_hashes_error;
         end
   `endif
   `ifdef USE_SEGMENT_RNGS
       SEGMENT_ADDR_RNGS:
         begin
            sys_read_data_reg = segment_rngs_read_data;
            sys_error_reg     = segment_rngs_error;
         end
   `endif
   `ifdef USE_SEGMENT_CIPHERS
       SEGMENT_ADDR_CIPHERS:
         begin
            sys_read_data_reg = segment_ciphers_read_data;
            sys_error_reg     = segment_ciphers_error;
         end
   `endif
       default:
         begin
            sys_read_data_reg = {32{1'b0}};
            sys_error_reg = 1;
         end
     endcase
   

endmodule


//======================================================================
// EOF core_selector.v
//======================================================================