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author | Pavel V. Shatov (Meister) <meisterpaul1@yandex.ru> | 2020-01-21 15:36:05 +0300 |
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committer | Pavel V. Shatov (Meister) <meisterpaul1@yandex.ru> | 2020-01-21 15:40:41 +0300 |
commit | 18c0a8e73bacd2ccbb9089d7aa220290e95dcb76 (patch) | |
tree | 7c75124f216e1fde121c5880b822d68b26abefe0 /rtl/bench | |
parent | ab23f87e78f441830587c6c82d90e35b4cec7d29 (diff) |
New Alpha platform with three clocks:
* 45 MHz (aka "io_clk") is the I/O clock for the FMC bus
* 90 MHz (aka "sys_clk") is the system clock for all the cores
* 180 MHz (aka "core_clk") is the high-speed clock for high-performance cores
Diffstat (limited to 'rtl/bench')
0 files changed, 0 insertions, 0 deletions