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| author | Pavel V. Shatov (Meister) <meisterpaul1@yandex.ru> | 2021-10-26 16:50:06 +0300 |
|---|---|---|
| committer | Pavel V. Shatov (Meister) <meisterpaul1@yandex.ru> | 2021-10-26 16:50:06 +0300 |
| commit | d42f31d0b05361052529d42fc853bc8bdf254bbb (patch) | |
| tree | 1d1e1e193db0cf14b89e85efa8a4b9ac748d09fe /rtl/alpha_regs.v | |
| parent | 0fb070a2a709f15f76c80b532b30550eaea73240 (diff) | |
XDC equivalent of UCF timing constraints for ISE.
Note, that Vivado needs an extra constraint to bypass combinatorial loop DRC
check, otherwise bitstream generation will fail.
Diffstat (limited to 'rtl/alpha_regs.v')
0 files changed, 0 insertions, 0 deletions