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tree)
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-ifmt mixed
-ofmt NGC
-opt_mode speed
-opt_level 1
-power NO
-iuc NO
-keep_hierarchy no
-netlist_hierarchy as_optimized
-rtlview no
-glob_opt AllClockNets
-read_cores yes
-write_timing_constraints NO
-cross_clock_analysis NO
-hierarchy_separator /
-bus_delimiter <>
-case maintain
-slice_utilization_ratio 100
-bram_utilization_ratio 100
-dsp_utilization_ratio 100
-safe_implementation No
-fsm_extract YES
-fsm_encoding Auto
-fsm_style lut
-ram_extract Yes
-ram_style Auto
-rom_extract Yes
-rom_style Auto
-shreg_extract YES
-shreg_min_size 2
-auto_bram_packing NO
-resource_sharing YES
-async_to_sync NO
-use_dsp48 auto
-iobuf YES
-max_fanout 100000
-bufg 32
-register_duplication YES
-register_balancing No
-optimize_primitives NO
-lc Auto
-reduce_control_sets Auto
-use_clock_enable Auto
-use_sync_set Auto
-use_sync_reset Auto
-iob auto
-equivalent_register_removal YES
-slice_utilization_ratio_maxmargin 5
-vlgincdir {../../../lib/lowlevel ../../../math/ecdsalib/rtl/microcode}
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