Promote to a repository in the core tree.

Change name of reset signal from rst_n to reset_n for consistancy with
other Cryptech cores.

Code common between this core and the ecdsa256 core split out into a
separate library repository.

Minor cleanup (Windows-isms, indentation).

1 files changed, 0 insertions, 33 deletions

diff --git a/rtl/curve/uop/uop_init_rom.v b/rtl/curve/uop/uop_init_rom.v
deleted file mode 100644
index ac44b55..0000000
--- a/rtl/curve/uop/uop_init_rom.v
+++ /dev/null
@@ -1,33 +0,0 @@
-`timescale 1ns / 1ps

-

-module uop_init_rom

-	(

-		input		wire				clk,

-		input		wire	[ 5: 0]	addr,

-		output	reg	[19: 0]	data
-    );
-

-
-		//

-		// Microcode

-		//

-`include "..\uop_ecdsa.v"

-

-
-   	//
-		// Doubling Microprogram
-		//
-   always @(posedge clk)
-
-		case (addr)

-		
-			6'd00:	data <= {OPCODE_MOV, UOP_SRC_ONE,  UOP_SRC_DUMMY, UOP_DST_RX, UOP_EXEC_ALWAYS};

-			6'd01:	data <= {OPCODE_MOV, UOP_SRC_ONE,  UOP_SRC_DUMMY, UOP_DST_RY, UOP_EXEC_ALWAYS};

-			6'd02:	data <= {OPCODE_MOV, UOP_SRC_ZERO, UOP_SRC_DUMMY, UOP_DST_RZ, UOP_EXEC_ALWAYS};

-			
-			default:	data <= {OPCODE_RDY, UOP_SRC_DUMMY, UOP_SRC_DUMMY, UOP_DST_DUMMY};

-			
-		endcase

-		

-

-endmodule