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authorPaul Selkirk <paul@psgd.org>2015-11-12 22:50:07 -0500
committerPaul Selkirk <paul@psgd.org>2015-11-12 22:50:07 -0500
commite44dd819708da2b7252c2c90db20a7af601b440e (patch)
tree009875017224d1a9e9c6b41874cddbe8720ae9c9 /src
parent84f1d374f9967163932f7b08ac3ef97c54666fcb (diff)
Change reset to active-low.
Diffstat (limited to 'src')
-rw-r--r--src/rtl/modexps6_wrapper.v6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/rtl/modexps6_wrapper.v b/src/rtl/modexps6_wrapper.v
index 3fad0f9..aa49261 100644
--- a/src/rtl/modexps6_wrapper.v
+++ b/src/rtl/modexps6_wrapper.v
@@ -1,6 +1,6 @@
module modexps6_wrapper
(
- clk, rst,
+ clk, reset_n,
cs, we,
address, write_data, read_data
);
@@ -10,7 +10,7 @@ module modexps6_wrapper
// Ports
//
input wire clk;
- input wire rst;
+ input wire reset_n;
input wire cs;
input wire we;
@@ -117,7 +117,7 @@ module modexps6_wrapper
//
always @(posedge clk)
//
- if (rst) begin
+ if (!reset_n) begin
//
reg_control <= 2'b00;
reg_mode <= 1'b0;