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path: root/rtl/modexpng_dsp_slice_wrapper_xilinx.v
AgeCommit message (Expand)Author
2019-10-23Added missing copyright headers.Pavel V. Shatov (Meister)
2019-10-21Reworked testbench, clk_sys and clk_core can now have any ratio, notPavel V. Shatov (Meister)
2019-10-21Redesigned the testbench. Core clock does not necessarily need to be twicePavel V. Shatov (Meister)