diff options
Diffstat (limited to 'rtl/modexpng_dsp_slice_wrapper.v')
| -rw-r--r-- | rtl/modexpng_dsp_slice_wrapper.v | 72 |
1 files changed, 41 insertions, 31 deletions
diff --git a/rtl/modexpng_dsp_slice_wrapper.v b/rtl/modexpng_dsp_slice_wrapper.v index f565eec..3d13570 100644 --- a/rtl/modexpng_dsp_slice_wrapper.v +++ b/rtl/modexpng_dsp_slice_wrapper.v @@ -4,30 +4,41 @@ module modexpng_dsp_slice_wrapper # B_REG = 2 ) ( - input clk, - input ce_a1, - input ce_b1, - input ce_a2, - input ce_b2, - input ce_m, - input ce_p, - input ce_mode, - input [17:0] a, - input [15:0] b, - output [46:0] p, - input [ 4:0] inmode, - input [ 6:0] opmode, - input [ 3:0] alumode, - input [17:0] casc_a_in, - input [15:0] casc_b_in, - output [17:0] casc_a_out, - output [15:0] casc_b_out + clk, + ce_a1, ce_b1, ce_a2, ce_b2, + ce_m, ce_p, ce_mode, + a, b, p, + inmode, opmode, alumode, + casc_a_in, casc_b_in, + casc_a_out, casc_b_out ); - wire [30-18-1:0] casc_a_dummy; - wire [18-16-1:0] casc_b_dummy; - wire [48-47-1:0] p_dummy; + `include "modexpng_parameters.vh" + `include "modexpng_dsp48e1.vh" + + input clk; + input ce_a1; + input ce_b1; + input ce_a2; + input ce_b2; + input ce_m; + input ce_p; + input ce_mode; + input [ WORD_EXT_W -1:0] a; + input [ WORD_W -1:0] b; + output [ MAC_W -1:0] p; + input [ DSP48E1_INMODE_W -1:0] inmode; + input [ DSP48E1_OPMODE_W -1:0] opmode; + input [DSP48E1_ALUMODE_W -1:0] alumode; + input [ WORD_EXT_W -1:0] casc_a_in; + input [ WORD_W -1:0] casc_b_in; + output [ WORD_EXT_W -1:0] casc_a_out; + output [ WORD_W -1:0] casc_b_out; + wire [DSP48E1_A_W - WORD_EXT_W -1:0] casc_a_dummy; + wire [DSP48E1_B_W - WORD_W -1:0] casc_b_dummy; + wire [DSP48E1_P_W - MAC_W -1:0] p_dummy; + DSP48E1 # ( .AREG (2), @@ -52,8 +63,8 @@ module modexpng_dsp_slice_wrapper # .USE_MULT ("DYNAMIC"), .USE_SIMD ("ONE48"), - .MASK (48'h3fffffffffff), - .PATTERN (48'h000000000000), + .MASK ({DSP48E1_P_W{1'b1}}), + .PATTERN ({DSP48E1_P_W{1'b0}}), .SEL_MASK ("MASK"), .SEL_PATTERN ("PATTERN"), @@ -78,21 +89,21 @@ module modexpng_dsp_slice_wrapper # .CEALUMODE (1'b0), .CECARRYIN (1'b0), - .A ({{(30-18){1'b0}}, a}), - .B ({{(18-16){1'b0}}, b}), - .C ({48{1'b0}}), - .D ({25{1'b0}}), + .A ({{(DSP48E1_A_W-WORD_EXT_W){1'b0}}, a}), + .B ({{(DSP48E1_B_W-WORD_W){1'b0}}, b}), + .C ({DSP48E1_C_W{1'b0}}), + .D ({DSP48E1_D_W{1'b0}}), .P ({p_dummy, p}), .INMODE (inmode), .OPMODE (opmode), .ALUMODE (alumode), - .ACIN ({{(30-18){1'b0}}, casc_a_in}), - .BCIN ({{(18-16){1'b0}}, casc_b_in}), + .ACIN ({{(DSP48E1_A_W-WORD_EXT_W){1'b0}}, casc_a_in}), + .BCIN ({{(DSP48E1_B_W-WORD_W){1'b0}}, casc_b_in}), .ACOUT ({casc_a_dummy, casc_a_out}), .BCOUT ({casc_b_dummy, casc_b_out}), - .PCIN ({48{1'b0}}), + .PCIN ({DSP48E1_P_W{1'b0}}), .PCOUT (), .CARRYCASCIN (1'b0), .CARRYCASCOUT (), @@ -121,5 +132,4 @@ module modexpng_dsp_slice_wrapper # .MULTSIGNOUT () ); - endmodule |