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authorPavel V. Shatov (Meister) <meisterpaul1@yandex.ru>2019-10-01 16:18:33 +0300
committerPavel V. Shatov (Meister) <meisterpaul1@yandex.ru>2019-10-01 16:18:33 +0300
commit71f70252dfc7e41103dde420a721be8aa48486d5 (patch)
tree182c413b590d6056b02c5d20818c3385c83610e3 /rtl/modexpng_recombinator_block.v
parentfde62e373fdfcefefb7da10757a3db933160c911 (diff)
Redesigned core architecture, unified bank structure. All storage blocks now
have eight 4kbit entries and occupy one 36K BRAM tile.
Diffstat (limited to 'rtl/modexpng_recombinator_block.v')
-rw-r--r--rtl/modexpng_recombinator_block.v90
1 files changed, 45 insertions, 45 deletions
diff --git a/rtl/modexpng_recombinator_block.v b/rtl/modexpng_recombinator_block.v
index d6b1ad1..de60d1f 100644
--- a/rtl/modexpng_recombinator_block.v
+++ b/rtl/modexpng_recombinator_block.v
@@ -17,9 +17,9 @@ module modexpng_recombinator_block
//
// Headers
//
+ `include "modexpng_parameters.vh"
`include "../rtl_1/modexpng_mmm_fsm_old.vh"
- `include "../rtl_1/modexpng_parameters_old.vh"
- `include "../rtl_1/modexpng_parameters_x8_old.vh"
+ //`include "../rtl_1/modexpng_parameters_x8_old.vh"
input clk;
@@ -34,22 +34,22 @@ module modexpng_recombinator_block
input [ 4:0] col_index;
input [ 4:0] col_index_last;
+ input [ BANK_ADDR_W -1:0] rd_narrow_xy_bank;
input [ 7:0] rd_narrow_xy_addr;
- input [ 1:0] rd_narrow_xy_bank;
- output [ 1:0] rcmb_wide_xy_bank;
+ output [ BANK_ADDR_W -1:0] rcmb_wide_xy_bank;
output [ 7:0] rcmb_wide_xy_addr;
output [ 17:0] rcmb_wide_x_dout;
output [ 17:0] rcmb_wide_y_dout;
output rcmb_wide_xy_valid;
- output [ 1:0] rcmb_narrow_xy_bank;
+ output [ BANK_ADDR_W -1:0] rcmb_narrow_xy_bank;
output [ 7:0] rcmb_narrow_xy_addr;
output [ 17:0] rcmb_narrow_x_dout;
output [ 17:0] rcmb_narrow_y_dout;
output rcmb_narrow_xy_valid;
- output [ 1:0] rdct_narrow_xy_bank;
+ output [ BANK_ADDR_W -1:0] rdct_narrow_xy_bank;
output [ 7:0] rdct_narrow_xy_addr;
output [ 17:0] rdct_narrow_x_dout;
output [ 17:0] rdct_narrow_y_dout;
@@ -167,7 +167,7 @@ module modexpng_recombinator_block
function calc_square_triangle_valid_lsb;
input [4:0] col_index_value;
input [4:0] col_index_last_value;
- input [1:0] narrow_xy_bank_value;
+ input [BANK_ADDR_W -1:0] narrow_xy_bank_value;
input [7:0] narrow_xy_addr_value;
begin
//
@@ -182,7 +182,7 @@ module modexpng_recombinator_block
function calc_square_valid_lsb;
input [4:0] col_index_value;
input [4:0] col_index_last_value;
- input [1:0] narrow_xy_bank_value;
+ input [BANK_ADDR_W -1:0] narrow_xy_bank_value;
input [7:0] narrow_xy_addr_value;
begin
calc_square_valid_lsb = calc_square_triangle_valid_lsb(col_index_value, col_index_last_value, narrow_xy_bank_value, narrow_xy_addr_value);
@@ -192,7 +192,7 @@ module modexpng_recombinator_block
function calc_triangle_valid_lsb;
input [4:0] col_index_value;
input [4:0] col_index_last_value;
- input [1:0] narrow_xy_bank_value;
+ input [BANK_ADDR_W -1:0] narrow_xy_bank_value;
input [7:0] narrow_xy_addr_value;
begin
calc_triangle_valid_lsb = calc_square_triangle_valid_lsb(col_index_value, col_index_last_value, narrow_xy_bank_value, narrow_xy_addr_value);
@@ -202,7 +202,7 @@ module modexpng_recombinator_block
function calc_rectangle_valid_lsb;
input [4:0] col_index_value;
input [4:0] col_index_last_value;
- input [1:0] narrow_xy_bank_value;
+ input [BANK_ADDR_W -1:0] narrow_xy_bank_value;
input [7:0] narrow_xy_addr_value;
begin
//
@@ -217,7 +217,7 @@ module modexpng_recombinator_block
function calc_triangle_aux_lsb;
input [4:0] col_index_value;
input [4:0] col_index_last_value;
- input [1:0] narrow_xy_bank_value;
+ input [BANK_ADDR_W -1:0] narrow_xy_bank_value;
input [7:0] narrow_xy_addr_value;
begin
//
@@ -232,7 +232,7 @@ module modexpng_recombinator_block
function [7:0] calc_square_triangle_bitmap_lsb;
input [4:0] col_index_value;
input [4:0] col_index_last_value;
- input [1:0] narrow_xy_bank_value;
+ input [BANK_ADDR_W -1:0] narrow_xy_bank_value;
input [7:0] narrow_xy_addr_value;
begin
//
@@ -258,7 +258,7 @@ module modexpng_recombinator_block
function [7:0] calc_square_bitmap_lsb;
input [4:0] col_index_value;
input [4:0] col_index_last_value;
- input [1:0] narrow_xy_bank_value;
+ input [BANK_ADDR_W -1:0] narrow_xy_bank_value;
input [7:0] narrow_xy_addr_value;
begin
calc_square_bitmap_lsb = calc_square_triangle_bitmap_lsb(col_index_value, col_index_last_value, narrow_xy_bank_value, narrow_xy_addr_value);
@@ -268,7 +268,7 @@ module modexpng_recombinator_block
function [7:0] calc_triangle_bitmap_lsb;
input [4:0] col_index_value;
input [4:0] col_index_last_value;
- input [1:0] narrow_xy_bank_value;
+ input [BANK_ADDR_W -1:0] narrow_xy_bank_value;
input [7:0] narrow_xy_addr_value;
begin
calc_triangle_bitmap_lsb = calc_square_triangle_bitmap_lsb(col_index_value, col_index_last_value, narrow_xy_bank_value, narrow_xy_addr_value);
@@ -278,7 +278,7 @@ module modexpng_recombinator_block
function [7:0] calc_rectangle_bitmap_lsb;
input [4:0] col_index_value;
input [4:0] col_index_last_value;
- input [1:0] narrow_xy_bank_value;
+ input [BANK_ADDR_W -1:0] narrow_xy_bank_value;
input [7:0] narrow_xy_addr_value;
begin
//
@@ -313,7 +313,7 @@ module modexpng_recombinator_block
function [2:0] calc_square_triangle_index_lsb;
input [4:0] col_index_value;
input [4:0] col_index_last_value;
- input [1:0] narrow_xy_bank_value;
+ input [BANK_ADDR_W -1:0] narrow_xy_bank_value;
input [7:0] narrow_xy_addr_value;
begin
//
@@ -339,7 +339,7 @@ module modexpng_recombinator_block
function [2:0] calc_square_index_lsb;
input [4:0] col_index_value;
input [4:0] col_index_last_value;
- input [1:0] narrow_xy_bank_value;
+ input [BANK_ADDR_W -1:0] narrow_xy_bank_value;
input [7:0] narrow_xy_addr_value;
begin
calc_square_index_lsb = calc_square_triangle_index_lsb(col_index_value, col_index_last_value, narrow_xy_bank_value, narrow_xy_addr_value);
@@ -349,7 +349,7 @@ module modexpng_recombinator_block
function [2:0] calc_triangle_index_lsb;
input [4:0] col_index_value;
input [4:0] col_index_last_value;
- input [1:0] narrow_xy_bank_value;
+ input [BANK_ADDR_W -1:0] narrow_xy_bank_value;
input [7:0] narrow_xy_addr_value;
begin
calc_triangle_index_lsb = calc_square_triangle_index_lsb(col_index_value, col_index_last_value, narrow_xy_bank_value, narrow_xy_addr_value);
@@ -359,7 +359,7 @@ module modexpng_recombinator_block
function [2:0] calc_rectangle_index_lsb;
input [4:0] col_index_value;
input [4:0] col_index_last_value;
- input [1:0] slim_bram_xy_bank_value;
+ input [BANK_ADDR_W -1:0] slim_bram_xy_bank_value;
input [7:0] slim_bram_xy_addr_value;
begin
//
@@ -385,7 +385,7 @@ module modexpng_recombinator_block
function calc_square_rectangle_purge_lsb;
input [4:0] col_index_value;
input [4:0] col_index_last_value;
- input [1:0] narrow_xy_bank_value;
+ input [BANK_ADDR_W -1:0] narrow_xy_bank_value;
input [7:0] narrow_xy_addr_value;
begin
//
@@ -400,7 +400,7 @@ module modexpng_recombinator_block
function calc_square_purge_lsb;
input [4:0] col_index_value;
input [4:0] col_index_last_value;
- input [1:0] narrow_xy_bank_value;
+ input [BANK_ADDR_W -1:0] narrow_xy_bank_value;
input [7:0] narrow_xy_addr_value;
begin
calc_square_purge_lsb = calc_square_rectangle_purge_lsb(col_index_value, col_index_last_value, narrow_xy_bank_value, narrow_xy_addr_value);
@@ -410,7 +410,7 @@ module modexpng_recombinator_block
function calc_rectangle_purge_lsb;
input [4:0] col_index_value;
input [4:0] col_index_last_value;
- input [1:0] narrow_xy_bank_value;
+ input [BANK_ADDR_W -1:0] narrow_xy_bank_value;
input [7:0] narrow_xy_addr_value;
begin
calc_rectangle_purge_lsb = calc_square_rectangle_purge_lsb(col_index_value, col_index_last_value, narrow_xy_bank_value, narrow_xy_addr_value);
@@ -420,7 +420,7 @@ module modexpng_recombinator_block
function calc_square_valid_msb;
input [4:0] col_index_value;
input [4:0] col_index_last_value;
- input [1:0] narrow_xy_bank_value;
+ input [BANK_ADDR_W -1:0] narrow_xy_bank_value;
input [7:0] narrow_xy_addr_value;
input [7:0] index_last_value;
begin
@@ -436,7 +436,7 @@ module modexpng_recombinator_block
function calc_rectangle_valid_msb;
input [4:0] col_index_value;
input [4:0] col_index_last_value;
- input [1:0] narrow_xy_bank_value;
+ input [BANK_ADDR_W -1:0] narrow_xy_bank_value;
input [7:0] narrow_xy_addr_value;
input [7:0] index_last_value;
begin
@@ -452,7 +452,7 @@ module modexpng_recombinator_block
function [7:0] calc_square_bitmap_msb;
input [4:0] col_index_value;
input [4:0] col_index_last_value;
- input [1:0] narrow_xy_bank_value;
+ input [BANK_ADDR_W -1:0] narrow_xy_bank_value;
input [7:0] narrow_xy_addr_value;
input [7:0] index_last_value;
begin
@@ -469,7 +469,7 @@ module modexpng_recombinator_block
function [7:0] calc_rectangle_bitmap_msb;
input [4:0] col_index_value;
input [4:0] col_index_last_value;
- input [1:0] narrow_xy_bank_value;
+ input [BANK_ADDR_W -1:0] narrow_xy_bank_value;
input [7:0] narrow_xy_addr_value;
input [7:0] index_last_value;
begin
@@ -485,7 +485,7 @@ module modexpng_recombinator_block
function calc_square_purge_msb;
input [4:0] col_index_value;
input [4:0] col_index_last_value;
- input [1:0] narrow_xy_bank_value;
+ input [BANK_ADDR_W -1:0] narrow_xy_bank_value;
input [7:0] narrow_xy_addr_value;
input [7:0] index_last_value;
begin
@@ -501,7 +501,7 @@ module modexpng_recombinator_block
function calc_rectangle_purge_msb;
input [4:0] col_index_value;
input [4:0] col_index_last_value;
- input [1:0] narrow_xy_bank_value;
+ input [BANK_ADDR_W -1:0] narrow_xy_bank_value;
input [7:0] narrow_xy_addr_value;
input [7:0] index_last_value;
begin
@@ -783,19 +783,19 @@ module modexpng_recombinator_block
end
- reg [ 1:0] wide_xy_bank;
+ reg [ BANK_ADDR_W -1:0] wide_xy_bank;
reg [ 7:0] wide_xy_addr;
reg [17:0] wide_x_dout;
reg [17:0] wide_y_dout;
reg wide_xy_valid = 1'b0;
- reg [ 1:0] narrow_xy_bank;
+ reg [ BANK_ADDR_W -1:0] narrow_xy_bank;
reg [ 7:0] narrow_xy_addr;
reg [17:0] narrow_x_dout;
reg [17:0] narrow_y_dout;
reg narrow_xy_valid = 1'b0;
- reg [ 1:0] rdct_xy_bank;
+ reg [ BANK_ADDR_W -1:0] rdct_xy_bank;
reg [ 7:0] rdct_xy_addr;
reg [17:0] rdct_x_dout;
reg [17:0] rdct_y_dout;
@@ -883,7 +883,7 @@ module modexpng_recombinator_block
endtask
task _update_wide;
- input [ 1:0] bank;
+ input [ BANK_ADDR_W -1:0] bank;
input [ 7:0] addr;
input [17:0] dout_x;
input [17:0] dout_y;
@@ -898,7 +898,7 @@ module modexpng_recombinator_block
endtask
task _update_narrow;
- input [ 1:0] bank;
+ input [ BANK_ADDR_W -1:0] bank;
input [ 7:0] addr;
input [17:0] dout_x;
input [17:0] dout_y;
@@ -913,7 +913,7 @@ module modexpng_recombinator_block
endtask
task _update_rdct;
- input [ 1:0] bank;
+ input [ BANK_ADDR_W -1:0] bank;
input [ 7:0] addr;
input [17:0] dout_x;
input [17:0] dout_y;
@@ -928,7 +928,7 @@ module modexpng_recombinator_block
endtask
task set_wide;
- input [ 1:0] bank;
+ input [ BANK_ADDR_W -1:0] bank;
input [ 7:0] addr;
input [17:0] dout_x;
input [17:0] dout_y;
@@ -938,7 +938,7 @@ module modexpng_recombinator_block
endtask
task set_narrow;
- input [ 1:0] bank;
+ input [ BANK_ADDR_W -1:0] bank;
input [ 7:0] addr;
input [17:0] dout_x;
input [17:0] dout_y;
@@ -948,7 +948,7 @@ module modexpng_recombinator_block
endtask
task set_rdct;
- input [ 1:0] bank;
+ input [ BANK_ADDR_W -1:0] bank;
input [ 7:0] addr;
input [17:0] dout_x;
input [17:0] dout_y;
@@ -959,19 +959,19 @@ module modexpng_recombinator_block
task clear_wide;
begin
- _update_wide(2'bXX, 8'hXX, {18{1'bX}}, {18{1'bX}}, 1'b0);
+ _update_wide(BANK_DONT_CARE, OP_ADDR_DONT_CARE, WORD_EXT_DONT_CARE, WORD_EXT_DONT_CARE, 1'b0);
end
endtask
task clear_narrow;
begin
- _update_narrow(2'bXX, 8'hXX, {18{1'bX}}, {18{1'bX}}, 1'b0);
+ _update_narrow(BANK_DONT_CARE, OP_ADDR_DONT_CARE, WORD_EXT_DONT_CARE, WORD_EXT_DONT_CARE, 1'b0);
end
endtask
task clear_rdct;
begin
- _update_rdct(2'bXX, 8'hXX, {18{1'bX}}, {18{1'bX}}, 1'b0);
+ _update_rdct(BANK_DONT_CARE, OP_ADDR_DONT_CARE, WORD_EXT_DONT_CARE, WORD_EXT_DONT_CARE, 1'b0);
end
endtask
@@ -1074,16 +1074,16 @@ module modexpng_recombinator_block
//
case (rcmb_xy_valid)
//
- 2'b00: if (rcmb_msb_flag_delay_2) set_wide(BANK_WIDE_ABH, rcmb_msb_cnt_delay_2, rcmb_x_msb_delay_2_pad, rcmb_y_msb_delay_2_pad);
+ 2'b00: if (rcmb_msb_flag_delay_2) set_wide(BANK_WIDE_H, rcmb_msb_cnt_delay_2, rcmb_x_msb_delay_2_pad, rcmb_y_msb_delay_2_pad);
else clear_wide;
//
- 2'b01: set_wide(BANK_WIDE_ABL, cnt_lsb, rcmb_x_lsb_dout_pad, rcmb_y_lsb_dout_pad);
+ 2'b01: set_wide(BANK_WIDE_L, cnt_lsb, rcmb_x_lsb_dout_pad, rcmb_y_lsb_dout_pad);
//
2'b10: if (cnt_msb < 8'd2) clear_wide;
- else set_wide(BANK_WIDE_ABH, cnt_msb, rcmb_x_msb_dout_pad, rcmb_y_msb_dout_pad);
+ else set_wide(BANK_WIDE_H, cnt_msb, rcmb_x_msb_dout_pad, rcmb_y_msb_dout_pad);
//
- 2'b11: if (cnt_lsb_wrapped) set_wide(BANK_WIDE_ABH, cnt_lsb, rcmb_x_lsb_msb_carry_1_pad, rcmb_y_lsb_msb_carry_1_pad);
- else set_wide(BANK_WIDE_ABL, cnt_lsb, rcmb_x_lsb_dout_pad, rcmb_y_lsb_dout_pad);
+ 2'b11: if (cnt_lsb_wrapped) set_wide(BANK_WIDE_H, cnt_lsb, rcmb_x_lsb_msb_carry_1_pad, rcmb_y_lsb_msb_carry_1_pad);
+ else set_wide(BANK_WIDE_L, cnt_lsb, rcmb_x_lsb_dout_pad, rcmb_y_lsb_dout_pad);
//
endcase
//